Lines Matching refs:ARM_LR
72 #define CALLEE_PUSH_MASK (CALLEE_MASK | 1 << ARM_LR)
344 emit(ARM_MOV_R(ARM_LR, ARM_PC), ctx); in emit_blx_r()
670 emit(ARM_MOV_SR(ARM_LR, rm, SRTYPE_ASL, rt), ctx); in emit_a32_lsh_r64()
671 emit(ARM_ORR_SR(ARM_LR, ARM_LR, rd, SRTYPE_ASL, ARM_IP), ctx); in emit_a32_lsh_r64()
672 emit(ARM_ORR_SR(ARM_IP, ARM_LR, rd, SRTYPE_LSR, tmp2[0]), ctx); in emit_a32_lsh_r64()
673 emit(ARM_MOV_SR(ARM_LR, rd, SRTYPE_ASL, rt), ctx); in emit_a32_lsh_r64()
676 emit(ARM_STR_I(ARM_LR, ARM_SP, STACK_VAR(dst_lo)), ctx); in emit_a32_lsh_r64()
679 emit(ARM_MOV_R(rd, ARM_LR), ctx); in emit_a32_lsh_r64()
704 emit(ARM_MOV_SR(ARM_LR, rd, SRTYPE_LSR, rt), ctx); in emit_a32_arsh_r64()
705 emit(ARM_ORR_SR(ARM_LR, ARM_LR, rm, SRTYPE_ASL, ARM_IP), ctx); in emit_a32_arsh_r64()
707 emit(ARM_ORR_SR(ARM_LR, ARM_LR, rm, SRTYPE_ASR, tmp2[0]), ctx); in emit_a32_arsh_r64()
710 emit(ARM_STR_I(ARM_LR, ARM_SP, STACK_VAR(dst_lo)), ctx); in emit_a32_arsh_r64()
713 emit(ARM_MOV_R(rd, ARM_LR), ctx); in emit_a32_arsh_r64()
738 emit(ARM_MOV_SR(ARM_LR, rd, SRTYPE_LSR, rt), ctx); in emit_a32_rsh_r64()
739 emit(ARM_ORR_SR(ARM_LR, ARM_LR, rm, SRTYPE_ASL, ARM_IP), ctx); in emit_a32_rsh_r64()
740 emit(ARM_ORR_SR(ARM_LR, ARM_LR, rm, SRTYPE_LSR, tmp2[0]), ctx); in emit_a32_rsh_r64()
743 emit(ARM_STR_I(ARM_LR, ARM_SP, STACK_VAR(dst_lo)), ctx); in emit_a32_rsh_r64()
746 emit(ARM_MOV_R(rd, ARM_LR), ctx); in emit_a32_rsh_r64()
871 emit(ARM_MUL(ARM_LR, rm, rt), ctx); in emit_a32_mul_r64()
872 emit(ARM_ADD_R(ARM_LR, ARM_IP, ARM_LR), ctx); in emit_a32_mul_r64()
875 emit(ARM_ADD_R(rm, ARM_LR, rm), ctx); in emit_a32_mul_r64()
969 emit(ARM_AND_R(ARM_LR, rd, rm), ctx); in emit_ar_r()
970 emit(ARM_ORRS_R(ARM_IP, ARM_LR, ARM_IP), ctx); in emit_ar_r()
1409 emit_rev32(ARM_LR, rt, ctx); in build_insn()
1411 emit(ARM_MOV_R(rd, ARM_LR), ctx); in build_insn()