Lines Matching refs:irq
117 bfin_irq_flags &= ~(1 << d->irq); in bfin_core_mask_irq()
124 bfin_irq_flags |= 1 << d->irq; in bfin_core_unmask_irq()
140 void bfin_internal_mask_irq(unsigned int irq) in bfin_internal_mask_irq() argument
144 unsigned mask_bank = BFIN_SYSIRQ(irq) / 32; in bfin_internal_mask_irq()
145 unsigned mask_bit = BFIN_SYSIRQ(irq) % 32; in bfin_internal_mask_irq()
154 ~(1 << BFIN_SYSIRQ(irq))); in bfin_internal_mask_irq()
161 bfin_internal_mask_irq(d->irq); in bfin_internal_mask_irq_chip()
165 void bfin_internal_unmask_irq_affinity(unsigned int irq, in bfin_internal_unmask_irq_affinity() argument
168 void bfin_internal_unmask_irq(unsigned int irq) in bfin_internal_unmask_irq_affinity()
174 unsigned mask_bank = BFIN_SYSIRQ(irq) / 32; in bfin_internal_unmask_irq_affinity()
175 unsigned mask_bit = BFIN_SYSIRQ(irq) % 32; in bfin_internal_unmask_irq_affinity()
190 (1 << BFIN_SYSIRQ(irq))); in bfin_internal_unmask_irq_affinity()
198 bfin_internal_unmask_irq_affinity(d->irq, in bfin_internal_unmask_irq_chip()
205 bfin_internal_mask_irq(d->irq); in bfin_internal_set_affinity()
206 bfin_internal_unmask_irq_affinity(d->irq, mask); in bfin_internal_set_affinity()
213 bfin_internal_unmask_irq(d->irq); in bfin_internal_unmask_irq_chip()
218 int bfin_internal_set_wake(unsigned int irq, unsigned int state) in bfin_internal_set_wake() argument
222 bank = BFIN_SYSIRQ(irq) / 32; in bfin_internal_set_wake()
223 bit = BFIN_SYSIRQ(irq) % 32; in bfin_internal_set_wake()
225 switch (irq) { in bfin_internal_set_wake()
273 return bfin_internal_set_wake(d->irq, state); in bfin_internal_set_wake_chip()
276 inline int bfin_internal_set_wake(unsigned int irq, unsigned int state) in bfin_internal_set_wake() argument
287 unsigned int sid = BFIN_SYSIRQ(d->irq); in bfin_sec_preflow_handler()
297 unsigned int sid = BFIN_SYSIRQ(d->irq); in bfin_sec_mask_ack_irq()
307 unsigned int sid = BFIN_SYSIRQ(d->irq); in bfin_sec_unmask_irq()
375 unsigned int sid = BFIN_SYSIRQ(d->irq); in bfin_sec_enable()
386 unsigned int sid = BFIN_SYSIRQ(d->irq); in bfin_sec_disable()
411 void bfin_sec_raise_irq(unsigned int irq) in bfin_sec_raise_irq() argument
414 unsigned int sid = BFIN_SYSIRQ(irq); in bfin_sec_raise_irq()
492 static irqreturn_t bfin_fault_routine(int irq, void *data) in bfin_fault_routine() argument
496 switch (irq) { in bfin_fault_routine()
517 panic("Unknown fault %d", irq); in bfin_fault_routine()
554 void bfin_handle_irq(unsigned irq) in bfin_handle_irq() argument
558 ipipe_trace_irq_entry(irq); in bfin_handle_irq()
559 __ipipe_handle_irq(irq, ®s); in bfin_handle_irq()
560 ipipe_trace_irq_exit(irq); in bfin_handle_irq()
562 generic_handle_irq(irq); in bfin_handle_irq()
569 static void bfin_mac_status_ack_irq(unsigned int irq) in bfin_mac_status_ack_irq() argument
571 switch (irq) { in bfin_mac_status_ack_irq()
596 bfin_write_EMAC_SYSTAT(1L << (irq - IRQ_MAC_PHYINT)); in bfin_mac_status_ack_irq()
603 unsigned int irq = d->irq; in bfin_mac_status_mask_irq() local
605 mac_stat_int_mask &= ~(1L << (irq - IRQ_MAC_PHYINT)); in bfin_mac_status_mask_irq()
607 switch (irq) { in bfin_mac_status_mask_irq()
618 bfin_mac_status_ack_irq(irq); in bfin_mac_status_mask_irq()
623 unsigned int irq = d->irq; in bfin_mac_status_unmask_irq() local
626 switch (irq) { in bfin_mac_status_unmask_irq()
637 mac_stat_int_mask |= 1L << (irq - IRQ_MAC_PHYINT); in bfin_mac_status_unmask_irq()
662 int i, irq = 0; in bfin_demux_mac_status_irq() local
667 irq = IRQ_MAC_PHYINT + i; in bfin_demux_mac_status_irq()
671 if (irq) { in bfin_demux_mac_status_irq()
672 if (mac_stat_int_mask & (1L << (irq - IRQ_MAC_PHYINT))) { in bfin_demux_mac_status_irq()
673 bfin_handle_irq(irq); in bfin_demux_mac_status_irq()
675 bfin_mac_status_ack_irq(irq); in bfin_demux_mac_status_irq()
678 irq); in bfin_demux_mac_status_irq()
706 set_gpio_data(irq_to_gpio(d->irq), 0); in bfin_gpio_ack_irq()
711 unsigned int irq = d->irq; in bfin_gpio_mask_ack_irq() local
712 u32 gpionr = irq_to_gpio(irq); in bfin_gpio_mask_ack_irq()
722 set_gpio_maska(irq_to_gpio(d->irq), 0); in bfin_gpio_mask_irq()
727 set_gpio_maska(irq_to_gpio(d->irq), 1); in bfin_gpio_unmask_irq()
732 u32 gpionr = irq_to_gpio(d->irq); in bfin_gpio_irq_startup()
744 u32 gpionr = irq_to_gpio(d->irq); in bfin_gpio_irq_shutdown()
753 unsigned int irq = d->irq; in bfin_gpio_irq_type() local
756 u32 gpionr = irq_to_gpio(irq); in bfin_gpio_irq_type()
768 snprintf(buf, 16, "gpio-irq%d", irq); in bfin_gpio_irq_type()
813 static void bfin_demux_gpio_block(unsigned int irq) in bfin_demux_gpio_block() argument
817 gpio = irq_to_gpio(irq); in bfin_demux_gpio_block()
822 bfin_handle_irq(irq); in bfin_demux_gpio_block()
823 irq++; in bfin_demux_gpio_block()
831 unsigned int irq; in bfin_demux_gpio_irq() local
837 irq = IRQ_PG0; in bfin_demux_gpio_irq()
840 irq = IRQ_PH0; in bfin_demux_gpio_irq()
844 irq = IRQ_PF0; in bfin_demux_gpio_irq()
848 irq = IRQ_PF0; in bfin_demux_gpio_irq()
852 irq = IRQ_PF0; in bfin_demux_gpio_irq()
855 irq = IRQ_PG0; in bfin_demux_gpio_irq()
858 irq = IRQ_PH0; in bfin_demux_gpio_irq()
862 irq = IRQ_PF0; in bfin_demux_gpio_irq()
865 irq = IRQ_PF16; in bfin_demux_gpio_irq()
868 irq = IRQ_PF32; in bfin_demux_gpio_irq()
876 bfin_demux_gpio_block(irq); in bfin_demux_gpio_irq()
883 return bfin_gpio_pm_wakeup_ctrl(irq_to_gpio(d->irq), state); in bfin_gpio_set_wake()
973 int irq; in init_arch_irq() local
993 for (irq = 0; irq <= SYS_IRQS; irq++) { in init_arch_irq()
994 if (irq <= IRQ_CORETMR) in init_arch_irq()
995 irq_set_chip(irq, &bfin_core_irqchip); in init_arch_irq()
997 irq_set_chip(irq, &bfin_internal_irqchip); in init_arch_irq()
999 switch (irq) { in init_arch_irq()
1017 irq_set_chained_handler(irq, bfin_demux_gpio_irq); in init_arch_irq()
1022 irq_set_chained_handler(irq, in init_arch_irq()
1029 irq_set_handler(irq, handle_percpu_irq); in init_arch_irq()
1036 irq_set_handler(irq, handle_percpu_irq); in init_arch_irq()
1038 irq_set_handler(irq, handle_simple_irq); in init_arch_irq()
1045 irq_set_handler(irq, handle_simple_irq); in init_arch_irq()
1051 irq_set_handler(irq, handle_level_irq); in init_arch_irq()
1053 irq_set_handler(irq, handle_simple_irq); in init_arch_irq()
1062 for (irq = IRQ_MAC_PHYINT; irq <= IRQ_MAC_STMDONE; irq++) in init_arch_irq()
1063 irq_set_chip_and_handler(irq, &bfin_mac_status_irqchip, in init_arch_irq()
1068 for (irq = GPIO_IRQ_BASE; in init_arch_irq()
1069 irq < (GPIO_IRQ_BASE + MAX_BLACKFIN_GPIOS); irq++) in init_arch_irq()
1070 irq_set_chip_and_handler(irq, &bfin_gpio_irqchip, in init_arch_irq()
1168 int irq; in init_arch_irq() local
1175 for (irq = 0; irq <= SYS_IRQS; irq++) { in init_arch_irq()
1176 if (irq <= IRQ_CORETMR) { in init_arch_irq()
1177 irq_set_chip_and_handler(irq, &bfin_core_irqchip, in init_arch_irq()
1180 if (irq == IRQ_CORETMR) in init_arch_irq()
1181 irq_set_handler(irq, handle_percpu_irq); in init_arch_irq()
1183 } else if (irq >= BFIN_IRQ(34) && irq <= BFIN_IRQ(37)) { in init_arch_irq()
1184 irq_set_chip_and_handler(irq, &bfin_sec_irqchip, in init_arch_irq()
1187 irq_set_chip(irq, &bfin_sec_irqchip); in init_arch_irq()
1188 irq_set_handler(irq, handle_fasteoi_irq); in init_arch_irq()
1189 __irq_set_preflow_handler(irq, bfin_sec_preflow_handler); in init_arch_irq()
1252 int irq = vec_to_irq(vec); in do_irq() local
1253 if (irq == -1) in do_irq()
1255 asm_do_IRQ(irq, fp); in do_irq()
1260 int __ipipe_get_irq_priority(unsigned irq) in __ipipe_get_irq_priority() argument
1264 if (irq <= IRQ_CORETMR) in __ipipe_get_irq_priority()
1265 return irq; in __ipipe_get_irq_priority()
1268 if (irq >= BFIN_IRQ(0)) in __ipipe_get_irq_priority()
1273 if (ivg->irqno == irq) { in __ipipe_get_irq_priority()
1294 int irq, s = 0; in __ipipe_grab_irq() local
1296 irq = vec_to_irq(vec); in __ipipe_grab_irq()
1297 if (irq == -1) in __ipipe_grab_irq()
1300 if (irq == IRQ_SYSTMR) { in __ipipe_grab_irq()
1333 ipipe_trace_irq_entry(irq); in __ipipe_grab_irq()
1334 __ipipe_handle_irq(irq, regs); in __ipipe_grab_irq()
1335 ipipe_trace_irq_exit(irq); in __ipipe_grab_irq()