Lines Matching refs:temp2
413 #define temp2 r3 /* careful, it overlaps with input registers */ macro
462 GET_IA64_MCA_DATA(temp2)
464 add temp1=temp2, regs // struct ia64_sal_os_state on MCA or INIT stack
465 add temp2=temp2, ms // struct ia64_sal_os_state+8 on MCA or INIT stack
469 st8 [temp2]=r8,16 // pal_proc
472 st8 [temp2]=r11,16 // rv_rc
476 st8 [temp2]=r19 // monarch
479 add temp2=SOS(SAL_GP), regs
482 st8 [temp2]=r10,16 // sal_gp
486 st8 [temp2]=r6,16 // prev_IA64_KR_CURRENT
490 st8 [temp2]=r0,16 // prev_task, starts off as NULL
494 st8 [temp2]=r6,16 // cr.ifa
498 st8 [temp2]=r11,16 // cr.iipa
507 st8 [temp2]=r6 // cr.iha
508 add temp2=SOS(CONTEXT), regs
512 st8 [temp2]=r6 // context, default is same context
521 add temp2=PT(B7), regs
524 st8 [temp2]=temp4,PT(AR_SSD)-PT(B7) // save b7
530 st8 [temp2]=temp4,PT(AR_PFS)-PT(AR_SSD) // save ar.ssd
535 st8 [temp2]=temp4,PT(AR_BSPSTORE)-PT(AR_PFS) // save ar.pfs
540 st8 [temp2]=temp4,PT(AR_FPSR)-PT(AR_BSPSTORE) // save ar.bspstore
549 st8 [temp2]=temp4,PT(F6)-PT(AR_FPSR) // save ar.fpsr
553 stf.spill [temp2]=f6,PT(F8)-PT(F6)
556 stf.spill [temp2]=f8,PT(F10)-PT(F8)
559 stf.spill [temp2]=f10
568 add temp2=SW(F3), regs
571 stf.spill [temp2]=f3,32
574 stf.spill [temp2]=f5,32
577 stf.spill [temp2]=f13,32
580 stf.spill [temp2]=f15,32
583 stf.spill [temp2]=f17,32
586 stf.spill [temp2]=f19,32
589 stf.spill [temp2]=f21,32
592 stf.spill [temp2]=f23,32
595 stf.spill [temp2]=f25,32
598 stf.spill [temp2]=f27,32
601 stf.spill [temp2]=f29,32
604 stf.spill [temp2]=f31,SW(B3)-SW(F31)
609 st8 [temp2]=temp4,16 // save b3
614 st8 [temp2]=temp4 // save b5
722 GET_IA64_MCA_DATA(temp2)
724 add regs=temp2, regs
727 add temp2=SW(F3), regs
730 ldf.fill f3=[temp2],32
733 ldf.fill f5=[temp2],32
736 ldf.fill f13=[temp2],32
739 ldf.fill f15=[temp2],32
742 ldf.fill f17=[temp2],32
745 ldf.fill f19=[temp2],32
748 ldf.fill f21=[temp2],32
751 ldf.fill f23=[temp2],32
754 ldf.fill f25=[temp2],32
757 ldf.fill f27=[temp2],32
760 ldf.fill f29=[temp2],32
763 ldf.fill f31=[temp2],SW(B3)-SW(F31)
766 ld8 temp4=[temp2],16 // restore b3
771 ld8 temp4=[temp2] // restore b5
784 add temp2=PT(B7), regs
787 ld8 temp4=[temp2],PT(AR_SSD)-PT(B7) // restore b7
792 ld8 temp4=[temp2],PT(AR_PFS)-PT(AR_SSD) // restore ar.ssd
798 ld8 temp4=[temp2],PT(AR_FPSR)-PT(AR_PFS) // restore ar.pfs
804 ld8 temp4=[temp2],PT(F7)-PT(AR_FPSR) // restore ar.fpsr
809 ldf.fill f7=[temp2],PT(F9)-PT(F7)
812 ldf.fill f9=[temp2],PT(F11)-PT(F9)
815 ldf.fill f11=[temp2]
821 add temp2=SOS(SAL_GP), regs
824 ld8 r9=[temp2],16 // sal_gp
827 ld8 r13=[temp2],16 // prev_IA64_KR_CURRENT
830 ld8 r20=[temp2],16 // prev_task
833 ld8 temp4=[temp2],16 // cr.ifa
838 ld8 temp4=[temp2],16 // cr.iipa
843 ld8 temp4=[temp2] // cr.iha
845 add temp2=SOS(CONTEXT), regs
852 ld8 r10=[temp2] // context
918 add temp2=MCA_SOS_OFFSET+SOS(PAL_MIN_STATE), r3
923 add temp2=temp2, temp1 // struct ia64_sal_os_state.pal_min_state on MCA or INIT stack
928 ld8 ms=[temp2] // pal_min_state, physical
933 st8 [temp2]=temp1 // pal_min_state, virtual
973 GET_IA64_MCA_DATA(temp2)
984 add regs=regs, temp2 // struct pt_regs on MCA or INIT stack
988 ld8 temp2=[temp1],PT(AR_BSPSTORE)-PT(LOADRS) // restore loadrs
991 mov ar.rsc=temp2
1029 DATA_PA_TO_VA(r12,temp2)
1075 #undef temp2