Lines Matching refs:ld
85 ld r4, HSTATE_KVM_VCPU(r13)
92 ld r5,HSTATE_DABR(r13)
99 ld r3,PACA_SPRG_VDSO(r13)
103 ld r3, PACALPPACAPTR(r13) /* is the host using the PMU? */
108 ld r3, HSTATE_MMCR0(r13)
125 ld r3, HSTATE_MMCR0(r13)
126 ld r4, HSTATE_MMCR1(r13)
127 ld r5, HSTATE_MMCRA(r13)
128 ld r6, HSTATE_SIAR(r13)
129 ld r7, HSTATE_SDAR(r13)
135 ld r8, HSTATE_MMCR2(r13)
136 ld r9, HSTATE_SIER(r13)
148 ld r3, HSTATE_DECEXP(r13)
168 ld r8, 112+PPC_LR_STKOFF(r1)
170 ld r7, HSTATE_HOST_MSR(r13)
210 ld r5, HSTATE_KVM_VCORE(r13)
215 ld r8,VCORE_LPCR(r5)
219 ld r5, HSTATE_KVM_VCORE(r13)
248 ld r1, HSTATE_HOST_R1(r13)
249 ld r5, HSTATE_KVM_VCORE(r13)
261 ld r5, HSTATE_KVM_VCORE(r13)
290 ld r4, HSTATE_KVM_VCPU(r13)
302 ld r4, HSTATE_KVM_VCPU(r13)
334 ld r2,PACATOC(r13)
350 ld r1,PACAEMERGSP(r13)
371 ld r5,HSTATE_KVM_VCORE(r13)
379 ld r6, PACA_DSCR_DEFAULT(r13)
387 ld r6, 0(r6)
390 ld r6, HSTATE_SPLIT_MODE(r13)
393 ld r0, KVM_SPLIT_RPR(r6)
395 ld r0, KVM_SPLIT_PMMAR(r6)
397 ld r0, KVM_SPLIT_LDBAR(r6)
403 ld r4, HSTATE_KVM_VCPU(r13)
467 ld r5, HSTATE_KVM_VCORE(r13)
470 ld r3, HSTATE_SPLIT_MODE(r13)
511 ld r0, HSTATE_KVM_VCORE(r13)
520 ld r3, HSTATE_SPLIT_MODE(r13)
579 ld r5, HSTATE_KVM_VCORE(r13)
580 ld r9, VCORE_KVM(r5) /* pointer to struct kvm */
613 ld r6,KVM_SDR1(r9)
640 ld r7,0(r6)
664 22: ld r8,VCORE_TB_OFFSET(r5)
679 37: ld r7, VCORE_PCR(r5)
687 ld r8, VCORE_DPDES(r5)
688 ld r7, VCORE_VTB(r5)
696 ld r5, HSTATE_KVM_VCORE(r13)
697 ld r4, HSTATE_KVM_VCPU(r13)
712 1: ld r8,VCPU_SLB_E(r6)
713 ld r9,VCPU_SLB_V(r6)
719 ld r3, VCPU_VPA(r4)
735 ld r7,VCPU_PURR(r4)
736 ld r8,VCPU_SPURR(r4)
766 ld r6,VCPU_DABR(r4)
788 ld r3, VCPU_MMCR(r4)
805 ld r3, VCPU_MMCR(r4)
806 ld r5, VCPU_MMCR + 8(r4)
807 ld r6, VCPU_MMCR + 16(r4)
808 ld r7, VCPU_SIAR(r4)
809 ld r8, VCPU_SDAR(r4)
815 ld r5, VCPU_MMCR + 24(r4)
816 ld r6, VCPU_SIER(r4)
822 ld r9, VCPU_MMCR + 32(r4)
834 ld r14, VCPU_GPR(R14)(r4)
835 ld r15, VCPU_GPR(R15)(r4)
836 ld r16, VCPU_GPR(R16)(r4)
837 ld r17, VCPU_GPR(R17)(r4)
838 ld r18, VCPU_GPR(R18)(r4)
839 ld r19, VCPU_GPR(R19)(r4)
840 ld r20, VCPU_GPR(R20)(r4)
841 ld r21, VCPU_GPR(R21)(r4)
842 ld r22, VCPU_GPR(R22)(r4)
843 ld r23, VCPU_GPR(R23)(r4)
844 ld r24, VCPU_GPR(R24)(r4)
845 ld r25, VCPU_GPR(R25)(r4)
846 ld r26, VCPU_GPR(R26)(r4)
847 ld r27, VCPU_GPR(R27)(r4)
848 ld r28, VCPU_GPR(R28)(r4)
849 ld r29, VCPU_GPR(R29)(r4)
850 ld r30, VCPU_GPR(R30)(r4)
851 ld r31, VCPU_GPR(R31)(r4)
854 ld r5, VCPU_DSCR(r4)
862 ld r5, VCPU_IAMR(r4)
864 ld r7, VCPU_FSCR(r4)
868 ld r5, VCPU_DAWR(r4)
869 ld r6, VCPU_DAWRX(r4)
870 ld r7, VCPU_CIABR(r4)
871 ld r8, VCPU_TAR(r4)
876 ld r5, VCPU_IC(r4)
877 ld r8, VCPU_EBBHR(r4)
880 ld r5, VCPU_EBBRR(r4)
881 ld r6, VCPU_BESCR(r4)
883 ld r8, VCPU_WORT(r4)
893 ld r5, VCPU_TCSCR(r4)
894 ld r6, VCPU_ACOP(r4)
895 ld r7, VCPU_CSIGR(r4)
896 ld r8, VCPU_TACR(r4)
903 ld r5, VCPU_TID(r4)
904 ld r6, VCPU_PSSCR(r4)
906 ld r7, VCPU_HFSCR(r4)
916 ld r8,VCPU_DEC_EXPIRES(r4)
918 ld r5,HSTATE_KVM_VCORE(r13)
919 ld r6,VCORE_TB_OFFSET(r5)
926 ld r5, VCPU_SPRG0(r4)
927 ld r6, VCPU_SPRG1(r4)
928 ld r7, VCPU_SPRG2(r4)
929 ld r8, VCPU_SPRG3(r4)
936 ld r5, VCPU_DAR(r4)
942 ld r5,VCPU_AMR(r4)
943 ld r6,VCPU_UAMOR(r4)
958 ld r5, HSTATE_KVM_VCORE(r13)
975 ld r8,VCORE_LPCR(r5)
987 ld r10, HSTATE_XIVE_TIMA_PHYS(r13)
990 ld r11, VCPU_XIVE_SAVED_STATE(r4)
1004 ld r6, VCPU_CTR(r4)
1005 ld r7, VCPU_XER(r4)
1011 ld r10, VCPU_PC(r4)
1012 ld r11, VCPU_MSR(r4)
1013 ld r6, VCPU_SRR0(r4)
1014 ld r7, VCPU_SRR1(r4)
1024 ld r0, VCPU_PENDING_EXC(r4)
1060 ld r5, HSTATE_KVM_VCORE(r13)
1097 ld r5, VCPU_CFAR(r4)
1101 ld r0, VCPU_PPR(r4)
1104 ld r5, VCPU_LR(r4)
1109 ld r1, VCPU_GPR(R1)(r4)
1110 ld r2, VCPU_GPR(R2)(r4)
1111 ld r3, VCPU_GPR(R3)(r4)
1112 ld r5, VCPU_GPR(R5)(r4)
1113 ld r6, VCPU_GPR(R6)(r4)
1114 ld r7, VCPU_GPR(R7)(r4)
1115 ld r8, VCPU_GPR(R8)(r4)
1116 ld r9, VCPU_GPR(R9)(r4)
1117 ld r10, VCPU_GPR(R10)(r4)
1118 ld r11, VCPU_GPR(R11)(r4)
1119 ld r12, VCPU_GPR(R12)(r4)
1120 ld r13, VCPU_GPR(R13)(r4)
1132 ld r0, VCPU_GPR(R0)(r4)
1133 ld r4, VCPU_GPR(R4)(r4)
1188 ld r9, HSTATE_SCRATCH2(r13)
1195 ld r9, HSTATE_KVM_VCPU(r13)
1208 ld r0, HSTATE_SCRATCH2(r13)
1212 ld r3, HSTATE_SCRATCH0(r13)
1218 ld r3, HSTATE_CFAR(r13)
1222 ld r4, HSTATE_PPR(r13)
1227 ld r1, HSTATE_HOST_R1(r13)
1228 ld r2, PACATOC(r13)
1264 ld r5, VCPU_GPR(R5)(r9)
1265 ld r6, VCPU_GPR(R6)(r9)
1266 ld r7, VCPU_GPR(R7)(r9)
1267 ld r8, VCPU_GPR(R8)(r9)
1281 ld r3, HSTATE_SCRATCH1(r13)
1341 ld r9, HSTATE_KVM_VCPU(r13)
1384 4: ld r5, HSTATE_KVM_VCORE(r13)
1421 ld r10, HSTATE_XIVE_TIMA_VIRT(r13)
1430 2: ld r10, HSTATE_XIVE_TIMA_PHYS(r13)
1458 ld r9, HSTATE_KVM_VCPU(r13)
1474 ld r5, VCPU_KVM(r9)
1503 ld r7,VCPU_PURR(r9)
1504 ld r8,VCPU_SPURR(r9)
1514 ld r3,HSTATE_PURR(r13)
1515 ld r4,HSTATE_SPURR(r13)
1522 ld r3, HSTATE_KVM_VCORE(r13)
1527 ld r4, VCORE_LPCR(r3)
1534 ld r4,VCORE_TB_OFFSET(r3)
1579 ld r7, STACK_SLOT_HFSCR(r1)
1610 ld r7, HSTATE_DSCR(r13)
1658 ld r8, VCPU_VPA(r9) /* do they have a VPA? */
1750 ld r5, STACK_SLOT_CIABR(r1)
1751 ld r6, STACK_SLOT_DAWR(r1)
1752 ld r7, STACK_SLOT_DAWRX(r1)
1758 ld r5, STACK_SLOT_TID(r1)
1759 ld r6, STACK_SLOT_PSSCR(r1)
1760 ld r7, STACK_SLOT_PID(r1)
1761 ld r8, STACK_SLOT_IAMR(r1)
1772 ld r5, VCPU_KVM(r9)
1796 ld r6,VCPU_KVM(r9)
1828 ld r5,HSTATE_KVM_VCORE(r13)
1829 ld r4,VCORE_KVM(r5) /* pointer to struct kvm */
1856 ld r6,KVM_HOST_SDR1(r4)
1894 ld r8,VCORE_TB_OFFSET(r5)
1910 30: ld r5,HSTATE_KVM_VCORE(r13)
1911 ld r4,VCORE_KVM(r5) /* pointer to struct kvm */
1914 ld r0, VCORE_PCR(r5)
1925 16: ld r8,KVM_HOST_LPCR(r4)
1933 ld r8,PACA_SLBSHADOWPTR(r13)
1948 ld r4, HSTATE_KVM_VCPU(r13)
1960 ld r0, SFS+PPC_LR_STKOFF(r1)
1995 ld r3, VCPU_KVM(r9)
2026 ld r9, HSTATE_KVM_VCPU(r13)
2027 ld r10, VCPU_PC(r9)
2028 ld r11, VCPU_MSR(r9)
2038 ld r4, VCPU_FAULT_DAR(r9)
2048 6: ld r7, VCPU_CTR(r9)
2049 ld r8, VCPU_XER(r9)
2055 3: ld r5, VCPU_KVM(r9) /* not relocated, use VRMA */
2056 ld r5, KVM_VRMA_SLB_V(r5)
2095 ld r3, VCPU_KVM(r9)
2118 ld r9, HSTATE_KVM_VCPU(r13)
2119 ld r10, VCPU_PC(r9)
2120 ld r11, VCPU_MSR(r9)
2136 3: ld r6, VCPU_KVM(r9) /* not relocated, use VRMA */
2137 ld r5, KVM_VRMA_SLB_V(r6)
2150 ld r3,VCPU_GPR(R3)(r9)
2158 ld r4, VCPU_KVM(r9)
2162 ld r0, KVM_ENABLED_HCALLS(r4)
2175 ld r4,VCPU_GPR(R4)(r9)
2179 ld r4,HSTATE_KVM_VCPU(r13)
2181 ld r10,VCPU_PC(r4)
2182 ld r11,VCPU_MSR(r4)
2198 ld r9, HSTATE_KVM_VCPU(r13)
2469 ld r5,HSTATE_KVM_VCORE(r13)
2524 ld r9, HSTATE_KVM_VCPU(r13)
2539 ld r6, HSTATE_KVM_VCORE(r13)
2540 ld r6, VCORE_LPCR(r6)
2552 ld r4, HSTATE_KVM_VCPU(r13)
2553 ld r5, HSTATE_KVM_VCORE(r13)
2554 ld r6, VCORE_TB_OFFSET(r5)
2559 ld r4, HSTATE_KVM_VCPU(r13)
2607 ld r0, HSTATE_SCRATCH0(r13)
2624 ld r4, HSTATE_KVM_VCPU(r13)
2627 ld r1, HSTATE_HOST_R1(r13)
2647 ld r3, VCPU_DEC_EXPIRES(r4)
2648 ld r5, HSTATE_KVM_VCORE(r13)
2649 ld r6, VCORE_TB_OFFSET(r5)
2656 ld r14, VCPU_GPR(R14)(r4)
2657 ld r15, VCPU_GPR(R15)(r4)
2658 ld r16, VCPU_GPR(R16)(r4)
2659 ld r17, VCPU_GPR(R17)(r4)
2660 ld r18, VCPU_GPR(R18)(r4)
2661 ld r19, VCPU_GPR(R19)(r4)
2662 ld r20, VCPU_GPR(R20)(r4)
2663 ld r21, VCPU_GPR(R21)(r4)
2664 ld r22, VCPU_GPR(R22)(r4)
2665 ld r23, VCPU_GPR(R23)(r4)
2666 ld r24, VCPU_GPR(R24)(r4)
2667 ld r25, VCPU_GPR(R25)(r4)
2668 ld r26, VCPU_GPR(R26)(r4)
2669 ld r27, VCPU_GPR(R27)(r4)
2670 ld r28, VCPU_GPR(R28)(r4)
2671 ld r29, VCPU_GPR(R29)(r4)
2672 ld r30, VCPU_GPR(R30)(r4)
2673 ld r31, VCPU_GPR(R31)(r4)
2686 ld r4, HSTATE_KVM_VCPU(r13)
2689 34: ld r5,HSTATE_KVM_VCORE(r13)
2725 ld r9, HSTATE_KVM_VCPU(r13)
2733 ld r9, HSTATE_KVM_VCPU(r13)
2752 ld r11, VCPU_MSR(r9)
2756 ld r10, VCPU_KVM(r9)
2764 ld r10, VCPU_PC(r9)
2856 ld r0, PPC_MIN_STKFRM+PPC_LR_STKOFF(r1)
2949 ld r5, VCPU_MSR(r9)
2967 ld r9, HSTATE_KVM_VCPU(r13)
2978 ld r29, HSTATE_DSCR(r13)
2993 ld r4, PACATMSCRATCH(r13)
2997 ld r1, HSTATE_HOST_R1(r13)
2998 ld r2, PACATOC(r13)
3044 ld r0, PPC_LR_STKOFF(r1)
3071 ld r5, VCPU_TFHAR(r4)
3072 ld r6, VCPU_TFIAR(r4)
3073 ld r7, VCPU_TEXASR(r4)
3078 ld r5, VCPU_MSR(r4)
3106 ld r5, VCPU_LR_TM(r4)
3108 ld r7, VCPU_CTR_TM(r4)
3109 ld r8, VCPU_AMR_TM(r4)
3110 ld r9, VCPU_TAR_TM(r4)
3111 ld r10, VCPU_XER_TM(r4)
3124 ld r29, VCPU_DSCR_TM(r4)
3125 ld r30, VCPU_PPR_TM(r4)
3136 ld reg, VCPU_GPRS_TM(reg)(r31)
3144 ld 29, VCPU_GPRS_TM(29)(r31)
3145 ld 30, VCPU_GPRS_TM(30)(r31)
3146 ld 31, VCPU_GPRS_TM(31)(r31)
3154 ld r29, HSTATE_DSCR(r13)
3156 ld r4, HSTATE_KVM_VCPU(r13)
3157 ld r1, HSTATE_HOST_R1(r13)
3158 ld r2, PACATMSCRATCH(r13)
3164 ld r0, PPC_LR_STKOFF(r1)
3187 ld r11, VCPU_INTR_MSR(r9)
3218 ld r5, HSTATE_KVM_VCORE(r13)
3222 ld r6, VCORE_TB_OFFSET(r5) /* subtract timebase offset */
3234 ld r5, HSTATE_KVM_VCORE(r13)
3238 ld r8, VCORE_TB_OFFSET(r5) /* subtract timebase offset */
3239 4: ld r5, VCPU_CUR_ACTIVITY(r4)
3240 ld r6, VCPU_ACTIVITY_START(r4)
3248 ld r8, TAS_SEQCOUNT(r5)
3253 ld r7, TAS_TOTAL(r5)
3256 ld r6, TAS_MIN(r5)
3257 ld r7, TAS_MAX(r5)