Lines Matching refs:read_config
839 eeh_ops->read_config(pdn, aer + PCI_ERR_UNCOR_MASK, in __pnv_eeh_bridge_reset()
846 eeh_ops->read_config(pdn, PCI_BRIDGE_CONTROL, 2, &ctrl); in __pnv_eeh_bridge_reset()
853 eeh_ops->read_config(pdn, PCI_BRIDGE_CONTROL, 2, &ctrl); in __pnv_eeh_bridge_reset()
861 eeh_ops->read_config(pdn, aer + PCI_ERR_UNCOR_MASK, in __pnv_eeh_bridge_reset()
933 eeh_ops->read_config(pdn, pos, 2, &status); in pnv_eeh_wait_for_pending()
954 eeh_ops->read_config(pdn, edev->pcie_cap + PCI_EXP_DEVCAP, 4, ®); in pnv_eeh_do_flr()
964 eeh_ops->read_config(pdn, edev->pcie_cap + PCI_EXP_DEVCTL, in pnv_eeh_do_flr()
972 eeh_ops->read_config(pdn, edev->pcie_cap + PCI_EXP_DEVCTL, in pnv_eeh_do_flr()
992 eeh_ops->read_config(pdn, edev->af_cap + PCI_AF_CAP, 1, &cap); in pnv_eeh_do_af_flr()
1647 eeh_ops->read_config(pdn, edev->pcie_cap + PCI_EXP_DEVCTL, in pnv_eeh_restore_vf_config()
1655 eeh_ops->read_config(pdn, edev->pcie_cap + PCI_EXP_DEVCAP2, in pnv_eeh_restore_vf_config()
1658 eeh_ops->read_config(pdn, in pnv_eeh_restore_vf_config()
1669 eeh_ops->read_config(pdn, PCI_COMMAND, 2, &cmd); in pnv_eeh_restore_vf_config()
1675 eeh_ops->read_config(pdn, edev->pcie_cap + PCI_EXP_DEVCTL, in pnv_eeh_restore_vf_config()
1687 eeh_ops->read_config(pdn, edev->aer_cap + PCI_ERR_CAP, in pnv_eeh_restore_vf_config()
1744 .read_config = pnv_eeh_read_config,