514 struct x86_pmu {  struct
518 	const char	*name;
519 	int		version;
520 	int		(*handle_irq)(struct pt_regs *);
521 	void		(*disable_all)(void);
522 	void		(*enable_all)(int added);
523 	void		(*enable)(struct perf_event *);
524 	void		(*disable)(struct perf_event *);
525 	void		(*add)(struct perf_event *);
526 	void		(*del)(struct perf_event *);
527 	int		(*hw_config)(struct perf_event *event);
528 	int		(*schedule_events)(struct cpu_hw_events *cpuc, int n, int *assign);
529 	unsigned	eventsel;
530 	unsigned	perfctr;
531 	int		(*addr_offset)(int index, bool eventsel);
532 	int		(*rdpmc_index)(int index);
533 	u64		(*event_map)(int);
534 	int		max_events;
535 	int		num_counters;
536 	int		num_counters_fixed;
537 	int		cntval_bits;
561 	struct x86_pmu_quirk *quirks;  argument
562 	int		perfctr_second_write;
563 	bool		late_ack;
564 	u64		(*limit_period)(struct perf_event *event, u64 l);
569 	int		attr_rdpmc_broken;
570 	int		attr_rdpmc;
571 	struct attribute **format_attrs;
572 	struct attribute **event_attrs;
573 	struct attribute **caps_attrs;
575 	ssize_t		(*events_sysfs_show)(char *page, u64 config);
576 	struct attribute **cpu_events;
578 	unsigned long	attr_freeze_on_smi;
579 	struct attribute **attrs;
584 	int		(*cpu_prepare)(int cpu);
585 	void		(*cpu_starting)(int cpu);
586 	void		(*cpu_dying)(int cpu);
587 	void		(*cpu_dead)(int cpu);
589 	void		(*check_microcode)(void);
590 	void		(*sched_task)(struct perf_event_context *ctx,
596 	u64			intel_ctrl;
597 	union perf_capabilities intel_cap;
602 	unsigned int	bts		:1,
603 			bts_active	:1,
604 			pebs		:1,
605 			pebs_active	:1,
606 			pebs_broken	:1,
607 			pebs_prec_dist	:1,
608 			pebs_no_tlb	:1;
609 	int		pebs_record_size;
610 	int		pebs_buffer_size;
611 	void		(*drain_pebs)(struct pt_regs *regs);
612 	struct event_constraint *pebs_constraints;
613 	void		(*pebs_aliases)(struct perf_event *event);
614 	int 		max_pebs_events;
615 	unsigned long	free_running_flags;
620 	unsigned long	lbr_tos, lbr_from, lbr_to; /* MSR base regs       */
621 	int		lbr_nr;			   /* hardware stack size */
622 	u64		lbr_sel_mask;		   /* LBR_SELECT valid bits */
623 	const int	*lbr_sel_map;		   /* lbr_select mappings */
624 	bool		lbr_double_abort;	   /* duplicated lbr aborts */
625 	bool		lbr_pt_coexist;		   /* (LBR|BTS) may coexist with PT */
630 	atomic_t	lbr_exclusive[x86_lbr_exclusive_max];
635 	unsigned int	amd_nb_constraints : 1;
640 	struct extra_reg *extra_regs;
641 	unsigned int flags;
669 	__quirk.next = x86_pmu.quirks;					\  argument