Lines Matching refs:c
48 void check_mpx_erratum(struct cpuinfo_x86 *c) in check_mpx_erratum() argument
63 if (cpu_has(c, X86_FEATURE_MPX) && !cpu_has(c, X86_FEATURE_SMEP)) { in check_mpx_erratum()
78 static void probe_xeon_phi_r3mwait(struct cpuinfo_x86 *c) in probe_xeon_phi_r3mwait() argument
84 if (c->x86 != 6) in probe_xeon_phi_r3mwait()
86 switch (c->x86_model) { in probe_xeon_phi_r3mwait()
97 set_cpu_cap(c, X86_FEATURE_RING3MWAIT); in probe_xeon_phi_r3mwait()
101 if (c == &boot_cpu_data) in probe_xeon_phi_r3mwait()
142 static bool bad_spectre_microcode(struct cpuinfo_x86 *c) in bad_spectre_microcode() argument
150 if (cpu_has(c, X86_FEATURE_HYPERVISOR)) in bad_spectre_microcode()
153 if (c->x86 != 6) in bad_spectre_microcode()
157 if (c->x86_model == spectre_bad_microcodes[i].model && in bad_spectre_microcode()
158 c->x86_stepping == spectre_bad_microcodes[i].stepping) in bad_spectre_microcode()
159 return (c->microcode <= spectre_bad_microcodes[i].microcode); in bad_spectre_microcode()
164 static void early_init_intel(struct cpuinfo_x86 *c) in early_init_intel() argument
169 if (c->x86 > 6 || (c->x86 == 6 && c->x86_model >= 0xd)) { in early_init_intel()
172 c->cpuid_level = cpuid_eax(0); in early_init_intel()
173 get_cpu_cap(c); in early_init_intel()
177 if ((c->x86 == 0xf && c->x86_model >= 0x03) || in early_init_intel()
178 (c->x86 == 0x6 && c->x86_model >= 0x0e)) in early_init_intel()
179 set_cpu_cap(c, X86_FEATURE_CONSTANT_TSC); in early_init_intel()
181 if (c->x86 >= 6 && !cpu_has(c, X86_FEATURE_IA64)) in early_init_intel()
182 c->microcode = intel_get_microcode_revision(); in early_init_intel()
185 if ((cpu_has(c, X86_FEATURE_SPEC_CTRL) || in early_init_intel()
186 cpu_has(c, X86_FEATURE_INTEL_STIBP) || in early_init_intel()
187 cpu_has(c, X86_FEATURE_IBRS) || cpu_has(c, X86_FEATURE_IBPB) || in early_init_intel()
188 cpu_has(c, X86_FEATURE_STIBP)) && bad_spectre_microcode(c)) { in early_init_intel()
208 if (c->x86 == 6 && c->x86_model == 0x1c && c->x86_stepping <= 2 && in early_init_intel()
209 c->microcode < 0x20e) { in early_init_intel()
211 clear_cpu_cap(c, X86_FEATURE_PSE); in early_init_intel()
215 set_cpu_cap(c, X86_FEATURE_SYSENTER32); in early_init_intel()
218 if (c->x86 == 15 && c->x86_cache_alignment == 64) in early_init_intel()
219 c->x86_cache_alignment = 128; in early_init_intel()
223 if (c->x86 == 0xF && c->x86_model == 0x3 in early_init_intel()
224 && (c->x86_stepping == 0x3 || c->x86_stepping == 0x4)) in early_init_intel()
225 c->x86_phys_bits = 36; in early_init_intel()
234 if (c->x86_power & (1 << 8)) { in early_init_intel()
235 set_cpu_cap(c, X86_FEATURE_CONSTANT_TSC); in early_init_intel()
236 set_cpu_cap(c, X86_FEATURE_NONSTOP_TSC); in early_init_intel()
240 if (c->x86 == 6) { in early_init_intel()
241 switch (c->x86_model) { in early_init_intel()
245 set_cpu_cap(c, X86_FEATURE_NONSTOP_TSC_S3); in early_init_intel()
262 if (c->x86 == 6 && c->x86_model < 15) in early_init_intel()
263 clear_cpu_cap(c, X86_FEATURE_PAT); in early_init_intel()
269 if (c->x86 > 6 || (c->x86 == 6 && c->x86_model >= 0xd)) { in early_init_intel()
288 if (c->x86 == 5 && c->x86_model == 9) { in early_init_intel()
293 if (c->cpuid_level >= 0x00000001) { in early_init_intel()
303 c->x86_coreid_bits = get_count_order((ebx >> 16) & 0xff); in early_init_intel()
306 check_mpx_erratum(c); in early_init_intel()
312 if (detect_extended_topology_early(c) < 0) in early_init_intel()
313 detect_ht_early(c); in early_init_intel()
336 static void intel_smp_check(struct cpuinfo_x86 *c) in intel_smp_check() argument
339 if (!c->cpu_index) in intel_smp_check()
345 if (c->x86 == 5 && in intel_smp_check()
346 c->x86_stepping >= 1 && c->x86_stepping <= 4 && in intel_smp_check()
347 c->x86_model <= 3) { in intel_smp_check()
364 static void intel_workarounds(struct cpuinfo_x86 *c) in intel_workarounds() argument
373 clear_cpu_bug(c, X86_BUG_F00F); in intel_workarounds()
374 if (c->x86 == 5 && c->x86_model < 9) { in intel_workarounds()
377 set_cpu_bug(c, X86_BUG_F00F); in intel_workarounds()
389 if ((c->x86<<8 | c->x86_model<<4 | c->x86_stepping) < 0x633) in intel_workarounds()
390 clear_cpu_cap(c, X86_FEATURE_SEP); in intel_workarounds()
399 set_cpu_cap(c, X86_FEATURE_PAE); in intel_workarounds()
407 if ((c->x86 == 15) && (c->x86_model == 1) && (c->x86_stepping == 1)) { in intel_workarounds()
421 if (boot_cpu_has(X86_FEATURE_APIC) && (c->x86<<8 | c->x86_model<<4) == 0x520 && in intel_workarounds()
422 (c->x86_stepping < 0x6 || c->x86_stepping == 0xb)) in intel_workarounds()
423 set_cpu_bug(c, X86_BUG_11AP); in intel_workarounds()
430 switch (c->x86) { in intel_workarounds()
444 intel_smp_check(c); in intel_workarounds()
447 static void intel_workarounds(struct cpuinfo_x86 *c) in intel_workarounds() argument
452 static void srat_detect_node(struct cpuinfo_x86 *c) in srat_detect_node() argument
472 static int intel_num_cpu_cores(struct cpuinfo_x86 *c) in intel_num_cpu_cores() argument
476 if (!IS_ENABLED(CONFIG_SMP) || c->cpuid_level < 4) in intel_num_cpu_cores()
487 static void detect_vmx_virtcap(struct cpuinfo_x86 *c) in detect_vmx_virtcap() argument
499 clear_cpu_cap(c, X86_FEATURE_TPR_SHADOW); in detect_vmx_virtcap()
500 clear_cpu_cap(c, X86_FEATURE_VNMI); in detect_vmx_virtcap()
501 clear_cpu_cap(c, X86_FEATURE_FLEXPRIORITY); in detect_vmx_virtcap()
502 clear_cpu_cap(c, X86_FEATURE_EPT); in detect_vmx_virtcap()
503 clear_cpu_cap(c, X86_FEATURE_VPID); in detect_vmx_virtcap()
508 set_cpu_cap(c, X86_FEATURE_TPR_SHADOW); in detect_vmx_virtcap()
510 set_cpu_cap(c, X86_FEATURE_VNMI); in detect_vmx_virtcap()
517 set_cpu_cap(c, X86_FEATURE_FLEXPRIORITY); in detect_vmx_virtcap()
519 set_cpu_cap(c, X86_FEATURE_EPT); in detect_vmx_virtcap()
521 set_cpu_cap(c, X86_FEATURE_VPID); in detect_vmx_virtcap()
525 static void init_intel_energy_perf(struct cpuinfo_x86 *c) in init_intel_energy_perf() argument
533 if (!cpu_has(c, X86_FEATURE_EPB)) in init_intel_energy_perf()
546 static void intel_bsp_resume(struct cpuinfo_x86 *c) in intel_bsp_resume() argument
552 init_intel_energy_perf(c); in intel_bsp_resume()
555 static void init_cpuid_fault(struct cpuinfo_x86 *c) in init_cpuid_fault() argument
561 set_cpu_cap(c, X86_FEATURE_CPUID_FAULT); in init_cpuid_fault()
565 static void init_intel_misc_features(struct cpuinfo_x86 *c) in init_intel_misc_features() argument
576 init_cpuid_fault(c); in init_intel_misc_features()
577 probe_xeon_phi_r3mwait(c); in init_intel_misc_features()
583 static void init_intel(struct cpuinfo_x86 *c) in init_intel() argument
587 early_init_intel(c); in init_intel()
589 intel_workarounds(c); in init_intel()
596 detect_extended_topology(c); in init_intel()
598 if (!cpu_has(c, X86_FEATURE_XTOPOLOGY)) { in init_intel()
603 c->x86_max_cores = intel_num_cpu_cores(c); in init_intel()
605 detect_ht(c); in init_intel()
609 l2 = init_intel_cacheinfo(c); in init_intel()
613 cpu_detect_cache_sizes(c); in init_intel()
614 l2 = c->x86_cache_size; in init_intel()
617 if (c->cpuid_level > 9) { in init_intel()
621 set_cpu_cap(c, X86_FEATURE_ARCH_PERFMON); in init_intel()
624 if (cpu_has(c, X86_FEATURE_XMM2)) in init_intel()
625 set_cpu_cap(c, X86_FEATURE_LFENCE_RDTSC); in init_intel()
631 set_cpu_cap(c, X86_FEATURE_BTS); in init_intel()
633 set_cpu_cap(c, X86_FEATURE_PEBS); in init_intel()
636 if (c->x86 == 6 && boot_cpu_has(X86_FEATURE_CLFLUSH) && in init_intel()
637 (c->x86_model == 29 || c->x86_model == 46 || c->x86_model == 47)) in init_intel()
638 set_cpu_bug(c, X86_BUG_CLFLUSH_MONITOR); in init_intel()
640 if (c->x86 == 6 && boot_cpu_has(X86_FEATURE_MWAIT) && in init_intel()
641 ((c->x86_model == INTEL_FAM6_ATOM_GOLDMONT))) in init_intel()
642 set_cpu_bug(c, X86_BUG_MONITOR); in init_intel()
645 if (c->x86 == 15) in init_intel()
646 c->x86_cache_alignment = c->x86_clflush_size * 2; in init_intel()
647 if (c->x86 == 6) in init_intel()
648 set_cpu_cap(c, X86_FEATURE_REP_GOOD); in init_intel()
655 if (c->x86 == 6) { in init_intel()
658 switch (c->x86_model) { in init_intel()
669 else if (c->x86_stepping == 0 || c->x86_stepping == 5) in init_intel()
680 strcpy(c->x86_model_id, p); in init_intel()
683 if (c->x86 == 15) in init_intel()
684 set_cpu_cap(c, X86_FEATURE_P4); in init_intel()
685 if (c->x86 == 6) in init_intel()
686 set_cpu_cap(c, X86_FEATURE_P3); in init_intel()
690 srat_detect_node(c); in init_intel()
692 if (cpu_has(c, X86_FEATURE_VMX)) in init_intel()
693 detect_vmx_virtcap(c); in init_intel()
695 init_intel_energy_perf(c); in init_intel()
697 init_intel_misc_features(c); in init_intel()
706 static unsigned int intel_size_cache(struct cpuinfo_x86 *c, unsigned int size) in intel_size_cache() argument
714 if ((c->x86 == 6) && (c->x86_model == 11) && (size == 0)) in intel_size_cache()
721 if ((c->x86 == 5) && (c->x86_model == 9)) in intel_size_cache()
875 static void intel_detect_tlb(struct cpuinfo_x86 *c) in intel_detect_tlb() argument
881 if (c->cpuid_level < 2) in intel_detect_tlb()