68 #define F(x) bit(X86_FEATURE_##x)  macro
84 		best->ecx &= ~F(OSXSAVE);  in kvm_update_cpuid()
86 			best->ecx |= F(OSXSAVE);  in kvm_update_cpuid()
89 	best->edx &= ~F(APIC);  in kvm_update_cpuid()
91 		best->edx |= F(APIC);  in kvm_update_cpuid()
94 		if (best->ecx & F(TSC_DEADLINE_TIMER))  in kvm_update_cpuid()
104 			best->ecx &= ~F(OSPKE);  in kvm_update_cpuid()
106 				best->ecx |= F(OSPKE);  in kvm_update_cpuid()
123 	if (best && (best->eax & (F(XSAVES) | F(XSAVEC))))  in kvm_update_cpuid()
167 	if (entry && (entry->edx & F(NX)) && !is_efer_nx()) {  in cpuid_fix_nx_cap()
168 		entry->edx &= ~F(NX);  in cpuid_fix_nx_cap()
298 		entry->ecx = F(MOVBE);  in __do_cpuid_ent_emulated()
304 			entry->ecx = F(RDPID);  in __do_cpuid_ent_emulated()
320 	unsigned f_nx = is_efer_nx() ? F(NX) : 0;  in __do_cpuid_ent()
323 				? F(GBPAGES) : 0;  in __do_cpuid_ent()
324 	unsigned f_lm = F(LM);  in __do_cpuid_ent()
329 	unsigned f_rdtscp = kvm_x86_ops->rdtscp_supported() ? F(RDTSCP) : 0;  in __do_cpuid_ent()
330 	unsigned f_invpcid = kvm_x86_ops->invpcid_supported() ? F(INVPCID) : 0;  in __do_cpuid_ent()
331 	unsigned f_mpx = kvm_mpx_supported() ? F(MPX) : 0;  in __do_cpuid_ent()
332 	unsigned f_xsaves = kvm_x86_ops->xsaves_supported() ? F(XSAVES) : 0;  in __do_cpuid_ent()
336 		F(FPU) | F(VME) | F(DE) | F(PSE) |  in __do_cpuid_ent()
337 		F(TSC) | F(MSR) | F(PAE) | F(MCE) |  in __do_cpuid_ent()
338 		F(CX8) | F(APIC) | 0 /* Reserved */ | F(SEP) |  in __do_cpuid_ent()
339 		F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |  in __do_cpuid_ent()
340 		F(PAT) | F(PSE36) | 0 /* PSN */ | F(CLFLUSH) |  in __do_cpuid_ent()
341 		0 /* Reserved, DS, ACPI */ | F(MMX) |  in __do_cpuid_ent()
342 		F(FXSR) | F(XMM) | F(XMM2) | F(SELFSNOOP) |  in __do_cpuid_ent()
346 		F(FPU) | F(VME) | F(DE) | F(PSE) |  in __do_cpuid_ent()
347 		F(TSC) | F(MSR) | F(PAE) | F(MCE) |  in __do_cpuid_ent()
348 		F(CX8) | F(APIC) | 0 /* Reserved */ | F(SYSCALL) |  in __do_cpuid_ent()
349 		F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |  in __do_cpuid_ent()
350 		F(PAT) | F(PSE36) | 0 /* Reserved */ |  in __do_cpuid_ent()
351 		f_nx | 0 /* Reserved */ | F(MMXEXT) | F(MMX) |  in __do_cpuid_ent()
352 		F(FXSR) | F(FXSR_OPT) | f_gbpages | f_rdtscp |  in __do_cpuid_ent()
353 		0 /* Reserved */ | f_lm | F(3DNOWEXT) | F(3DNOW);  in __do_cpuid_ent()
358 		F(XMM3) | F(PCLMULQDQ) | 0 /* DTES64, MONITOR */ |  in __do_cpuid_ent()
360 		0 /* TM2 */ | F(SSSE3) | 0 /* CNXT-ID */ | 0 /* Reserved */ |  in __do_cpuid_ent()
361 		F(FMA) | F(CX16) | 0 /* xTPR Update, PDCM */ |  in __do_cpuid_ent()
362 		F(PCID) | 0 /* Reserved, DCA */ | F(XMM4_1) |  in __do_cpuid_ent()
363 		F(XMM4_2) | F(X2APIC) | F(MOVBE) | F(POPCNT) |  in __do_cpuid_ent()
364 		0 /* Reserved*/ | F(AES) | F(XSAVE) | 0 /* OSXSAVE */ | F(AVX) |  in __do_cpuid_ent()
365 		F(F16C) | F(RDRAND);  in __do_cpuid_ent()
368 		F(LAHF_LM) | F(CMP_LEGACY) | 0 /*SVM*/ | 0 /* ExtApicSpace */ |  in __do_cpuid_ent()
369 		F(CR8_LEGACY) | F(ABM) | F(SSE4A) | F(MISALIGNSSE) |  in __do_cpuid_ent()
370 		F(3DNOWPREFETCH) | F(OSVW) | 0 /* IBS */ | F(XOP) |  in __do_cpuid_ent()
371 		0 /* SKINIT, WDT, LWP */ | F(FMA4) | F(TBM);  in __do_cpuid_ent()
375 		F(AMD_IBPB) | F(AMD_IBRS) | F(AMD_SSBD) | F(VIRT_SSBD) |  in __do_cpuid_ent()
376 		F(AMD_SSB_NO) | F(AMD_STIBP);  in __do_cpuid_ent()
380 		F(XSTORE) | F(XSTORE_EN) | F(XCRYPT) | F(XCRYPT_EN) |  in __do_cpuid_ent()
381 		F(ACE2) | F(ACE2_EN) | F(PHE) | F(PHE_EN) |  in __do_cpuid_ent()
382 		F(PMM) | F(PMM_EN);  in __do_cpuid_ent()
386 		F(FSGSBASE) | F(BMI1) | F(HLE) | F(AVX2) | F(SMEP) |  in __do_cpuid_ent()
387 		F(BMI2) | F(ERMS) | f_invpcid | F(RTM) | f_mpx | F(RDSEED) |  in __do_cpuid_ent()
388 		F(ADX) | F(SMAP) | F(AVX512IFMA) | F(AVX512F) | F(AVX512PF) |  in __do_cpuid_ent()
389 		F(AVX512ER) | F(AVX512CD) | F(CLFLUSHOPT) | F(CLWB) | F(AVX512DQ) |  in __do_cpuid_ent()
390 		F(SHA_NI) | F(AVX512BW) | F(AVX512VL);  in __do_cpuid_ent()
394 		F(XSAVEOPT) | F(XSAVEC) | F(XGETBV1) | f_xsaves;  in __do_cpuid_ent()
398 		F(AVX512VBMI) | F(LA57) | F(PKU) |  in __do_cpuid_ent()
399 		0 /*OSPKE*/ | F(AVX512_VPOPCNTDQ);  in __do_cpuid_ent()
403 		F(AVX512_4VNNIW) | F(AVX512_4FMAPS) | F(SPEC_CTRL) |  in __do_cpuid_ent()
404 		F(SPEC_CTRL_SSBD) | F(ARCH_CAPABILITIES) | F(INTEL_STIBP) |  in __do_cpuid_ent()
405 		F(MD_CLEAR);  in __do_cpuid_ent()
429 		entry->ecx |= F(X2APIC);  in __do_cpuid_ent()
483 			entry->ebx |= F(TSC_ADJUST);  in __do_cpuid_ent()
488 				entry->ecx &= ~F(PKU);  in __do_cpuid_ent()
494 				entry->edx |= F(SPEC_CTRL);  in __do_cpuid_ent()
496 				entry->edx |= F(INTEL_STIBP);  in __do_cpuid_ent()
498 				entry->edx |= F(SPEC_CTRL_SSBD);  in __do_cpuid_ent()
503 			entry->edx |= F(ARCH_CAPABILITIES);  in __do_cpuid_ent()
585 				if (entry[i].eax & (F(XSAVES)|F(XSAVEC)))  in __do_cpuid_ent()
660 			entry->ebx |= F(AMD_IBPB);  in __do_cpuid_ent()
662 			entry->ebx |= F(AMD_IBRS);  in __do_cpuid_ent()
664 			entry->ebx |= F(VIRT_SSBD);  in __do_cpuid_ent()
673 			entry->ebx |= F(VIRT_SSBD);  in __do_cpuid_ent()
724 #undef F