31 #define div_mask(width)	((1 << (width)) - 1)  argument
34 				      u8 width)  in _get_table_maxdiv()  argument
36 	unsigned int maxdiv = 0, mask = div_mask(width);  in _get_table_maxdiv()
56 static unsigned int _get_maxdiv(const struct clk_div_table *table, u8 width,  in _get_maxdiv()  argument
60 		return div_mask(width);  in _get_maxdiv()
62 		return 1 << div_mask(width);  in _get_maxdiv()
64 		return _get_table_maxdiv(table, width);  in _get_maxdiv()
65 	return div_mask(width) + 1;  in _get_maxdiv()
80 			     unsigned int val, unsigned long flags, u8 width)  in _get_div()  argument
87 		return val ? val : div_mask(width) + 1;  in _get_div()
105 			     unsigned int div, unsigned long flags, u8 width)  in _get_val()  argument
112 		return (div == div_mask(width) + 1) ? 0 : div;  in _get_val()
121 				  unsigned long flags, unsigned long width)  in divider_recalc_rate()  argument
125 	div = _get_div(table, val, flags, width);  in divider_recalc_rate()
144 	val &= div_mask(divider->width);  in clk_divider_recalc_rate()
147 				   divider->flags, divider->width);  in clk_divider_recalc_rate()
280 			       const struct clk_div_table *table, u8 width,  in clk_divider_bestdiv()  argument
290 	maxdiv = _get_maxdiv(table, width, flags);  in clk_divider_bestdiv()
327 		bestdiv = _get_maxdiv(table, width, flags);  in clk_divider_bestdiv()
337 			       u8 width, unsigned long flags)  in divider_round_rate_parent()  argument
341 	div = clk_divider_bestdiv(hw, parent, rate, prate, table, width, flags);  in divider_round_rate_parent()
356 		bestdiv &= div_mask(divider->width);  in clk_divider_round_rate()
358 			divider->width);  in clk_divider_round_rate()
363 				  divider->width, divider->flags);  in clk_divider_round_rate()
367 		    const struct clk_div_table *table, u8 width,  in divider_get_val()  argument
377 	value = _get_val(table, div, flags, width);  in divider_get_val()
379 	return min_t(unsigned int, value, div_mask(width));  in divider_get_val()
392 				divider->width, divider->flags);  in clk_divider_set_rate()
402 		val = div_mask(divider->width) << (divider->shift + 16);  in clk_divider_set_rate()
405 		val &= ~(div_mask(divider->width) << divider->shift);  in clk_divider_set_rate()
433 		void __iomem *reg, u8 shift, u8 width,  in _register_divider()  argument
443 		if (width + shift > 16) {  in _register_divider()
466 	div->width = width;  in _register_divider()
497 		void __iomem *reg, u8 shift, u8 width,  in clk_register_divider()  argument
503 			width, clk_divider_flags, NULL, lock);  in clk_register_divider()
524 		void __iomem *reg, u8 shift, u8 width,  in clk_hw_register_divider()  argument
528 			width, clk_divider_flags, NULL, lock);  in clk_hw_register_divider()
548 		void __iomem *reg, u8 shift, u8 width,  in clk_register_divider_table()  argument
555 			width, clk_divider_flags, table, lock);  in clk_register_divider_table()
578 		void __iomem *reg, u8 shift, u8 width,  in clk_hw_register_divider_table()  argument
583 			width, clk_divider_flags, table, lock);  in clk_hw_register_divider_table()