86 				unsigned long parent_rate)  in xgene_clk_pll_recalc_rate()  argument
105 			fvco = parent_rate * (N_DIV_RD(pll) + 4);  in xgene_clk_pll_recalc_rate()
115 			fref = parent_rate / nref;  in xgene_clk_pll_recalc_rate()
124 		fvco = parent_rate * SC_N_DIV_RD(pll);  in xgene_clk_pll_recalc_rate()
127 		 clk_hw_get_name(hw), fvco / nout, parent_rate,  in xgene_clk_pll_recalc_rate()
255 					       unsigned long parent_rate)  in xgene_clk_pmd_recalc_rate()  argument
274 	ret = (u64)parent_rate;  in xgene_clk_pmd_recalc_rate()
286 		ret = (u64)parent_rate;  in xgene_clk_pmd_recalc_rate()
292 				     unsigned long *parent_rate)  in xgene_clk_pmd_round_rate()  argument
297 	if (!rate || rate >= *parent_rate)  in xgene_clk_pmd_round_rate()
298 		return *parent_rate;  in xgene_clk_pmd_round_rate()
302 	scale = DIV_ROUND_UP_ULL(ret, *parent_rate);  in xgene_clk_pmd_round_rate()
304 	ret = (u64)*parent_rate * scale;  in xgene_clk_pmd_round_rate()
311 				  unsigned long parent_rate)  in xgene_clk_pmd_set_rate()  argument
325 	scale = DIV_ROUND_UP_ULL(ret, (u64)parent_rate);  in xgene_clk_pmd_set_rate()
551 				unsigned long parent_rate)  in xgene_clk_recalc_rate()  argument
564 			parent_rate / data, parent_rate);  in xgene_clk_recalc_rate()
566 		return parent_rate / data;  in xgene_clk_recalc_rate()
569 			clk_hw_get_name(hw), parent_rate, parent_rate);  in xgene_clk_recalc_rate()
570 		return parent_rate;  in xgene_clk_recalc_rate()
575 				unsigned long parent_rate)  in xgene_clk_set_rate()  argument
588 		if (rate > parent_rate)  in xgene_clk_set_rate()
589 			rate = parent_rate;  in xgene_clk_set_rate()
590 		divider_save = divider = parent_rate / rate; /* Rounded down */  in xgene_clk_set_rate()
603 			parent_rate / divider_save);  in xgene_clk_set_rate()
611 	return parent_rate / divider_save;  in xgene_clk_set_rate()
618 	unsigned long parent_rate = *prate;  in xgene_clk_round_rate()  local
623 		if (rate > parent_rate)  in xgene_clk_round_rate()
624 			rate = parent_rate;  in xgene_clk_round_rate()
625 		divider = parent_rate / rate;   /* Rounded down */  in xgene_clk_round_rate()
630 	return parent_rate / divider;  in xgene_clk_round_rate()