Lines Matching refs:_name
84 #define PERIPH_GATE(_name, _bit) \ argument
85 struct clk_gate gate_##_name = { \
93 #define PERIPH_MUX(_name, _shift) \ argument
94 struct clk_mux mux_##_name = { \
103 #define PERIPH_DOUBLEDIV(_name, _reg1, _reg2, _shift1, _shift2) \ argument
104 struct clk_double_div rate_##_name = { \
114 #define PERIPH_DIV(_name, _reg, _shift, _table) \ argument
115 struct clk_divider rate_##_name = { \
124 #define PERIPH_CLK_FULL_DD(_name, _bit, _shift, _reg1, _reg2, _shift1, _shift2)\ argument
125 static PERIPH_GATE(_name, _bit); \
126 static PERIPH_MUX(_name, _shift); \
127 static PERIPH_DOUBLEDIV(_name, _reg1, _reg2, _shift1, _shift2);
129 #define PERIPH_CLK_FULL(_name, _bit, _shift, _reg, _shift1, _table) \ argument
130 static PERIPH_GATE(_name, _bit); \
131 static PERIPH_MUX(_name, _shift); \
132 static PERIPH_DIV(_name, _reg, _shift1, _table);
134 #define PERIPH_CLK_GATE_DIV(_name, _bit, _reg, _shift, _table) \ argument
135 static PERIPH_GATE(_name, _bit); \
136 static PERIPH_DIV(_name, _reg, _shift, _table);
138 #define PERIPH_CLK_MUX_DIV(_name, _shift, _reg, _shift_div, _table) \ argument
139 static PERIPH_MUX(_name, _shift); \
140 static PERIPH_DIV(_name, _reg, _shift_div, _table);
142 #define PERIPH_CLK_MUX_DD(_name, _shift, _reg1, _reg2, _shift1, _shift2)\ argument
143 static PERIPH_MUX(_name, _shift); \
144 static PERIPH_DOUBLEDIV(_name, _reg1, _reg2, _shift1, _shift2);
146 #define REF_CLK_FULL(_name) \ argument
147 { .name = #_name, \
151 .mux_hw = &mux_##_name.hw, \
152 .gate_hw = &gate_##_name.hw, \
153 .rate_hw = &rate_##_name.hw, \
156 #define REF_CLK_FULL_DD(_name) \ argument
157 { .name = #_name, \
161 .mux_hw = &mux_##_name.hw, \
162 .gate_hw = &gate_##_name.hw, \
163 .rate_hw = &rate_##_name.hw, \
167 #define REF_CLK_GATE(_name, _parent_name) \ argument
168 { .name = #_name, \
171 .gate_hw = &gate_##_name.hw, \
174 #define REF_CLK_GATE_DIV(_name, _parent_name) \ argument
175 { .name = #_name, \
178 .gate_hw = &gate_##_name.hw, \
179 .rate_hw = &rate_##_name.hw, \
182 #define REF_CLK_MUX_DIV(_name) \ argument
183 { .name = #_name, \
187 .mux_hw = &mux_##_name.hw, \
188 .rate_hw = &rate_##_name.hw, \
191 #define REF_CLK_MUX_DD(_name) \ argument
192 { .name = #_name, \
196 .mux_hw = &mux_##_name.hw, \
197 .rate_hw = &rate_##_name.hw, \