28 	u8 reg_mask[SYSCTRL_MAX_NUM_PARENTS];  member
41 	ret = ab8500_sysctrl_write(clk->reg_sel[0], clk->reg_mask[0],  in clk_sysctrl_prepare()
53 	if (ab8500_sysctrl_clear(clk->reg_sel[0], clk->reg_mask[0]))  in clk_sysctrl_unprepare()
73 					clk->reg_mask[old_index]);  in clk_sysctrl_set_parent()
80 					clk->reg_mask[index],  in clk_sysctrl_set_parent()
85 						clk->reg_mask[old_index],  in clk_sysctrl_set_parent()
122 				u8 *reg_mask,  in clk_reg_sysctrl()  argument
151 	clk->reg_mask[0] = reg_mask[0];  in clk_reg_sysctrl()
157 		clk->reg_mask[i] = reg_mask[i];  in clk_reg_sysctrl()
183 				u8 reg_mask,  in clk_reg_sysctrl_gate()  argument
192 			&reg_sel, &reg_mask, &reg_bits, 0, enable_delay_us,  in clk_reg_sysctrl_gate()
200 					u8 reg_mask,  in clk_reg_sysctrl_gate_fixed_rate()  argument
210 			&reg_sel, &reg_mask, &reg_bits,  in clk_reg_sysctrl_gate_fixed_rate()
220 				u8 *reg_mask,  in clk_reg_sysctrl_set_parent()  argument
225 			reg_sel, reg_mask, reg_bits, 0, 0, flags,  in clk_reg_sysctrl_set_parent()