Lines Matching refs:ndev
31 static void clear_nps_core_err_intr(struct nitrox_device *ndev) in clear_nps_core_err_intr() argument
36 value = nitrox_read_csr(ndev, NPS_CORE_INT); in clear_nps_core_err_intr()
37 nitrox_write_csr(ndev, NPS_CORE_INT, value); in clear_nps_core_err_intr()
39 dev_err_ratelimited(DEV(ndev), "NSP_CORE_INT 0x%016llx\n", value); in clear_nps_core_err_intr()
42 static void clear_nps_pkt_err_intr(struct nitrox_device *ndev) in clear_nps_pkt_err_intr() argument
48 pkt_int.value = nitrox_read_csr(ndev, NPS_PKT_INT); in clear_nps_pkt_err_intr()
49 dev_err_ratelimited(DEV(ndev), "NPS_PKT_INT 0x%016llx\n", in clear_nps_pkt_err_intr()
54 value = nitrox_read_csr(ndev, offset); in clear_nps_pkt_err_intr()
55 nitrox_write_csr(ndev, offset, value); in clear_nps_pkt_err_intr()
56 dev_err_ratelimited(DEV(ndev), in clear_nps_pkt_err_intr()
60 value = nitrox_read_csr(ndev, offset); in clear_nps_pkt_err_intr()
61 nitrox_write_csr(ndev, offset, value); in clear_nps_pkt_err_intr()
64 enable_pkt_solicit_port(ndev, i); in clear_nps_pkt_err_intr()
66 dev_err_ratelimited(DEV(ndev), in clear_nps_pkt_err_intr()
70 value = nitrox_read_csr(ndev, offset); in clear_nps_pkt_err_intr()
71 nitrox_write_csr(ndev, offset, value); in clear_nps_pkt_err_intr()
72 dev_err_ratelimited(DEV(ndev), in clear_nps_pkt_err_intr()
78 value = nitrox_read_csr(ndev, offset); in clear_nps_pkt_err_intr()
79 nitrox_write_csr(ndev, offset, value); in clear_nps_pkt_err_intr()
80 dev_err_ratelimited(DEV(ndev), in clear_nps_pkt_err_intr()
83 value = nitrox_read_csr(ndev, offset); in clear_nps_pkt_err_intr()
84 nitrox_write_csr(ndev, offset, value); in clear_nps_pkt_err_intr()
87 enable_pkt_input_ring(ndev, i); in clear_nps_pkt_err_intr()
89 dev_err_ratelimited(DEV(ndev), in clear_nps_pkt_err_intr()
93 value = nitrox_read_csr(ndev, offset); in clear_nps_pkt_err_intr()
94 nitrox_write_csr(ndev, offset, value); in clear_nps_pkt_err_intr()
95 dev_err_ratelimited(DEV(ndev), in clear_nps_pkt_err_intr()
100 static void clear_pom_err_intr(struct nitrox_device *ndev) in clear_pom_err_intr() argument
104 value = nitrox_read_csr(ndev, POM_INT); in clear_pom_err_intr()
105 nitrox_write_csr(ndev, POM_INT, value); in clear_pom_err_intr()
106 dev_err_ratelimited(DEV(ndev), "POM_INT 0x%016llx\n", value); in clear_pom_err_intr()
109 static void clear_pem_err_intr(struct nitrox_device *ndev) in clear_pem_err_intr() argument
113 value = nitrox_read_csr(ndev, PEM0_INT); in clear_pem_err_intr()
114 nitrox_write_csr(ndev, PEM0_INT, value); in clear_pem_err_intr()
115 dev_err_ratelimited(DEV(ndev), "PEM(0)_INT 0x%016llx\n", value); in clear_pem_err_intr()
118 static void clear_lbc_err_intr(struct nitrox_device *ndev) in clear_lbc_err_intr() argument
124 lbc_int.value = nitrox_read_csr(ndev, LBC_INT); in clear_lbc_err_intr()
125 dev_err_ratelimited(DEV(ndev), "LBC_INT 0x%016llx\n", lbc_int.value); in clear_lbc_err_intr()
130 value = nitrox_read_csr(ndev, offset); in clear_lbc_err_intr()
131 nitrox_write_csr(ndev, offset, value); in clear_lbc_err_intr()
133 value = nitrox_read_csr(ndev, offset); in clear_lbc_err_intr()
134 nitrox_write_csr(ndev, offset, value); in clear_lbc_err_intr()
139 dev_err_ratelimited(DEV(ndev), "CAM_SOFT_ERR, invalidating LBC\n"); in clear_lbc_err_intr()
140 invalidate_lbc(ndev); in clear_lbc_err_intr()
145 value = nitrox_read_csr(ndev, offset); in clear_lbc_err_intr()
146 nitrox_write_csr(ndev, offset, value); in clear_lbc_err_intr()
148 value = nitrox_read_csr(ndev, offset); in clear_lbc_err_intr()
149 nitrox_write_csr(ndev, offset, value); in clear_lbc_err_intr()
154 value = nitrox_read_csr(ndev, offset); in clear_lbc_err_intr()
155 nitrox_write_csr(ndev, offset, value); in clear_lbc_err_intr()
157 value = nitrox_read_csr(ndev, offset); in clear_lbc_err_intr()
158 nitrox_write_csr(ndev, offset, value); in clear_lbc_err_intr()
160 nitrox_write_csr(ndev, LBC_INT, lbc_int.value); in clear_lbc_err_intr()
163 static void clear_efl_err_intr(struct nitrox_device *ndev) in clear_efl_err_intr() argument
172 core_int.value = nitrox_read_csr(ndev, offset); in clear_efl_err_intr()
173 nitrox_write_csr(ndev, offset, core_int.value); in clear_efl_err_intr()
174 dev_err_ratelimited(DEV(ndev), "ELF_CORE(%d)_INT 0x%016llx\n", in clear_efl_err_intr()
178 value = nitrox_read_csr(ndev, offset); in clear_efl_err_intr()
179 nitrox_write_csr(ndev, offset, value); in clear_efl_err_intr()
184 static void clear_bmi_err_intr(struct nitrox_device *ndev) in clear_bmi_err_intr() argument
188 value = nitrox_read_csr(ndev, BMI_INT); in clear_bmi_err_intr()
189 nitrox_write_csr(ndev, BMI_INT, value); in clear_bmi_err_intr()
190 dev_err_ratelimited(DEV(ndev), "BMI_INT 0x%016llx\n", value); in clear_bmi_err_intr()
197 static void clear_nps_core_int_active(struct nitrox_device *ndev) in clear_nps_core_int_active() argument
201 core_int_active.value = nitrox_read_csr(ndev, NPS_CORE_INT_ACTIVE); in clear_nps_core_int_active()
204 clear_nps_core_err_intr(ndev); in clear_nps_core_int_active()
207 clear_nps_pkt_err_intr(ndev); in clear_nps_core_int_active()
210 clear_pom_err_intr(ndev); in clear_nps_core_int_active()
213 clear_pem_err_intr(ndev); in clear_nps_core_int_active()
216 clear_lbc_err_intr(ndev); in clear_nps_core_int_active()
219 clear_efl_err_intr(ndev); in clear_nps_core_int_active()
222 clear_bmi_err_intr(ndev); in clear_nps_core_int_active()
226 nitrox_write_csr(ndev, NPS_CORE_INT_ACTIVE, core_int_active.value); in clear_nps_core_int_active()
231 struct nitrox_device *ndev = data; in nps_core_int_isr() local
233 clear_nps_core_int_active(ndev); in nps_core_int_isr()
238 static int nitrox_enable_msix(struct nitrox_device *ndev) in nitrox_enable_msix() argument
256 nr_entries = (ndev->nr_queues * NR_RING_VECTORS) + 1; in nitrox_enable_msix()
258 GFP_KERNEL, ndev->node); in nitrox_enable_msix()
281 ndev->msix.entries = entries; in nitrox_enable_msix()
282 ndev->msix.names = names; in nitrox_enable_msix()
283 ndev->msix.nr_entries = nr_entries; in nitrox_enable_msix()
285 ret = pci_enable_msix_exact(ndev->pdev, ndev->msix.entries, in nitrox_enable_msix()
286 ndev->msix.nr_entries); in nitrox_enable_msix()
288 dev_err(&ndev->pdev->dev, "Failed to enable MSI-X IRQ(s) %d\n", in nitrox_enable_msix()
303 static void nitrox_cleanup_pkt_slc_bh(struct nitrox_device *ndev) in nitrox_cleanup_pkt_slc_bh() argument
307 if (!ndev->bh.slc) in nitrox_cleanup_pkt_slc_bh()
310 for (i = 0; i < ndev->nr_queues; i++) { in nitrox_cleanup_pkt_slc_bh()
311 struct bh_data *bh = &ndev->bh.slc[i]; in nitrox_cleanup_pkt_slc_bh()
316 kfree(ndev->bh.slc); in nitrox_cleanup_pkt_slc_bh()
317 ndev->bh.slc = NULL; in nitrox_cleanup_pkt_slc_bh()
320 static int nitrox_setup_pkt_slc_bh(struct nitrox_device *ndev) in nitrox_setup_pkt_slc_bh() argument
325 size = ndev->nr_queues * sizeof(struct bh_data); in nitrox_setup_pkt_slc_bh()
326 ndev->bh.slc = kzalloc(size, GFP_KERNEL); in nitrox_setup_pkt_slc_bh()
327 if (!ndev->bh.slc) in nitrox_setup_pkt_slc_bh()
330 for (i = 0; i < ndev->nr_queues; i++) { in nitrox_setup_pkt_slc_bh()
331 struct bh_data *bh = &ndev->bh.slc[i]; in nitrox_setup_pkt_slc_bh()
336 bh->completion_cnt_csr_addr = NITROX_CSR_ADDR(ndev, offset); in nitrox_setup_pkt_slc_bh()
337 bh->cmdq = &ndev->pkt_cmdqs[i]; in nitrox_setup_pkt_slc_bh()
346 static int nitrox_request_irqs(struct nitrox_device *ndev) in nitrox_request_irqs() argument
348 struct pci_dev *pdev = ndev->pdev; in nitrox_request_irqs()
349 struct msix_entry *msix_ent = ndev->msix.entries; in nitrox_request_irqs()
363 nr_ring_vectors = ndev->nr_queues * NR_RING_VECTORS; in nitrox_request_irqs()
367 name = *(ndev->msix.names + i); in nitrox_request_irqs()
370 ndev->idx, ring); in nitrox_request_irqs()
373 name, &ndev->bh.slc[ring]); in nitrox_request_irqs()
382 set_bit(i, ndev->msix.irqs); in nitrox_request_irqs()
387 name = *(ndev->msix.names + i); in nitrox_request_irqs()
388 snprintf(name, MAX_MSIX_VECTOR_NAME, "n5(%d)-nps-core-int", ndev->idx); in nitrox_request_irqs()
389 ret = request_irq(msix_ent[i].vector, nps_core_int_isr, 0, name, ndev); in nitrox_request_irqs()
395 set_bit(i, ndev->msix.irqs); in nitrox_request_irqs()
400 static void nitrox_disable_msix(struct nitrox_device *ndev) in nitrox_disable_msix() argument
402 struct msix_entry *msix_ent = ndev->msix.entries; in nitrox_disable_msix()
403 char **names = ndev->msix.names; in nitrox_disable_msix()
406 nr_ring_vectors = ndev->msix.nr_entries - 1; in nitrox_disable_msix()
410 if (test_and_clear_bit(i, ndev->msix.irqs)) { in nitrox_disable_msix()
413 free_irq(msix_ent[i].vector, &ndev->bh.slc[ring]); in nitrox_disable_msix()
418 free_irq(msix_ent[i].vector, ndev); in nitrox_disable_msix()
419 clear_bit(i, ndev->msix.irqs); in nitrox_disable_msix()
421 kfree(ndev->msix.entries); in nitrox_disable_msix()
422 for (i = 0; i < ndev->msix.nr_entries; i++) in nitrox_disable_msix()
426 pci_disable_msix(ndev->pdev); in nitrox_disable_msix()
433 void nitrox_pf_cleanup_isr(struct nitrox_device *ndev) in nitrox_pf_cleanup_isr() argument
435 nitrox_disable_msix(ndev); in nitrox_pf_cleanup_isr()
436 nitrox_cleanup_pkt_slc_bh(ndev); in nitrox_pf_cleanup_isr()
445 int nitrox_pf_init_isr(struct nitrox_device *ndev) in nitrox_pf_init_isr() argument
449 err = nitrox_setup_pkt_slc_bh(ndev); in nitrox_pf_init_isr()
453 err = nitrox_enable_msix(ndev); in nitrox_pf_init_isr()
457 err = nitrox_request_irqs(ndev); in nitrox_pf_init_isr()
464 nitrox_disable_msix(ndev); in nitrox_pf_init_isr()
466 nitrox_cleanup_pkt_slc_bh(ndev); in nitrox_pf_init_isr()