2683 	for (i = 0; i < pi->dpm_table.sclk_table.count; i++) {  in ci_do_program_memory_timing_parameters()
2686 								   pi->dpm_table.sclk_table.dpm_levels[i].value,  in ci_do_program_memory_timing_parameters()
3424 	for (i = 0; i < dpm_table->sclk_table.count; i++) {  in ci_populate_all_graphic_levels()
3426 						       dpm_table->sclk_table.dpm_levels[i].value,  in ci_populate_all_graphic_levels()
3433 		if (i == (dpm_table->sclk_table.count - 1))  in ci_populate_all_graphic_levels()
3439 	pi->smc_state_table.GraphicsDpmLevelCount = (u8)dpm_table->sclk_table.count;  in ci_populate_all_graphic_levels()
3441 		ci_get_dpm_level_enable_mask_value(&dpm_table->sclk_table);  in ci_populate_all_graphic_levels()
3597 				  &pi->dpm_table.sclk_table,  in ci_setup_default_dpm_tables()
3612 	pi->dpm_table.sclk_table.count = 0;  in ci_setup_default_dpm_tables()
3615 		    (pi->dpm_table.sclk_table.dpm_levels[pi->dpm_table.sclk_table.count-1].value !=  in ci_setup_default_dpm_tables()
3617 			pi->dpm_table.sclk_table.dpm_levels[pi->dpm_table.sclk_table.count].value =  in ci_setup_default_dpm_tables()
3619 			pi->dpm_table.sclk_table.dpm_levels[pi->dpm_table.sclk_table.count].enabled =  in ci_setup_default_dpm_tables()
3621 			pi->dpm_table.sclk_table.count++;  in ci_setup_default_dpm_tables()
3800 	ret = ci_find_boot_level(&pi->dpm_table.sclk_table,  in ci_init_smc_table()
3938 				  &pi->dpm_table.sclk_table,  in ci_trim_dpm_states()
4035 	struct ci_single_dpm_table *sclk_table = &pi->dpm_table.sclk_table;  in ci_find_dpm_states_clocks_in_dpm_table()  local
4043 	for (i = 0; i < sclk_table->count; i++) {  in ci_find_dpm_states_clocks_in_dpm_table()
4044 		if (sclk == sclk_table->dpm_levels[i].value)  in ci_find_dpm_states_clocks_in_dpm_table()
4048 	if (i >= sclk_table->count) {  in ci_find_dpm_states_clocks_in_dpm_table()
4083 		dpm_table->sclk_table.dpm_levels[dpm_table->sclk_table.count-1].value = sclk;  in ci_populate_and_upload_sclk_mclk_dpm_levels()
4354 		ci_get_dpm_level_enable_mask_value(&pi->dpm_table.sclk_table);  in ci_generate_dpm_level_enable_mask()
6558 	struct ci_single_dpm_table *sclk_table = &pi->dpm_table.sclk_table;  in ci_dpm_print_clock_levels()  local
6570 		for (i = 0; i < sclk_table->count; i++) {  in ci_dpm_print_clock_levels()
6571 			if (clock > sclk_table->dpm_levels[i].value)  in ci_dpm_print_clock_levels()
6577 		for (i = 0; i < sclk_table->count; i++)  in ci_dpm_print_clock_levels()
6579 					i, sclk_table->dpm_levels[i].value / 100,  in ci_dpm_print_clock_levels()
6670 	struct ci_single_dpm_table *sclk_table = &(pi->dpm_table.sclk_table);  in ci_dpm_get_sclk_od()  local
6672 			&(pi->golden_dpm_table.sclk_table);  in ci_dpm_get_sclk_od()
6675 	value = (sclk_table->dpm_levels[sclk_table->count - 1].value -  in ci_dpm_get_sclk_od()
6688 			&(pi->golden_dpm_table.sclk_table);  in ci_dpm_set_sclk_od()
6768 	for (i = 0; i < dpm_table->sclk_table.count; i++) {  in ci_populate_requested_graphic_levels()
6788 	for (i = 0; i < dpm_table->sclk_table.count; i++) {  in ci_find_min_clock_masks()
6789 		if (dpm_table->sclk_table.dpm_levels[i].enabled &&  in ci_find_min_clock_masks()
6790 			dpm_table->sclk_table.dpm_levels[i].value >= min_sclk)  in ci_find_min_clock_masks()