Lines Matching refs:amdgpu_device

31 int nbio_v7_0_init(struct amdgpu_device *adev);
32 u32 nbio_v7_0_get_atombios_scratch_regs(struct amdgpu_device *adev,
34 void nbio_v7_0_set_atombios_scratch_regs(struct amdgpu_device *adev,
36 void nbio_v7_0_mc_access_enable(struct amdgpu_device *adev, bool enable);
37 void nbio_v7_0_hdp_flush(struct amdgpu_device *adev);
38 u32 nbio_v7_0_get_memsize(struct amdgpu_device *adev);
39 void nbio_v7_0_sdma_doorbell_range(struct amdgpu_device *adev, int instance,
41 void nbio_v7_0_enable_doorbell_aperture(struct amdgpu_device *adev,
43 void nbio_v7_0_ih_doorbell_range(struct amdgpu_device *adev,
45 void nbio_v7_0_ih_control(struct amdgpu_device *adev);
46 u32 nbio_v7_0_get_rev_id(struct amdgpu_device *adev);
47 void nbio_v7_0_update_medium_grain_clock_gating(struct amdgpu_device *adev,