Lines Matching refs:gpu_addr
356 amdgpu_ring_write(ring, lower_32_bits(ib->gpu_addr) & 0xffffffe0); in sdma_v4_0_ring_emit_ib()
357 amdgpu_ring_write(ring, upper_32_bits(ib->gpu_addr)); in sdma_v4_0_ring_emit_ib()
611 upper_32_bits(adev->wb.gpu_addr + wb_offset) & 0xFFFFFFFF); in sdma_v4_0_gfx_resume()
613 lower_32_bits(adev->wb.gpu_addr + wb_offset) & 0xFFFFFFFC); in sdma_v4_0_gfx_resume()
617 WREG32(sdma_v4_0_get_reg_offset(i, mmSDMA0_GFX_RB_BASE), ring->gpu_addr >> 8); in sdma_v4_0_gfx_resume()
618 WREG32(sdma_v4_0_get_reg_offset(i, mmSDMA0_GFX_RB_BASE_HI), ring->gpu_addr >> 40); in sdma_v4_0_gfx_resume()
666 wptr_gpu_addr = adev->wb.gpu_addr + (ring->wptr_offs * 4); in sdma_v4_0_gfx_resume()
887 u64 gpu_addr; in sdma_v4_0_ring_test_ring() local
895 gpu_addr = adev->wb.gpu_addr + (index * 4); in sdma_v4_0_ring_test_ring()
908 amdgpu_ring_write(ring, lower_32_bits(gpu_addr)); in sdma_v4_0_ring_test_ring()
909 amdgpu_ring_write(ring, upper_32_bits(gpu_addr)); in sdma_v4_0_ring_test_ring()
949 u64 gpu_addr; in sdma_v4_0_ring_test_ib() local
957 gpu_addr = adev->wb.gpu_addr + (index * 4); in sdma_v4_0_ring_test_ib()
969 ib.ptr[1] = lower_32_bits(gpu_addr); in sdma_v4_0_ring_test_ib()
970 ib.ptr[2] = upper_32_bits(gpu_addr); in sdma_v4_0_ring_test_ib()
1129 uint64_t addr = ring->fence_drv.gpu_addr; in sdma_v4_0_ring_emit_pipeline_sync()