2284 						  si_pi->sram_end);  in si_populate_smc_tdp_limits()
2301 							  si_pi->sram_end);  in si_populate_smc_tdp_limits()
2333 						  si_pi->sram_end);  in si_populate_smc_tdp_limits_2()
2623 					  si_pi->sram_end);  in si_initialize_smc_dte_tables()
2816 					  si_pi->sram_end);  in si_initialize_smc_cac_tables()
3004 						  si_pi->sram_end);  in si_init_smc_spll_table()
3647 					     si_pi->sram_end);
3658 					      value, si_pi->sram_end);  in si_write_smc_soft_register()
3943 					    &tmp, si_pi->sram_end);  in si_process_firmware_header()
3952 					    &tmp, si_pi->sram_end);  in si_process_firmware_header()
3961 					    &tmp, si_pi->sram_end);  in si_process_firmware_header()
3970 					    &tmp, si_pi->sram_end);  in si_process_firmware_header()
3979 					    &tmp, si_pi->sram_end);  in si_process_firmware_header()
3988 					    &tmp, si_pi->sram_end);  in si_process_firmware_header()
3997 					    &tmp, si_pi->sram_end);  in si_process_firmware_header()
4006 					    &tmp, si_pi->sram_end);  in si_process_firmware_header()
4015 					    &tmp, si_pi->sram_end);  in si_process_firmware_header()
4349 	return amdgpu_si_load_smc_ucode(adev, si_pi->sram_end);  in si_upload_firmware()
4694 					    &tmp, si_pi->sram_end);  in si_init_arb_table_index()
4702 					      tmp, si_pi->sram_end);  in si_init_arb_table_index()
4723 					    &tmp, si_pi->sram_end);  in si_force_switch_to_arb_f0()
4799 						  si_pi->sram_end);  in si_do_program_memory_timing_parameters()
5142 					  si_pi->sram_end);  in si_program_ulv_memory_timing_parameters()
5238 					   si_pi->sram_end);  in si_init_smc_table()
5748 					   state_size, si_pi->sram_end);  in si_upload_sw_state()
5768 							  state_size, si_pi->sram_end);  in si_upload_ulv_state()
6141 					   sizeof(SMC_SIslands_MCRegisters), si_pi->sram_end);  in si_populate_mc_reg_table()
6161 					   si_pi->sram_end);  in si_upload_mc_reg_table()
6523 					  si_pi->sram_end);  in si_thermal_setup_fan_table()
7433 	si_pi->sram_end = SMC_RAM_END;  in si_dpm_init()