223 	dummy = ib->gpu_addr + 1024;  in uvd_v7_0_enc_get_create_msg()
286 	dummy = ib->gpu_addr + 1024;  in uvd_v7_0_enc_get_destroy_msg()
636 			lower_32_bits(adev->uvd.gpu_addr));  in uvd_v7_0_mc_resume()
638 			upper_32_bits(adev->uvd.gpu_addr));  in uvd_v7_0_mc_resume()
647 			lower_32_bits(adev->uvd.gpu_addr + offset));  in uvd_v7_0_mc_resume()
649 			upper_32_bits(adev->uvd.gpu_addr + offset));  in uvd_v7_0_mc_resume()
654 			lower_32_bits(adev->uvd.gpu_addr + offset + AMDGPU_UVD_HEAP_SIZE));  in uvd_v7_0_mc_resume()
656 			upper_32_bits(adev->uvd.gpu_addr + offset + AMDGPU_UVD_HEAP_SIZE));  in uvd_v7_0_mc_resume()
675 	uint64_t addr = table->gpu_addr;  in uvd_v7_0_mmsch_start()
766 						    lower_32_bits(adev->uvd.gpu_addr));  in uvd_v7_0_sriov_start()
768 						    upper_32_bits(adev->uvd.gpu_addr));  in uvd_v7_0_sriov_start()
777 					    lower_32_bits(adev->uvd.gpu_addr + offset));  in uvd_v7_0_sriov_start()
779 					    upper_32_bits(adev->uvd.gpu_addr + offset));  in uvd_v7_0_sriov_start()
784 					    lower_32_bits(adev->uvd.gpu_addr + offset + AMDGPU_UVD_HEAP_SIZE));  in uvd_v7_0_sriov_start()
786 					    upper_32_bits(adev->uvd.gpu_addr + offset + AMDGPU_UVD_HEAP_SIZE));  in uvd_v7_0_sriov_start()
852 		MMSCH_V1_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(UVD, 0, mmUVD_RB_BASE_LO), ring->gpu_addr);  in uvd_v7_0_sriov_start()
853 …H_V1_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(UVD, 0, mmUVD_RB_BASE_HI), upper_32_bits(ring->gpu_addr));  in uvd_v7_0_sriov_start()
1018 			(upper_32_bits(ring->gpu_addr) >> 2));  in uvd_v7_0_start()
1022 			lower_32_bits(ring->gpu_addr));  in uvd_v7_0_start()
1024 			upper_32_bits(ring->gpu_addr));  in uvd_v7_0_start()
1039 	WREG32_SOC15(UVD, 0, mmUVD_RB_BASE_LO, ring->gpu_addr);  in uvd_v7_0_start()
1040 	WREG32_SOC15(UVD, 0, mmUVD_RB_BASE_HI, upper_32_bits(ring->gpu_addr));  in uvd_v7_0_start()
1046 	WREG32_SOC15(UVD, 0, mmUVD_RB_BASE_LO2, ring->gpu_addr);  in uvd_v7_0_start()
1047 	WREG32_SOC15(UVD, 0, mmUVD_RB_BASE_HI2, upper_32_bits(ring->gpu_addr));  in uvd_v7_0_start()
1229 	amdgpu_ring_write(ring, lower_32_bits(ib->gpu_addr));  in uvd_v7_0_ring_emit_ib()
1232 	amdgpu_ring_write(ring, upper_32_bits(ib->gpu_addr));  in uvd_v7_0_ring_emit_ib()
1251 	amdgpu_ring_write(ring, lower_32_bits(ib->gpu_addr));  in uvd_v7_0_enc_ring_emit_ib()
1252 	amdgpu_ring_write(ring, upper_32_bits(ib->gpu_addr));  in uvd_v7_0_enc_ring_emit_ib()