Lines Matching refs:dpm_table
555 phm_reset_single_dpm_table(&data->dpm_table.pcie_speed_table, in smu7_setup_default_pcie_table()
566 phm_setup_pcie_table_entry(&data->dpm_table.pcie_speed_table, i - 1, in smu7_setup_default_pcie_table()
572 data->dpm_table.pcie_speed_table.count = max_entry - 1; in smu7_setup_default_pcie_table()
576 phm_setup_pcie_table_entry(&data->dpm_table.pcie_speed_table, 0, in smu7_setup_default_pcie_table()
581 phm_setup_pcie_table_entry(&data->dpm_table.pcie_speed_table, 1, in smu7_setup_default_pcie_table()
586 phm_setup_pcie_table_entry(&data->dpm_table.pcie_speed_table, 2, in smu7_setup_default_pcie_table()
591 phm_setup_pcie_table_entry(&data->dpm_table.pcie_speed_table, 3, in smu7_setup_default_pcie_table()
596 phm_setup_pcie_table_entry(&data->dpm_table.pcie_speed_table, 4, in smu7_setup_default_pcie_table()
601 phm_setup_pcie_table_entry(&data->dpm_table.pcie_speed_table, 5, in smu7_setup_default_pcie_table()
607 data->dpm_table.pcie_speed_table.count = 6; in smu7_setup_default_pcie_table()
610 phm_setup_pcie_table_entry(&data->dpm_table.pcie_speed_table, in smu7_setup_default_pcie_table()
611 data->dpm_table.pcie_speed_table.count, in smu7_setup_default_pcie_table()
624 memset(&(data->dpm_table), 0x00, sizeof(data->dpm_table)); in smu7_reset_dpm_tables()
627 &data->dpm_table.sclk_table, in smu7_reset_dpm_tables()
632 &data->dpm_table.mclk_table, in smu7_reset_dpm_tables()
637 &data->dpm_table.vddc_table, in smu7_reset_dpm_tables()
642 &data->dpm_table.vddci_table, in smu7_reset_dpm_tables()
647 &data->dpm_table.mvdd_table, in smu7_reset_dpm_tables()
685 data->dpm_table.sclk_table.count = 0; in smu7_setup_dpm_tables_v0()
688 if (i == 0 || data->dpm_table.sclk_table.dpm_levels[data->dpm_table.sclk_table.count-1].value != in smu7_setup_dpm_tables_v0()
690 data->dpm_table.sclk_table.dpm_levels[data->dpm_table.sclk_table.count].value = in smu7_setup_dpm_tables_v0()
692 …data->dpm_table.sclk_table.dpm_levels[data->dpm_table.sclk_table.count].enabled = 1; /*(i==0) ? 1 … in smu7_setup_dpm_tables_v0()
693 data->dpm_table.sclk_table.count++; in smu7_setup_dpm_tables_v0()
700 data->dpm_table.mclk_table.count = 0; in smu7_setup_dpm_tables_v0()
702 if (i == 0 || data->dpm_table.mclk_table.dpm_levels[data->dpm_table.mclk_table.count-1].value != in smu7_setup_dpm_tables_v0()
704 data->dpm_table.mclk_table.dpm_levels[data->dpm_table.mclk_table.count].value = in smu7_setup_dpm_tables_v0()
706 …data->dpm_table.mclk_table.dpm_levels[data->dpm_table.mclk_table.count].enabled = 1; /*(i==0) ? 1 … in smu7_setup_dpm_tables_v0()
707 data->dpm_table.mclk_table.count++; in smu7_setup_dpm_tables_v0()
713 data->dpm_table.vddc_table.dpm_levels[i].value = allowed_vdd_mclk_table->entries[i].v; in smu7_setup_dpm_tables_v0()
714 data->dpm_table.vddc_table.dpm_levels[i].param1 = std_voltage_table->entries[i].Leakage; in smu7_setup_dpm_tables_v0()
716 data->dpm_table.vddc_table.dpm_levels[i].enabled = 1; in smu7_setup_dpm_tables_v0()
719 data->dpm_table.vddc_table.count = allowed_vdd_sclk_table->count; in smu7_setup_dpm_tables_v0()
725 data->dpm_table.vddci_table.dpm_levels[i].value = allowed_vdd_mclk_table->entries[i].v; in smu7_setup_dpm_tables_v0()
726 data->dpm_table.vddci_table.dpm_levels[i].enabled = 1; in smu7_setup_dpm_tables_v0()
728 data->dpm_table.vddci_table.count = allowed_vdd_mclk_table->count; in smu7_setup_dpm_tables_v0()
739 data->dpm_table.mvdd_table.dpm_levels[i].value = allowed_vdd_mclk_table->entries[i].v; in smu7_setup_dpm_tables_v0()
740 data->dpm_table.mvdd_table.dpm_levels[i].enabled = 1; in smu7_setup_dpm_tables_v0()
742 data->dpm_table.mvdd_table.count = allowed_vdd_mclk_table->count; in smu7_setup_dpm_tables_v0()
779 data->dpm_table.sclk_table.count = 0; in smu7_setup_dpm_tables_v1()
781 if (i == 0 || data->dpm_table.sclk_table.dpm_levels[data->dpm_table.sclk_table.count - 1].value != in smu7_setup_dpm_tables_v1()
784 data->dpm_table.sclk_table.dpm_levels[data->dpm_table.sclk_table.count].value = in smu7_setup_dpm_tables_v1()
787 data->dpm_table.sclk_table.dpm_levels[data->dpm_table.sclk_table.count].enabled = in smu7_setup_dpm_tables_v1()
789 data->dpm_table.sclk_table.count++; in smu7_setup_dpm_tables_v1()
794 data->dpm_table.mclk_table.count = 0; in smu7_setup_dpm_tables_v1()
796 if (i == 0 || data->dpm_table.mclk_table.dpm_levels in smu7_setup_dpm_tables_v1()
797 [data->dpm_table.mclk_table.count - 1].value != in smu7_setup_dpm_tables_v1()
799 data->dpm_table.mclk_table.dpm_levels[data->dpm_table.mclk_table.count].value = in smu7_setup_dpm_tables_v1()
801 data->dpm_table.mclk_table.dpm_levels[data->dpm_table.mclk_table.count].enabled = in smu7_setup_dpm_tables_v1()
803 data->dpm_table.mclk_table.count++; in smu7_setup_dpm_tables_v1()
824 memcpy(&(data->golden_dpm_table), &(data->dpm_table), in smu7_setup_default_dpm_tables()
2564 *pcie_mask = data->dpm_table.pcie_speed_table.count - 1; in smu7_get_profiling_clk()
3410 struct smu7_single_dpm_table *sclk_table = &(data->dpm_table.sclk_table); in smu7_find_dpm_states_clocks_in_dpm_table()
3413 struct smu7_single_dpm_table *mclk_table = &(data->dpm_table.mclk_table); in smu7_find_dpm_states_clocks_in_dpm_table()
3461 struct smu7_dpm_table *dpm_table = &data->dpm_table; in smu7_get_maximum_link_speed() local
3469 for (i = 0; i < dpm_table->sclk_table.count; i++) { in smu7_get_maximum_link_speed()
3470 if (dpm_table->sclk_table.dpm_levels[i].value == max_sclk) in smu7_get_maximum_link_speed()
3471 return (uint16_t) ((i >= dpm_table->pcie_speed_table.count) ? in smu7_get_maximum_link_speed()
3472 dpm_table->pcie_speed_table.dpm_levels in smu7_get_maximum_link_speed()
3473 [dpm_table->pcie_speed_table.count - 1].value : in smu7_get_maximum_link_speed()
3474 dpm_table->pcie_speed_table.dpm_levels[i].value); in smu7_get_maximum_link_speed()
3572 struct smu7_dpm_table *dpm_table = &data->dpm_table; in smu7_populate_and_upload_sclk_mclk_dpm_levels() local
3582 dpm_table->sclk_table.dpm_levels in smu7_populate_and_upload_sclk_mclk_dpm_levels()
3583 [dpm_table->sclk_table.count - 1].value = sclk; in smu7_populate_and_upload_sclk_mclk_dpm_levels()
3595 dpm_count = dpm_table->sclk_table.count < 2 ? 0 : dpm_table->sclk_table.count - 2; in smu7_populate_and_upload_sclk_mclk_dpm_levels()
3605 dpm_table->sclk_table.dpm_levels[i].value = in smu7_populate_and_upload_sclk_mclk_dpm_levels()
3610 … } else if (golden_dpm_table->sclk_table.dpm_levels[dpm_table->sclk_table.count-1].value > sclk) { in smu7_populate_and_upload_sclk_mclk_dpm_levels()
3616 dpm_table->sclk_table.dpm_levels[i].value = in smu7_populate_and_upload_sclk_mclk_dpm_levels()
3621 dpm_table->sclk_table.dpm_levels[i].value = in smu7_populate_and_upload_sclk_mclk_dpm_levels()
3628 dpm_table->mclk_table.dpm_levels in smu7_populate_and_upload_sclk_mclk_dpm_levels()
3629 [dpm_table->mclk_table.count - 1].value = mclk; in smu7_populate_and_upload_sclk_mclk_dpm_levels()
3639 dpm_count = dpm_table->mclk_table.count < 2 ? 0 : dpm_table->mclk_table.count - 2; in smu7_populate_and_upload_sclk_mclk_dpm_levels()
3646 dpm_table->mclk_table.dpm_levels[i].value = in smu7_populate_and_upload_sclk_mclk_dpm_levels()
3651 … } else if (golden_dpm_table->mclk_table.dpm_levels[dpm_table->mclk_table.count-1].value > mclk) { in smu7_populate_and_upload_sclk_mclk_dpm_levels()
3657 dpm_table->mclk_table.dpm_levels[i].value = in smu7_populate_and_upload_sclk_mclk_dpm_levels()
3662 dpm_table->mclk_table.dpm_levels[i].value = in smu7_populate_and_upload_sclk_mclk_dpm_levels()
3689 struct smu7_single_dpm_table *dpm_table, in smu7_trim_single_dpm_states() argument
3694 for (i = 0; i < dpm_table->count; i++) { in smu7_trim_single_dpm_states()
3695 if ((dpm_table->dpm_levels[i].value < low_limit) in smu7_trim_single_dpm_states()
3696 || (dpm_table->dpm_levels[i].value > high_limit)) in smu7_trim_single_dpm_states()
3697 dpm_table->dpm_levels[i].enabled = false; in smu7_trim_single_dpm_states()
3699 dpm_table->dpm_levels[i].enabled = true; in smu7_trim_single_dpm_states()
3718 &(data->dpm_table.sclk_table), in smu7_trim_dpm_states()
3723 &(data->dpm_table.mclk_table), in smu7_trim_dpm_states()
3745 phm_get_dpm_level_enable_mask_value(&data->dpm_table.sclk_table); in smu7_generate_dpm_level_enable_mask()
3747 phm_get_dpm_level_enable_mask_value(&data->dpm_table.mclk_table); in smu7_generate_dpm_level_enable_mask()
3749 phm_get_dpm_level_enable_mask_value(&data->dpm_table.pcie_speed_table); in smu7_generate_dpm_level_enable_mask()
4303 struct smu7_single_dpm_table *sclk_table = &(data->dpm_table.sclk_table); in smu7_print_clock_levels()
4304 struct smu7_single_dpm_table *mclk_table = &(data->dpm_table.mclk_table); in smu7_print_clock_levels()
4305 struct smu7_single_dpm_table *pcie_table = &(data->dpm_table.pcie_speed_table); in smu7_print_clock_levels()
4396 struct smu7_single_dpm_table *sclk_table = &(data->dpm_table.sclk_table); in smu7_get_sclk_od()
4438 struct smu7_single_dpm_table *mclk_table = &(data->dpm_table.mclk_table); in smu7_get_mclk_od()
4564 struct smu7_dpm_table *dpm_table = &(data->dpm_table); in smu7_find_min_clock_masks() local
4567 for (i = 0; i < dpm_table->sclk_table.count; i++) { in smu7_find_min_clock_masks()
4568 if (dpm_table->sclk_table.dpm_levels[i].enabled && in smu7_find_min_clock_masks()
4569 dpm_table->sclk_table.dpm_levels[i].value >= min_sclk) in smu7_find_min_clock_masks()
4573 for (i = 0; i < dpm_table->mclk_table.count; i++) { in smu7_find_min_clock_masks()
4574 if (dpm_table->mclk_table.dpm_levels[i].enabled && in smu7_find_min_clock_masks()
4575 dpm_table->mclk_table.dpm_levels[i].value >= min_mclk) in smu7_find_min_clock_masks()