Lines Matching refs:mclk_table
632 &data->dpm_table.mclk_table, in smu7_reset_dpm_tables()
700 data->dpm_table.mclk_table.count = 0; in smu7_setup_dpm_tables_v0()
702 if (i == 0 || data->dpm_table.mclk_table.dpm_levels[data->dpm_table.mclk_table.count-1].value != in smu7_setup_dpm_tables_v0()
704 data->dpm_table.mclk_table.dpm_levels[data->dpm_table.mclk_table.count].value = in smu7_setup_dpm_tables_v0()
706 …data->dpm_table.mclk_table.dpm_levels[data->dpm_table.mclk_table.count].enabled = 1; /*(i==0) ? 1 … in smu7_setup_dpm_tables_v0()
707 data->dpm_table.mclk_table.count++; in smu7_setup_dpm_tables_v0()
794 data->dpm_table.mclk_table.count = 0; in smu7_setup_dpm_tables_v1()
796 if (i == 0 || data->dpm_table.mclk_table.dpm_levels in smu7_setup_dpm_tables_v1()
797 [data->dpm_table.mclk_table.count - 1].value != in smu7_setup_dpm_tables_v1()
799 data->dpm_table.mclk_table.dpm_levels[data->dpm_table.mclk_table.count].value = in smu7_setup_dpm_tables_v1()
801 data->dpm_table.mclk_table.dpm_levels[data->dpm_table.mclk_table.count].enabled = in smu7_setup_dpm_tables_v1()
803 data->dpm_table.mclk_table.count++; in smu7_setup_dpm_tables_v1()
1633 struct phm_ppt_v1_clock_voltage_dependency_table *mclk_table = in smu7_patch_voltage_dependency_tables_with_lookup_table() local
1652 for (entry_id = 0; entry_id < mclk_table->count; ++entry_id) { in smu7_patch_voltage_dependency_tables_with_lookup_table()
1653 voltage_id = mclk_table->entries[entry_id].vddInd; in smu7_patch_voltage_dependency_tables_with_lookup_table()
1654 mclk_table->entries[entry_id].vddc = in smu7_patch_voltage_dependency_tables_with_lookup_table()
1713 phm_ppt_v1_clock_voltage_dependency_table *mclk_table = pptable_info->vdd_dep_on_mclk; in smu7_calc_voltage_dependency_tables() local
1731 for (entry_id = 0; entry_id < mclk_table->count; ++entry_id) { in smu7_calc_voltage_dependency_tables()
1732 if (mclk_table->entries[entry_id].vdd_offset & (1 << 15)) in smu7_calc_voltage_dependency_tables()
1733 v_record.us_vdd = mclk_table->entries[entry_id].vddc + in smu7_calc_voltage_dependency_tables()
1734 mclk_table->entries[entry_id].vdd_offset - 0xFFFF; in smu7_calc_voltage_dependency_tables()
1736 v_record.us_vdd = mclk_table->entries[entry_id].vddc + in smu7_calc_voltage_dependency_tables()
1737 mclk_table->entries[entry_id].vdd_offset; in smu7_calc_voltage_dependency_tables()
1739 mclk_table->entries[entry_id].vddgfx = v_record.us_cac_low = in smu7_calc_voltage_dependency_tables()
2510 if (golden_dpm_table->mclk_table.count < 1) in smu7_get_profiling_clk()
2514 golden_dpm_table->mclk_table.dpm_levels[golden_dpm_table->mclk_table.count - 1].value; in smu7_get_profiling_clk()
2516 if (golden_dpm_table->mclk_table.count == 1) { in smu7_get_profiling_clk()
2518 tmp_mclk = golden_dpm_table->mclk_table.dpm_levels[golden_dpm_table->mclk_table.count - 1].value; in smu7_get_profiling_clk()
2519 *mclk_mask = golden_dpm_table->mclk_table.count - 1; in smu7_get_profiling_clk()
2521 tmp_mclk = golden_dpm_table->mclk_table.dpm_levels[golden_dpm_table->mclk_table.count - 2].value; in smu7_get_profiling_clk()
2522 *mclk_mask = golden_dpm_table->mclk_table.count - 2; in smu7_get_profiling_clk()
2562 *mclk_mask = golden_dpm_table->mclk_table.count - 1; in smu7_get_profiling_clk()
3413 struct smu7_single_dpm_table *mclk_table = &(data->dpm_table.mclk_table); in smu7_find_dpm_states_clocks_in_dpm_table() local
3439 for (i = 0; i < mclk_table->count; i++) { in smu7_find_dpm_states_clocks_in_dpm_table()
3440 if (mclk == mclk_table->dpm_levels[i].value) in smu7_find_dpm_states_clocks_in_dpm_table()
3444 if (i >= mclk_table->count) in smu7_find_dpm_states_clocks_in_dpm_table()
3628 dpm_table->mclk_table.dpm_levels in smu7_populate_and_upload_sclk_mclk_dpm_levels()
3629 [dpm_table->mclk_table.count - 1].value = mclk; in smu7_populate_and_upload_sclk_mclk_dpm_levels()
3635 (golden_dpm_table->mclk_table.dpm_levels in smu7_populate_and_upload_sclk_mclk_dpm_levels()
3636 [golden_dpm_table->mclk_table.count-1].value != 0), in smu7_populate_and_upload_sclk_mclk_dpm_levels()
3639 dpm_count = dpm_table->mclk_table.count < 2 ? 0 : dpm_table->mclk_table.count - 2; in smu7_populate_and_upload_sclk_mclk_dpm_levels()
3641 … if (golden_dpm_table->mclk_table.dpm_levels[golden_dpm_table->mclk_table.count-1].value < mclk) { in smu7_populate_and_upload_sclk_mclk_dpm_levels()
3643 golden_dpm_table->mclk_table.dpm_levels[golden_dpm_table->mclk_table.count-1].value) * 100) in smu7_populate_and_upload_sclk_mclk_dpm_levels()
3644 / golden_dpm_table->mclk_table.dpm_levels[golden_dpm_table->mclk_table.count-1].value; in smu7_populate_and_upload_sclk_mclk_dpm_levels()
3646 dpm_table->mclk_table.dpm_levels[i].value = in smu7_populate_and_upload_sclk_mclk_dpm_levels()
3647 golden_dpm_table->mclk_table.dpm_levels[i].value + in smu7_populate_and_upload_sclk_mclk_dpm_levels()
3648 (golden_dpm_table->mclk_table.dpm_levels[i].value * in smu7_populate_and_upload_sclk_mclk_dpm_levels()
3651 … } else if (golden_dpm_table->mclk_table.dpm_levels[dpm_table->mclk_table.count-1].value > mclk) { in smu7_populate_and_upload_sclk_mclk_dpm_levels()
3653 (golden_dpm_table->mclk_table.dpm_levels[golden_dpm_table->mclk_table.count-1].value - mclk) in smu7_populate_and_upload_sclk_mclk_dpm_levels()
3655 / golden_dpm_table->mclk_table.dpm_levels[golden_dpm_table->mclk_table.count-1].value; in smu7_populate_and_upload_sclk_mclk_dpm_levels()
3657 dpm_table->mclk_table.dpm_levels[i].value = in smu7_populate_and_upload_sclk_mclk_dpm_levels()
3658 golden_dpm_table->mclk_table.dpm_levels[i].value - in smu7_populate_and_upload_sclk_mclk_dpm_levels()
3659 (golden_dpm_table->mclk_table.dpm_levels[i].value * in smu7_populate_and_upload_sclk_mclk_dpm_levels()
3662 dpm_table->mclk_table.dpm_levels[i].value = in smu7_populate_and_upload_sclk_mclk_dpm_levels()
3663 golden_dpm_table->mclk_table.dpm_levels[i].value; in smu7_populate_and_upload_sclk_mclk_dpm_levels()
3723 &(data->dpm_table.mclk_table), in smu7_trim_dpm_states()
3747 phm_get_dpm_level_enable_mask_value(&data->dpm_table.mclk_table); in smu7_generate_dpm_level_enable_mask()
4304 struct smu7_single_dpm_table *mclk_table = &(data->dpm_table.mclk_table); in smu7_print_clock_levels() local
4330 for (i = 0; i < mclk_table->count; i++) { in smu7_print_clock_levels()
4331 if (clock > mclk_table->dpm_levels[i].value) in smu7_print_clock_levels()
4337 for (i = 0; i < mclk_table->count; i++) in smu7_print_clock_levels()
4339 i, mclk_table->dpm_levels[i].value / 100, in smu7_print_clock_levels()
4438 struct smu7_single_dpm_table *mclk_table = &(data->dpm_table.mclk_table); in smu7_get_mclk_od() local
4440 &(data->golden_dpm_table.mclk_table); in smu7_get_mclk_od()
4443 value = (mclk_table->dpm_levels[mclk_table->count - 1].value - in smu7_get_mclk_od()
4455 &(data->golden_dpm_table.mclk_table); in smu7_set_mclk_od()
4521 struct phm_clock_voltage_dependency_table *mclk_table; in smu7_get_mclks() local
4534 mclk_table = hwmgr->dyn_state.vddc_dependency_on_mclk; in smu7_get_mclks()
4535 for (i = 0; i < mclk_table->count; i++) in smu7_get_mclks()
4536 clocks->clock[i] = mclk_table->entries[i].clk; in smu7_get_mclks()
4537 clocks->count = mclk_table->count; in smu7_get_mclks()
4573 for (i = 0; i < dpm_table->mclk_table.count; i++) { in smu7_find_min_clock_masks()
4574 if (dpm_table->mclk_table.dpm_levels[i].enabled && in smu7_find_min_clock_masks()
4575 dpm_table->mclk_table.dpm_levels[i].value >= min_mclk) in smu7_find_min_clock_masks()