390 	pp = REG_READ(PP_CONTROL);  in cdv_intel_edp_panel_vdd_on()
394 	REG_READ(PP_CONTROL);  in cdv_intel_edp_panel_vdd_on()
404 	pp = REG_READ(PP_CONTROL);  in cdv_intel_edp_panel_vdd_off()
408 	REG_READ(PP_CONTROL);  in cdv_intel_edp_panel_vdd_off()
423 	pp = REG_READ(PP_CONTROL);  in cdv_intel_edp_panel_on()
428 	REG_READ(PP_CONTROL);  in cdv_intel_edp_panel_on()
430 	if (wait_for(((REG_READ(PP_STATUS) & idle_on_mask) == idle_on_mask), 1000)) {  in cdv_intel_edp_panel_on()
431 		DRM_DEBUG_KMS("Error in Powering up eDP panel, status %x\n", REG_READ(PP_STATUS));  in cdv_intel_edp_panel_on()
448 	pp = REG_READ(PP_CONTROL);  in cdv_intel_edp_panel_off()
461 	REG_READ(PP_CONTROL);  in cdv_intel_edp_panel_off()
462 	DRM_DEBUG_KMS("PP_STATUS %x\n", REG_READ(PP_STATUS));  in cdv_intel_edp_panel_off()
464 	if (wait_for((REG_READ(PP_STATUS) & idle_off_mask) == 0, 1000)) {  in cdv_intel_edp_panel_off()
485 	pp = REG_READ(PP_CONTROL);  in cdv_intel_edp_backlight_on()
501 	pp = REG_READ(PP_CONTROL);  in cdv_intel_edp_backlight_off()
595 	if (REG_READ(ch_ctl) & DP_AUX_CH_CTL_SEND_BUSY) {  in cdv_intel_dp_aux_ch()
597 			  REG_READ(ch_ctl));  in cdv_intel_dp_aux_ch()
619 			status = REG_READ(ch_ctl);  in cdv_intel_dp_aux_ch()
662 		unpack_aux(REG_READ(ch_data + i),  in cdv_intel_dp_aux_ch()
1174 	uint32_t dp_reg = REG_READ(intel_dp->output_reg);  in cdv_intel_dp_dpms()
1394 	REG_READ(intel_dp->output_reg);  in cdv_intel_dp_set_link_train()
1516 	REG_READ(intel_dp->output_reg);  in cdv_intel_dp_start_link_train()
1672 	REG_READ(intel_dp->output_reg);  in cdv_intel_dp_complete_link_train()
1684 	if ((REG_READ(intel_dp->output_reg) & DP_PORT_EN) == 0)  in cdv_intel_dp_link_down()
1694 	REG_READ(intel_dp->output_reg);  in cdv_intel_dp_link_down()
1699 	REG_READ(intel_dp->output_reg);  in cdv_intel_dp_link_down()
1981 	reg_value = REG_READ(DSPCLK_GATE_D);  in cdv_disable_intel_clock_gating()
2071 		pp_on = REG_READ(PP_CONTROL);  in cdv_intel_dp_init()
2077 		pwm_ctrl = REG_READ(BLC_PWM_CTL2);  in cdv_intel_dp_init()
2081                 pp_on = REG_READ(PP_ON_DELAYS);  in cdv_intel_dp_init()
2082                 pp_off = REG_READ(PP_OFF_DELAYS);  in cdv_intel_dp_init()
2083                 pp_div = REG_READ(PP_DIVISOR);  in cdv_intel_dp_init()