Lines Matching refs:oa
389 *out_config = &dev_priv->perf.oa.test_config; in get_oa_config()
390 atomic_inc(&dev_priv->perf.oa.test_config.ref_count); in get_oa_config()
447 int report_size = dev_priv->perf.oa.oa_buffer.format_size; in oa_buffer_check_unlocked()
457 spin_lock_irqsave(&dev_priv->perf.oa.oa_buffer.ptr_lock, flags); in oa_buffer_check_unlocked()
463 head = dev_priv->perf.oa.oa_buffer.head; in oa_buffer_check_unlocked()
465 aged_idx = dev_priv->perf.oa.oa_buffer.aged_tail_idx; in oa_buffer_check_unlocked()
466 aged_tail = dev_priv->perf.oa.oa_buffer.tails[aged_idx].offset; in oa_buffer_check_unlocked()
467 aging_tail = dev_priv->perf.oa.oa_buffer.tails[!aged_idx].offset; in oa_buffer_check_unlocked()
469 hw_tail = dev_priv->perf.oa.ops.oa_hw_tail_read(dev_priv); in oa_buffer_check_unlocked()
489 ((now - dev_priv->perf.oa.oa_buffer.aging_timestamp) > in oa_buffer_check_unlocked()
493 dev_priv->perf.oa.oa_buffer.aged_tail_idx = aged_idx; in oa_buffer_check_unlocked()
498 dev_priv->perf.oa.oa_buffer.tails[!aged_idx].offset = INVALID_TAIL_PTR; in oa_buffer_check_unlocked()
513 struct i915_vma *vma = dev_priv->perf.oa.oa_buffer.vma; in oa_buffer_check_unlocked()
522 dev_priv->perf.oa.oa_buffer.tails[!aged_idx].offset = in oa_buffer_check_unlocked()
524 dev_priv->perf.oa.oa_buffer.aging_timestamp = now; in oa_buffer_check_unlocked()
531 spin_unlock_irqrestore(&dev_priv->perf.oa.oa_buffer.ptr_lock, flags); in oa_buffer_check_unlocked()
595 int report_size = dev_priv->perf.oa.oa_buffer.format_size; in append_oa_sample()
647 int report_size = dev_priv->perf.oa.oa_buffer.format_size; in gen8_append_oa_reports()
648 u8 *oa_buf_base = dev_priv->perf.oa.oa_buffer.vaddr; in gen8_append_oa_reports()
649 u32 gtt_offset = i915_ggtt_offset(dev_priv->perf.oa.oa_buffer.vma); in gen8_append_oa_reports()
661 spin_lock_irqsave(&dev_priv->perf.oa.oa_buffer.ptr_lock, flags); in gen8_append_oa_reports()
663 head = dev_priv->perf.oa.oa_buffer.head; in gen8_append_oa_reports()
664 aged_tail_idx = dev_priv->perf.oa.oa_buffer.aged_tail_idx; in gen8_append_oa_reports()
665 tail = dev_priv->perf.oa.oa_buffer.tails[aged_tail_idx].offset; in gen8_append_oa_reports()
667 spin_unlock_irqrestore(&dev_priv->perf.oa.oa_buffer.ptr_lock, flags); in gen8_append_oa_reports()
731 if (__ratelimit(&dev_priv->perf.oa.spurious_report_rs)) in gen8_append_oa_reports()
751 if (!(report32[0] & dev_priv->perf.oa.gen8_valid_ctx_bit)) in gen8_append_oa_reports()
785 if (!dev_priv->perf.oa.exclusive_stream->ctx || in gen8_append_oa_reports()
786 dev_priv->perf.oa.specific_ctx_id == ctx_id || in gen8_append_oa_reports()
787 (dev_priv->perf.oa.oa_buffer.last_ctx_id == in gen8_append_oa_reports()
788 dev_priv->perf.oa.specific_ctx_id) || in gen8_append_oa_reports()
795 if (dev_priv->perf.oa.exclusive_stream->ctx && in gen8_append_oa_reports()
796 dev_priv->perf.oa.specific_ctx_id != ctx_id) { in gen8_append_oa_reports()
805 dev_priv->perf.oa.oa_buffer.last_ctx_id = ctx_id; in gen8_append_oa_reports()
819 spin_lock_irqsave(&dev_priv->perf.oa.oa_buffer.ptr_lock, flags); in gen8_append_oa_reports()
828 dev_priv->perf.oa.oa_buffer.head = head; in gen8_append_oa_reports()
830 spin_unlock_irqrestore(&dev_priv->perf.oa.oa_buffer.ptr_lock, flags); in gen8_append_oa_reports()
865 if (WARN_ON(!dev_priv->perf.oa.oa_buffer.vaddr)) in gen8_oa_read()
891 dev_priv->perf.oa.period_exponent); in gen8_oa_read()
893 dev_priv->perf.oa.ops.oa_disable(dev_priv); in gen8_oa_read()
894 dev_priv->perf.oa.ops.oa_enable(dev_priv); in gen8_oa_read()
941 int report_size = dev_priv->perf.oa.oa_buffer.format_size; in gen7_append_oa_reports()
942 u8 *oa_buf_base = dev_priv->perf.oa.oa_buffer.vaddr; in gen7_append_oa_reports()
943 u32 gtt_offset = i915_ggtt_offset(dev_priv->perf.oa.oa_buffer.vma); in gen7_append_oa_reports()
955 spin_lock_irqsave(&dev_priv->perf.oa.oa_buffer.ptr_lock, flags); in gen7_append_oa_reports()
957 head = dev_priv->perf.oa.oa_buffer.head; in gen7_append_oa_reports()
958 aged_tail_idx = dev_priv->perf.oa.oa_buffer.aged_tail_idx; in gen7_append_oa_reports()
959 tail = dev_priv->perf.oa.oa_buffer.tails[aged_tail_idx].offset; in gen7_append_oa_reports()
961 spin_unlock_irqrestore(&dev_priv->perf.oa.oa_buffer.ptr_lock, flags); in gen7_append_oa_reports()
1014 if (__ratelimit(&dev_priv->perf.oa.spurious_report_rs)) in gen7_append_oa_reports()
1033 spin_lock_irqsave(&dev_priv->perf.oa.oa_buffer.ptr_lock, flags); in gen7_append_oa_reports()
1043 dev_priv->perf.oa.oa_buffer.head = head; in gen7_append_oa_reports()
1045 spin_unlock_irqrestore(&dev_priv->perf.oa.oa_buffer.ptr_lock, flags); in gen7_append_oa_reports()
1076 if (WARN_ON(!dev_priv->perf.oa.oa_buffer.vaddr)) in gen7_oa_read()
1086 oastatus1 &= ~dev_priv->perf.oa.gen7_latched_oastatus1; in gen7_oa_read()
1115 dev_priv->perf.oa.period_exponent); in gen7_oa_read()
1117 dev_priv->perf.oa.ops.oa_disable(dev_priv); in gen7_oa_read()
1118 dev_priv->perf.oa.ops.oa_enable(dev_priv); in gen7_oa_read()
1128 dev_priv->perf.oa.gen7_latched_oastatus1 |= in gen7_oa_read()
1154 if (!dev_priv->perf.oa.periodic) in i915_oa_wait_unlocked()
1157 return wait_event_interruptible(dev_priv->perf.oa.poll_wq, in i915_oa_wait_unlocked()
1177 poll_wait(file, &dev_priv->perf.oa.poll_wq, wait); in i915_oa_poll_wait()
1199 return dev_priv->perf.oa.ops.read(stream, buf, count, offset); in i915_oa_read()
1217 dev_priv->perf.oa.specific_ctx_id = stream->ctx->hw_id; in oa_get_render_ctx_id()
1244 dev_priv->perf.oa.specific_ctx_id = in oa_get_render_ctx_id()
1263 dev_priv->perf.oa.specific_ctx_id = INVALID_CTX_ID; in oa_put_render_ctx_id()
1269 dev_priv->perf.oa.specific_ctx_id = INVALID_CTX_ID; in oa_put_render_ctx_id()
1281 i915_gem_object_unpin_map(i915->perf.oa.oa_buffer.vma->obj); in free_oa_buffer()
1282 i915_vma_unpin(i915->perf.oa.oa_buffer.vma); in free_oa_buffer()
1283 i915_gem_object_put(i915->perf.oa.oa_buffer.vma->obj); in free_oa_buffer()
1285 i915->perf.oa.oa_buffer.vma = NULL; in free_oa_buffer()
1286 i915->perf.oa.oa_buffer.vaddr = NULL; in free_oa_buffer()
1295 BUG_ON(stream != dev_priv->perf.oa.exclusive_stream); in i915_oa_stream_destroy()
1302 dev_priv->perf.oa.exclusive_stream = NULL; in i915_oa_stream_destroy()
1303 dev_priv->perf.oa.ops.disable_metric_set(dev_priv); in i915_oa_stream_destroy()
1316 if (dev_priv->perf.oa.spurious_report_rs.missed) { in i915_oa_stream_destroy()
1318 dev_priv->perf.oa.spurious_report_rs.missed); in i915_oa_stream_destroy()
1324 u32 gtt_offset = i915_ggtt_offset(dev_priv->perf.oa.oa_buffer.vma); in gen7_init_oa_buffer()
1327 spin_lock_irqsave(&dev_priv->perf.oa.oa_buffer.ptr_lock, flags); in gen7_init_oa_buffer()
1333 dev_priv->perf.oa.oa_buffer.head = gtt_offset; in gen7_init_oa_buffer()
1340 dev_priv->perf.oa.oa_buffer.tails[0].offset = INVALID_TAIL_PTR; in gen7_init_oa_buffer()
1341 dev_priv->perf.oa.oa_buffer.tails[1].offset = INVALID_TAIL_PTR; in gen7_init_oa_buffer()
1343 spin_unlock_irqrestore(&dev_priv->perf.oa.oa_buffer.ptr_lock, flags); in gen7_init_oa_buffer()
1349 dev_priv->perf.oa.gen7_latched_oastatus1 = 0; in gen7_init_oa_buffer()
1362 memset(dev_priv->perf.oa.oa_buffer.vaddr, 0, OA_BUFFER_SIZE); in gen7_init_oa_buffer()
1367 dev_priv->perf.oa.pollin = false; in gen7_init_oa_buffer()
1372 u32 gtt_offset = i915_ggtt_offset(dev_priv->perf.oa.oa_buffer.vma); in gen8_init_oa_buffer()
1375 spin_lock_irqsave(&dev_priv->perf.oa.oa_buffer.ptr_lock, flags); in gen8_init_oa_buffer()
1379 dev_priv->perf.oa.oa_buffer.head = gtt_offset; in gen8_init_oa_buffer()
1396 dev_priv->perf.oa.oa_buffer.tails[0].offset = INVALID_TAIL_PTR; in gen8_init_oa_buffer()
1397 dev_priv->perf.oa.oa_buffer.tails[1].offset = INVALID_TAIL_PTR; in gen8_init_oa_buffer()
1404 dev_priv->perf.oa.oa_buffer.last_ctx_id = INVALID_CTX_ID; in gen8_init_oa_buffer()
1406 spin_unlock_irqrestore(&dev_priv->perf.oa.oa_buffer.ptr_lock, flags); in gen8_init_oa_buffer()
1420 memset(dev_priv->perf.oa.oa_buffer.vaddr, 0, OA_BUFFER_SIZE); in gen8_init_oa_buffer()
1426 dev_priv->perf.oa.pollin = false; in gen8_init_oa_buffer()
1435 if (WARN_ON(dev_priv->perf.oa.oa_buffer.vma)) in alloc_oa_buffer()
1462 dev_priv->perf.oa.oa_buffer.vma = vma; in alloc_oa_buffer()
1464 dev_priv->perf.oa.oa_buffer.vaddr = in alloc_oa_buffer()
1466 if (IS_ERR(dev_priv->perf.oa.oa_buffer.vaddr)) { in alloc_oa_buffer()
1467 ret = PTR_ERR(dev_priv->perf.oa.oa_buffer.vaddr); in alloc_oa_buffer()
1471 dev_priv->perf.oa.ops.init_oa_buffer(dev_priv); in alloc_oa_buffer()
1474 i915_ggtt_offset(dev_priv->perf.oa.oa_buffer.vma), in alloc_oa_buffer()
1475 dev_priv->perf.oa.oa_buffer.vaddr); in alloc_oa_buffer()
1485 dev_priv->perf.oa.oa_buffer.vaddr = NULL; in alloc_oa_buffer()
1486 dev_priv->perf.oa.oa_buffer.vma = NULL; in alloc_oa_buffer()
1577 u32 ctx_oactxctrl = dev_priv->perf.oa.ctx_oactxctrl_offset; in gen8_update_reg_state_unlocked()
1578 u32 ctx_flexeu0 = dev_priv->perf.oa.ctx_flexeu0_offset; in gen8_update_reg_state_unlocked()
1592 reg_state[ctx_oactxctrl+1] = (dev_priv->perf.oa.period_exponent << in gen8_update_reg_state_unlocked()
1594 (dev_priv->perf.oa.periodic ? in gen8_update_reg_state_unlocked()
1653 *cs++ = (dev_priv->perf.oa.period_exponent << GEN8_OA_TIMER_PERIOD_SHIFT) | in gen8_emit_oa_config()
1654 (dev_priv->perf.oa.periodic ? GEN8_OA_TIMER_ENABLE : 0) | in gen8_emit_oa_config()
1888 if (dev_priv->perf.oa.exclusive_stream->enabled) { in gen7_oa_enable()
1890 dev_priv->perf.oa.exclusive_stream->ctx; in gen7_oa_enable()
1891 u32 ctx_id = dev_priv->perf.oa.specific_ctx_id; in gen7_oa_enable()
1893 bool periodic = dev_priv->perf.oa.periodic; in gen7_oa_enable()
1894 u32 period_exponent = dev_priv->perf.oa.period_exponent; in gen7_oa_enable()
1895 u32 report_format = dev_priv->perf.oa.oa_buffer.format; in gen7_oa_enable()
1911 u32 report_format = dev_priv->perf.oa.oa_buffer.format; in gen8_oa_enable()
1947 dev_priv->perf.oa.ops.oa_enable(dev_priv); in i915_oa_stream_enable()
1949 if (dev_priv->perf.oa.periodic) in i915_oa_stream_enable()
1950 hrtimer_start(&dev_priv->perf.oa.poll_check_timer, in i915_oa_stream_enable()
1977 dev_priv->perf.oa.ops.oa_disable(dev_priv); in i915_oa_stream_disable()
1979 if (dev_priv->perf.oa.periodic) in i915_oa_stream_disable()
1980 hrtimer_cancel(&dev_priv->perf.oa.poll_check_timer); in i915_oa_stream_disable()
2032 if (!dev_priv->perf.oa.ops.init_oa_buffer) { in i915_oa_stream_init()
2041 if (dev_priv->perf.oa.exclusive_stream) { in i915_oa_stream_init()
2062 ratelimit_state_init(&dev_priv->perf.oa.spurious_report_rs, in i915_oa_stream_init()
2068 ratelimit_set_flags(&dev_priv->perf.oa.spurious_report_rs, in i915_oa_stream_init()
2073 format_size = dev_priv->perf.oa.oa_formats[props->oa_format].size; in i915_oa_stream_init()
2078 dev_priv->perf.oa.oa_buffer.format_size = format_size; in i915_oa_stream_init()
2079 if (WARN_ON(dev_priv->perf.oa.oa_buffer.format_size == 0)) in i915_oa_stream_init()
2082 dev_priv->perf.oa.oa_buffer.format = in i915_oa_stream_init()
2083 dev_priv->perf.oa.oa_formats[props->oa_format].format; in i915_oa_stream_init()
2085 dev_priv->perf.oa.periodic = props->oa_periodic; in i915_oa_stream_init()
2086 if (dev_priv->perf.oa.periodic) in i915_oa_stream_init()
2087 dev_priv->perf.oa.period_exponent = props->oa_period_exponent; in i915_oa_stream_init()
2122 ret = dev_priv->perf.oa.ops.enable_metric_set(dev_priv, in i915_oa_stream_init()
2129 dev_priv->perf.oa.exclusive_stream = stream; in i915_oa_stream_init()
2136 dev_priv->perf.oa.ops.disable_metric_set(dev_priv); in i915_oa_stream_init()
2164 stream = engine->i915->perf.oa.exclusive_stream; in i915_oa_init_reg_state()
2282 dev_priv->perf.oa.pollin = false; in i915_perf_read()
2292 perf.oa.poll_check_timer); in oa_poll_check_timer_cb()
2295 dev_priv->perf.oa.pollin = true; in oa_poll_check_timer_cb()
2296 wake_up(&dev_priv->perf.oa.poll_wq); in oa_poll_check_timer_cb()
2335 if (dev_priv->perf.oa.pollin) in i915_perf_poll_locked()
2669 dev_priv->perf.oa.timestamp_frequency); in oa_exponent_to_ns()
2752 if (!dev_priv->perf.oa.oa_formats[value].size) { in read_properties_unlocked()
2896 sysfs_attr_init(&dev_priv->perf.oa.test_config.sysfs_metric_id.attr); in i915_perf_register()
2922 if (dev_priv->perf.oa.test_config.id == 0) in i915_perf_register()
2926 &dev_priv->perf.oa.test_config.sysfs_metric); in i915_perf_register()
2930 atomic_set(&dev_priv->perf.oa.test_config.ref_count, 1); in i915_perf_register()
2957 &dev_priv->perf.oa.test_config.sysfs_metric); in i915_perf_unregister()
3185 dev_priv->perf.oa.ops.is_valid_mux_reg, in i915_perf_add_config_ioctl()
3198 dev_priv->perf.oa.ops.is_valid_b_counter_reg, in i915_perf_add_config_ioctl()
3217 dev_priv->perf.oa.ops.is_valid_flex_reg, in i915_perf_add_config_ioctl()
3378 dev_priv->perf.oa.timestamp_frequency = 0; in i915_perf_init()
3381 dev_priv->perf.oa.ops.is_valid_b_counter_reg = in i915_perf_init()
3383 dev_priv->perf.oa.ops.is_valid_mux_reg = in i915_perf_init()
3385 dev_priv->perf.oa.ops.is_valid_flex_reg = NULL; in i915_perf_init()
3386 dev_priv->perf.oa.ops.init_oa_buffer = gen7_init_oa_buffer; in i915_perf_init()
3387 dev_priv->perf.oa.ops.enable_metric_set = hsw_enable_metric_set; in i915_perf_init()
3388 dev_priv->perf.oa.ops.disable_metric_set = hsw_disable_metric_set; in i915_perf_init()
3389 dev_priv->perf.oa.ops.oa_enable = gen7_oa_enable; in i915_perf_init()
3390 dev_priv->perf.oa.ops.oa_disable = gen7_oa_disable; in i915_perf_init()
3391 dev_priv->perf.oa.ops.read = gen7_oa_read; in i915_perf_init()
3392 dev_priv->perf.oa.ops.oa_hw_tail_read = in i915_perf_init()
3395 dev_priv->perf.oa.timestamp_frequency = 12500000; in i915_perf_init()
3397 dev_priv->perf.oa.oa_formats = hsw_oa_formats; in i915_perf_init()
3405 dev_priv->perf.oa.ops.is_valid_b_counter_reg = in i915_perf_init()
3407 dev_priv->perf.oa.ops.is_valid_mux_reg = in i915_perf_init()
3409 dev_priv->perf.oa.ops.is_valid_flex_reg = in i915_perf_init()
3412 dev_priv->perf.oa.ops.init_oa_buffer = gen8_init_oa_buffer; in i915_perf_init()
3413 dev_priv->perf.oa.ops.enable_metric_set = gen8_enable_metric_set; in i915_perf_init()
3414 dev_priv->perf.oa.ops.disable_metric_set = gen8_disable_metric_set; in i915_perf_init()
3415 dev_priv->perf.oa.ops.oa_enable = gen8_oa_enable; in i915_perf_init()
3416 dev_priv->perf.oa.ops.oa_disable = gen8_oa_disable; in i915_perf_init()
3417 dev_priv->perf.oa.ops.read = gen8_oa_read; in i915_perf_init()
3418 dev_priv->perf.oa.ops.oa_hw_tail_read = gen8_oa_hw_tail_read; in i915_perf_init()
3420 dev_priv->perf.oa.oa_formats = gen8_plus_oa_formats; in i915_perf_init()
3423 dev_priv->perf.oa.ctx_oactxctrl_offset = 0x120; in i915_perf_init()
3424 dev_priv->perf.oa.ctx_flexeu0_offset = 0x2ce; in i915_perf_init()
3426 dev_priv->perf.oa.timestamp_frequency = 12500000; in i915_perf_init()
3428 dev_priv->perf.oa.gen8_valid_ctx_bit = (1<<25); in i915_perf_init()
3430 dev_priv->perf.oa.ops.is_valid_mux_reg = in i915_perf_init()
3434 dev_priv->perf.oa.ctx_oactxctrl_offset = 0x128; in i915_perf_init()
3435 dev_priv->perf.oa.ctx_flexeu0_offset = 0x3de; in i915_perf_init()
3437 dev_priv->perf.oa.gen8_valid_ctx_bit = (1<<16); in i915_perf_init()
3442 dev_priv->perf.oa.timestamp_frequency = 19200000; in i915_perf_init()
3446 dev_priv->perf.oa.timestamp_frequency = 12000000; in i915_perf_init()
3457 if (dev_priv->perf.oa.timestamp_frequency) { in i915_perf_init()
3458 hrtimer_init(&dev_priv->perf.oa.poll_check_timer, in i915_perf_init()
3460 dev_priv->perf.oa.poll_check_timer.function = oa_poll_check_timer_cb; in i915_perf_init()
3461 init_waitqueue_head(&dev_priv->perf.oa.poll_wq); in i915_perf_init()
3465 spin_lock_init(&dev_priv->perf.oa.oa_buffer.ptr_lock); in i915_perf_init()
3468 dev_priv->perf.oa.timestamp_frequency / 2; in i915_perf_init()
3502 memset(&dev_priv->perf.oa.ops, 0, sizeof(dev_priv->perf.oa.ops)); in i915_perf_fini()