667 					if (!intel_PLL_is_valid(to_i915(dev),  in i9xx_find_best_dpll()
723 					if (!intel_PLL_is_valid(to_i915(dev),  in pnv_find_best_dpll()
784 					if (!intel_PLL_is_valid(to_i915(dev),  in g4x_find_best_dpll()
817 	if (IS_CHERRYVIEW(to_i915(dev))) {  in vlv_PLL_is_optimal()
881 					if (!intel_PLL_is_valid(to_i915(dev),  in vlv_find_best_dpll()
950 			if (!intel_PLL_is_valid(to_i915(dev), limit, &clock))  in chv_find_best_dpll()
1024 	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);  in wait_for_pipe_scanline_moving()
1061 	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);  in intel_wait_for_pipe_off()
1255 	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);  in assert_planes_disabled()
1405 	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);  in _vlv_enable_pll()
1423 	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);  in vlv_enable_pll()
1442 	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);  in _chv_enable_pll()
1474 	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);  in chv_enable_pll()
1523 	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);  in i9xx_enable_pll()
1591 	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);  in i9xx_disable_pll()
1832 	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);  in intel_crtc_pch_transcoder()
1852 	struct drm_i915_private *dev_priv = to_i915(dev);  in intel_enable_pipe()
1917 	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);  in intel_disable_pipe()
1960 	struct drm_i915_private *dev_priv = to_i915(fb->dev);  in intel_tile_width_bytes()
2011 		return intel_tile_size(to_i915(fb->dev)) /  in intel_tile_height()
2024 	*tile_height = intel_tile_size(to_i915(fb->dev)) / tile_width_bytes;  in intel_tile_dims()
2087 	struct drm_i915_private *dev_priv = to_i915(fb->dev);  in intel_surf_alignment()
2115 	struct drm_i915_private *dev_priv = to_i915(dev);  in intel_pin_and_fence_fb_obj()
2268 	const struct drm_i915_private *dev_priv = to_i915(fb->dev);  in _intel_adjust_tile_offset()
2384 	struct drm_i915_private *dev_priv = to_i915(intel_plane->base.dev);  in intel_compute_tile_offset()
2403 	struct drm_i915_private *dev_priv = to_i915(fb->dev);  in intel_fb_offset_to_xy()
2683 	struct drm_i915_private *dev_priv = to_i915(dev);  in intel_alloc_initial_plane_obj()
2781 	struct drm_i915_private *dev_priv = to_i915(dev);  in intel_find_initial_plane_obj()
3158 		to_i915(plane_state->base.plane->dev);  in i9xx_plane_ctl()
3219 		to_i915(plane_state->base.plane->dev);  in i9xx_check_plane_surface()
3257 	struct drm_i915_private *dev_priv = to_i915(primary->base.dev);  in i9xx_update_primary_plane()
3323 	struct drm_i915_private *dev_priv = to_i915(primary->base.dev);  in i9xx_disable_primary_plane()
3342 	struct drm_i915_private *dev_priv = to_i915(primary->base.dev);  in i9xx_plane_get_hw_state()
3376 	struct drm_i915_private *dev_priv = to_i915(dev);  in skl_detach_scaler()
3511 		to_i915(plane_state->base.plane->dev);  in skl_plane_ctl()
3542 	struct drm_i915_private *dev_priv = to_i915(plane->base.dev);  in skylake_update_primary_plane()
3618 	struct drm_i915_private *dev_priv = to_i915(primary->base.dev);  in skylake_disable_primary_plane()
3642 	i915_redisable_vga(to_i915(dev));  in __intel_display_resume()
3662 	if (!HAS_GMCH_DISPLAY(to_i915(dev)))  in __intel_display_resume()
3793 	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);  in intel_update_pipe_config()
3830 	struct drm_i915_private *dev_priv = to_i915(dev);  in intel_fdi_normal_train()
3873 	struct drm_i915_private *dev_priv = to_i915(dev);  in ironlake_fdi_link_train()
3974 	struct drm_i915_private *dev_priv = to_i915(dev);  in gen6_fdi_link_train()
4107 	struct drm_i915_private *dev_priv = to_i915(dev);  in ivb_manual_fdi_link_train()
4225 	struct drm_i915_private *dev_priv = to_i915(dev);  in ironlake_fdi_pll_enable()
4262 	struct drm_i915_private *dev_priv = to_i915(dev);  in ironlake_fdi_pll_disable()
4292 	struct drm_i915_private *dev_priv = to_i915(dev);  in ironlake_fdi_disable()
4385 	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);  in lpt_program_iclkip()
4501 	struct drm_i915_private *dev_priv = to_i915(dev);  in ironlake_pch_transcoder_set_timings()
4523 	struct drm_i915_private *dev_priv = to_i915(dev);  in cpt_set_fdi_bc_bifurcation()
4593 	struct drm_i915_private *dev_priv = to_i915(dev);  in ironlake_pch_enable()
4683 	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);  in lpt_pch_enable()
4698 	struct drm_i915_private *dev_priv = to_i915(dev);  in cpt_verify_modeset()
4719 	struct drm_i915_private *dev_priv = to_i915(intel_crtc->base.dev);  in skl_update_scaler()
4886 	struct drm_i915_private *dev_priv = to_i915(dev);  in skylake_pfit_enable()
4908 	struct drm_i915_private *dev_priv = to_i915(dev);  in ironlake_pfit_enable()
4929 	struct drm_i915_private *dev_priv = to_i915(dev);  in hsw_enable_ips()
4968 	struct drm_i915_private *dev_priv = to_i915(dev);  in hsw_disable_ips()
5022 	struct drm_i915_private *dev_priv = to_i915(dev);  in intel_post_enable_primary()
5054 	struct drm_i915_private *dev_priv = to_i915(dev);  in intel_pre_disable_primary()
5081 	struct drm_i915_private *dev_priv = to_i915(dev);  in intel_pre_disable_primary_noatomic()
5111 	intel_frontbuffer_flip(to_i915(crtc->base.dev), pipe_config->fb_bits);  in intel_post_plane_update()
5136 	struct drm_i915_private *dev_priv = to_i915(dev);  in intel_pre_plane_update()
5226 	intel_frontbuffer_flip(to_i915(dev), INTEL_FRONTBUFFER_ALL_MASK(pipe));  in intel_crtc_disable_planes()
5354 	struct drm_i915_private *dev_priv = to_i915(dev);  in ironlake_crtc_enable()
5441 	return HAS_IPS(to_i915(crtc->base.dev)) && crtc->pipe == PIPE_A;  in hsw_crtc_supports_ips()
5448 	struct drm_i915_private *dev_priv = to_i915(crtc->dev);  in haswell_crtc_enable()
5559 	struct drm_i915_private *dev_priv = to_i915(dev);  in ironlake_pfit_disable()
5576 	struct drm_i915_private *dev_priv = to_i915(dev);  in ironlake_crtc_disable()
5636 	struct drm_i915_private *dev_priv = to_i915(crtc->dev);  in haswell_crtc_disable()
5675 	struct drm_i915_private *dev_priv = to_i915(dev);  in i9xx_pfit_enable()
5719 	struct drm_i915_private *dev_priv = to_i915(dev);  in get_crtc_power_domains()
5754 	struct drm_i915_private *dev_priv = to_i915(crtc->dev);  in modeset_get_crtc_power_domains()
5787 	struct drm_i915_private *dev_priv = to_i915(dev);  in valleyview_crtc_enable()
5801 		struct drm_i915_private *dev_priv = to_i915(dev);  in valleyview_crtc_enable()
5842 	struct drm_i915_private *dev_priv = to_i915(dev);  in i9xx_set_pll_dividers()
5855 	struct drm_i915_private *dev_priv = to_i915(dev);  in i9xx_crtc_enable()
5901 	struct drm_i915_private *dev_priv = to_i915(dev);  in i9xx_pfit_disable()
5918 	struct drm_i915_private *dev_priv = to_i915(dev);  in i9xx_crtc_disable()
5967 	struct drm_i915_private *dev_priv = to_i915(crtc->dev);  in intel_crtc_disable_noatomic()
6037 	struct drm_i915_private *dev_priv = to_i915(dev);  in intel_display_suspend()
6155 	struct drm_i915_private *dev_priv = to_i915(dev);  in ironlake_check_fdi_lanes()
6241 	link_bw = intel_fdi_link_freq(to_i915(dev), pipe_config);  in ironlake_fdi_compute_config()
6295 	struct drm_i915_private *dev_priv = to_i915(dev);  in hsw_compute_ips_config()
6304 	const struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);  in intel_crtc_supports_double_wide()
6348 	struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev);  in intel_crtc_compute_pixel_rate()
6363 	struct drm_i915_private *dev_priv = to_i915(dev);  in intel_crtc_compute_config()
6498 	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);  in i9xx_update_pll_dividers()
6556 	struct drm_i915_private *dev_priv = to_i915(dev);  in intel_pch_transcoder_set_m_n()
6569 	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);  in intel_cpu_transcoder_set_m_n()
6660 	struct drm_i915_private *dev_priv = to_i915(dev);  in vlv_prepare_pll()
6759 	struct drm_i915_private *dev_priv = to_i915(dev);  in chv_prepare_pll()
6919 	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);  in i9xx_compute_dpll()
6993 	struct drm_i915_private *dev_priv = to_i915(dev);  in i8xx_compute_dpll()
7028 	struct drm_i915_private *dev_priv = to_i915(intel_crtc->base.dev);  in intel_set_pipe_timings()
7090 	struct drm_i915_private *dev_priv = to_i915(dev);  in intel_set_pipe_src_size()
7105 	struct drm_i915_private *dev_priv = to_i915(dev);  in intel_get_pipe_timings()
7140 	struct drm_i915_private *dev_priv = to_i915(dev);  in intel_get_pipe_src_size()
7176 	struct drm_i915_private *dev_priv = to_i915(intel_crtc->base.dev);  in i9xx_set_pipeconf()
7242 	struct drm_i915_private *dev_priv = to_i915(dev);  in i8xx_crtc_compute_clock()
7278 	struct drm_i915_private *dev_priv = to_i915(dev);  in g4x_crtc_compute_clock()
7321 	struct drm_i915_private *dev_priv = to_i915(dev);  in pnv_crtc_compute_clock()
7355 	struct drm_i915_private *dev_priv = to_i915(dev);  in i9xx_crtc_compute_clock()
7430 	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);  in i9xx_get_pfit_config()
7458 	struct drm_i915_private *dev_priv = to_i915(dev);  in vlv_crtc_clock_get()
7486 	struct drm_i915_private *dev_priv = to_i915(dev);  in i9xx_get_initial_plane_config()
7553 	struct drm_i915_private *dev_priv = to_i915(dev);  in chv_crtc_clock_get()
7586 	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);  in i9xx_get_pipe_config()
8128 	struct drm_i915_private *dev_priv = to_i915(crtc->dev);  in ironlake_set_pipeconf()
8170 	struct drm_i915_private *dev_priv = to_i915(crtc->dev);  in haswell_set_pipeconf()
8189 	struct drm_i915_private *dev_priv = to_i915(crtc->dev);  in haswell_set_pipemisc()
8249 	struct drm_i915_private *dev_priv = to_i915(dev);  in ironlake_compute_dpll()
8349 	struct drm_i915_private *dev_priv = to_i915(dev);  in ironlake_crtc_compute_clock()
8406 	struct drm_i915_private *dev_priv = to_i915(dev);  in intel_pch_transcoder_get_m_n()
8423 	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);  in intel_cpu_transcoder_get_m_n()
8481 	struct drm_i915_private *dev_priv = to_i915(dev);  in skylake_get_pfit_config()
8512 	struct drm_i915_private *dev_priv = to_i915(dev);  in skylake_get_initial_plane_config()
8599 	struct drm_i915_private *dev_priv = to_i915(dev);  in ironlake_get_pfit_config()
8624 	struct drm_i915_private *dev_priv = to_i915(dev);  in ironlake_get_initial_plane_config()
8691 	struct drm_i915_private *dev_priv = to_i915(dev);  in ironlake_get_pipe_config()
9118 	struct drm_i915_private *dev_priv = to_i915(dev);  in hsw_get_transcoder_state()
9169 	struct drm_i915_private *dev_priv = to_i915(dev);  in bxt_get_dsi_transcoder_state()
9215 	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);  in haswell_get_ddi_port_state()
9259 	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);  in haswell_get_pipe_config()
9342 		to_i915(plane_state->base.plane->dev);  in intel_cursor_base()
9501 	struct drm_i915_private *dev_priv = to_i915(plane->base.dev);  in i845_update_cursor()
9550 	struct drm_i915_private *dev_priv = to_i915(plane->base.dev);  in i845_cursor_get_hw_state()
9569 		to_i915(plane_state->base.plane->dev);  in i9xx_cursor_ctl()
9604 		to_i915(plane_state->base.plane->dev);  in i9xx_cursor_size_ok()
9643 	struct drm_i915_private *dev_priv = to_i915(plane->base.dev);  in i9xx_check_cursor()
9695 	struct drm_i915_private *dev_priv = to_i915(plane->base.dev);  in i9xx_update_cursor()
9760 	struct drm_i915_private *dev_priv = to_i915(plane->base.dev);  in i9xx_cursor_get_hw_state()
9832 	obj = i915_gem_object_create(to_i915(dev),  in intel_framebuffer_create_for_mode()
9855 	struct drm_i915_private *dev_priv = to_i915(dev);  in mode_fits_in_fbdev()
9930 	struct drm_i915_private *dev_priv = to_i915(dev);  in intel_get_load_detect_pipe()
10128 	struct drm_i915_private *dev_priv = to_i915(dev);  in i9xx_pll_refclk()
10146 	struct drm_i915_private *dev_priv = to_i915(dev);  in i9xx_crtc_clock_get()
10253 	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);  in ironlake_pch_clock_get()
10272 	struct drm_i915_private *dev_priv = to_i915(dev);  in intel_crtc_mode_get()
10388 	struct drm_i915_private *dev_priv = to_i915(dev);  in intel_plane_atomic_calc_changes()
10519 	struct drm_i915_private *dev_priv = to_i915(dev);  in intel_crtc_atomic_check()
10658 	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);  in compute_baseline_pipe_bpp()
10715 	struct drm_i915_private *dev_priv = to_i915(dev);  in intel_dump_pipe_config()
10844 			if (WARN_ON(!HAS_DDI(to_i915(dev))))  in check_digital_port_conflicts()
10878 		to_i915(crtc_state->base.crtc->dev);  in clear_intel_crtc_state()
11402 	struct drm_i915_private *dev_priv = to_i915(crtc->dev);  in verify_wm_state()
11597 	struct drm_i915_private *dev_priv = to_i915(dev);  in verify_crtc_state()
11723 	struct drm_i915_private *dev_priv = to_i915(dev);  in verify_shared_dpll_state()
11763 	struct drm_i915_private *dev_priv = to_i915(dev);  in verify_disabled_dpll_state()
11781 	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);  in update_scanline_offset()
11829 	struct drm_i915_private *dev_priv = to_i915(dev);  in intel_modeset_clear_plls()
11971 	struct drm_i915_private *dev_priv = to_i915(state->dev);  in intel_modeset_checks()
12051 	struct drm_i915_private *dev_priv = to_i915(dev);  in calc_watermark_data()
12068 	struct drm_i915_private *dev_priv = to_i915(dev);  in intel_atomic_check()
12231 	struct drm_i915_private *dev_priv = to_i915(dev);  in intel_update_crtc()
12275 	struct drm_i915_private *dev_priv = to_i915(state->dev);  in skl_update_crtcs()
12363 	struct drm_i915_private *dev_priv = to_i915(intel_state->base.dev);  in intel_atomic_commit_fence_wait()
12388 	struct drm_i915_private *dev_priv = to_i915(dev);  in intel_atomic_commit_tail()
12567 				&to_i915(state->base.dev)->atomic_helper;  in intel_atomic_commit_ready()
12607 	struct drm_i915_private *dev_priv = to_i915(dev);  in intel_atomic_commit()
12707 	struct drm_i915_private *dev_priv = to_i915(plane->dev);  in intel_prepare_plane_fb()
12829 	dev_priv = to_i915(intel_crtc->base.dev);  in skl_max_scale()
12857 	struct drm_i915_private *dev_priv = to_i915(plane->base.dev);  in intel_check_primary_plane()
12904 	struct drm_i915_private *dev_priv = to_i915(dev);  in intel_begin_crtc_commit()
13025 	struct drm_i915_private *dev_priv = to_i915(plane->dev);  in intel_primary_plane_format_mod_supported()
13075 	struct drm_i915_private *dev_priv = to_i915(crtc->dev);  in intel_legacy_cursor_update()
13417 	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);  in intel_crtc_init_scalers()
13908 	struct drm_i915_private *dev_priv = to_i915(obj->base.dev);  in intel_framebuffer_init()
14254 	struct drm_i915_private *dev_priv = to_i915(dev);  in quirk_ssc_force_disable()
14265 	struct drm_i915_private *dev_priv = to_i915(dev);  in quirk_invert_brightness()
14273 	struct drm_i915_private *dev_priv = to_i915(dev);  in quirk_backlight_present()
14283 	struct drm_i915_private *dev_priv = to_i915(dev);  in quirk_increase_t12_delay()
14295 	struct drm_i915_private *dev_priv = to_i915(dev);  in quirk_increase_ddi_disabled_time()
14438 	struct drm_i915_private *dev_priv = to_i915(dev);  in intel_modeset_init_hw()
14456 	struct drm_i915_private *dev_priv = to_i915(dev);  in sanitize_watermarks()
14533 	struct drm_i915_private *dev_priv = to_i915(dev);  in intel_modeset_init()
14759 	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);  in intel_plane_mapping_ok()
14821 	struct drm_i915_private *dev_priv = to_i915(dev);  in intel_sanitize_crtc()
14953 	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);  in readout_plane_state()
14969 	struct drm_i915_private *dev_priv = to_i915(dev);  in intel_modeset_readout_hw_state()
15146 	struct drm_i915_private *dev_priv = to_i915(dev);  in intel_modeset_setup_hw_state()
15229 	struct drm_i915_private *dev_priv = to_i915(dev);  in intel_display_resume()
15262 	struct drm_i915_private *dev_priv = to_i915(dev);  in intel_modeset_gem_init()
15313 	struct drm_i915_private *dev_priv = to_i915(dev);  in intel_modeset_cleanup()