Lines Matching refs:inst
445 nv04_gr_set_ctx1(struct nvkm_device *device, u32 inst, u32 mask, u32 value) in nv04_gr_set_ctx1() argument
450 tmp = nvkm_rd32(device, 0x700000 + inst); in nv04_gr_set_ctx1()
453 nvkm_wr32(device, 0x700000 + inst, tmp); in nv04_gr_set_ctx1()
460 nv04_gr_set_ctx_val(struct nvkm_device *device, u32 inst, u32 mask, u32 value) in nv04_gr_set_ctx_val() argument
465 ctx1 = nvkm_rd32(device, 0x700000 + inst); in nv04_gr_set_ctx_val()
469 tmp = nvkm_rd32(device, 0x70000c + inst); in nv04_gr_set_ctx_val()
472 nvkm_wr32(device, 0x70000c + inst, tmp); in nv04_gr_set_ctx_val()
504 nv04_gr_set_ctx1(device, inst, 0x01000000, valid << 24); in nv04_gr_set_ctx_val()
508 nv04_gr_mthd_set_operation(struct nvkm_device *device, u32 inst, u32 data) in nv04_gr_mthd_set_operation() argument
516 nv04_gr_set_ctx1(device, inst, 0x00038000, data << 15); in nv04_gr_mthd_set_operation()
518 nv04_gr_set_ctx_val(device, inst, 0, 0); in nv04_gr_mthd_set_operation()
523 nv04_gr_mthd_surf3d_clip_h(struct nvkm_device *device, u32 inst, u32 data) in nv04_gr_mthd_surf3d_clip_h() argument
541 nv04_gr_mthd_surf3d_clip_v(struct nvkm_device *device, u32 inst, u32 data) in nv04_gr_mthd_surf3d_clip_v() argument
559 nv04_gr_mthd_bind_class(struct nvkm_device *device, u32 inst) in nv04_gr_mthd_bind_class() argument
561 return nvkm_rd32(device, 0x700000 + (inst << 4)); in nv04_gr_mthd_bind_class()
565 nv04_gr_mthd_bind_surf2d(struct nvkm_device *device, u32 inst, u32 data) in nv04_gr_mthd_bind_surf2d() argument
569 nv04_gr_set_ctx1(device, inst, 0x00004000, 0); in nv04_gr_mthd_bind_surf2d()
570 nv04_gr_set_ctx_val(device, inst, 0x02000000, 0); in nv04_gr_mthd_bind_surf2d()
573 nv04_gr_set_ctx1(device, inst, 0x00004000, 0); in nv04_gr_mthd_bind_surf2d()
574 nv04_gr_set_ctx_val(device, inst, 0x02000000, 0x02000000); in nv04_gr_mthd_bind_surf2d()
581 nv04_gr_mthd_bind_surf2d_swzsurf(struct nvkm_device *device, u32 inst, u32 data) in nv04_gr_mthd_bind_surf2d_swzsurf() argument
585 nv04_gr_set_ctx1(device, inst, 0x00004000, 0); in nv04_gr_mthd_bind_surf2d_swzsurf()
586 nv04_gr_set_ctx_val(device, inst, 0x02000000, 0); in nv04_gr_mthd_bind_surf2d_swzsurf()
589 nv04_gr_set_ctx1(device, inst, 0x00004000, 0); in nv04_gr_mthd_bind_surf2d_swzsurf()
590 nv04_gr_set_ctx_val(device, inst, 0x02000000, 0x02000000); in nv04_gr_mthd_bind_surf2d_swzsurf()
593 nv04_gr_set_ctx1(device, inst, 0x00004000, 0x00004000); in nv04_gr_mthd_bind_surf2d_swzsurf()
594 nv04_gr_set_ctx_val(device, inst, 0x02000000, 0x02000000); in nv04_gr_mthd_bind_surf2d_swzsurf()
601 nv01_gr_mthd_bind_patt(struct nvkm_device *device, u32 inst, u32 data) in nv01_gr_mthd_bind_patt() argument
605 nv04_gr_set_ctx_val(device, inst, 0x08000000, 0); in nv01_gr_mthd_bind_patt()
608 nv04_gr_set_ctx_val(device, inst, 0x08000000, 0x08000000); in nv01_gr_mthd_bind_patt()
615 nv04_gr_mthd_bind_patt(struct nvkm_device *device, u32 inst, u32 data) in nv04_gr_mthd_bind_patt() argument
619 nv04_gr_set_ctx_val(device, inst, 0x08000000, 0); in nv04_gr_mthd_bind_patt()
622 nv04_gr_set_ctx_val(device, inst, 0x08000000, 0x08000000); in nv04_gr_mthd_bind_patt()
629 nv04_gr_mthd_bind_rop(struct nvkm_device *device, u32 inst, u32 data) in nv04_gr_mthd_bind_rop() argument
633 nv04_gr_set_ctx_val(device, inst, 0x10000000, 0); in nv04_gr_mthd_bind_rop()
636 nv04_gr_set_ctx_val(device, inst, 0x10000000, 0x10000000); in nv04_gr_mthd_bind_rop()
643 nv04_gr_mthd_bind_beta1(struct nvkm_device *device, u32 inst, u32 data) in nv04_gr_mthd_bind_beta1() argument
647 nv04_gr_set_ctx_val(device, inst, 0x20000000, 0); in nv04_gr_mthd_bind_beta1()
650 nv04_gr_set_ctx_val(device, inst, 0x20000000, 0x20000000); in nv04_gr_mthd_bind_beta1()
657 nv04_gr_mthd_bind_beta4(struct nvkm_device *device, u32 inst, u32 data) in nv04_gr_mthd_bind_beta4() argument
661 nv04_gr_set_ctx_val(device, inst, 0x40000000, 0); in nv04_gr_mthd_bind_beta4()
664 nv04_gr_set_ctx_val(device, inst, 0x40000000, 0x40000000); in nv04_gr_mthd_bind_beta4()
671 nv04_gr_mthd_bind_surf_dst(struct nvkm_device *device, u32 inst, u32 data) in nv04_gr_mthd_bind_surf_dst() argument
675 nv04_gr_set_ctx_val(device, inst, 0x02000000, 0); in nv04_gr_mthd_bind_surf_dst()
678 nv04_gr_set_ctx_val(device, inst, 0x02000000, 0x02000000); in nv04_gr_mthd_bind_surf_dst()
685 nv04_gr_mthd_bind_surf_src(struct nvkm_device *device, u32 inst, u32 data) in nv04_gr_mthd_bind_surf_src() argument
689 nv04_gr_set_ctx_val(device, inst, 0x04000000, 0); in nv04_gr_mthd_bind_surf_src()
692 nv04_gr_set_ctx_val(device, inst, 0x04000000, 0x04000000); in nv04_gr_mthd_bind_surf_src()
699 nv04_gr_mthd_bind_surf_color(struct nvkm_device *device, u32 inst, u32 data) in nv04_gr_mthd_bind_surf_color() argument
703 nv04_gr_set_ctx_val(device, inst, 0x02000000, 0); in nv04_gr_mthd_bind_surf_color()
706 nv04_gr_set_ctx_val(device, inst, 0x02000000, 0x02000000); in nv04_gr_mthd_bind_surf_color()
713 nv04_gr_mthd_bind_surf_zeta(struct nvkm_device *device, u32 inst, u32 data) in nv04_gr_mthd_bind_surf_zeta() argument
717 nv04_gr_set_ctx_val(device, inst, 0x04000000, 0); in nv04_gr_mthd_bind_surf_zeta()
720 nv04_gr_set_ctx_val(device, inst, 0x04000000, 0x04000000); in nv04_gr_mthd_bind_surf_zeta()
727 nv01_gr_mthd_bind_clip(struct nvkm_device *device, u32 inst, u32 data) in nv01_gr_mthd_bind_clip() argument
731 nv04_gr_set_ctx1(device, inst, 0x2000, 0); in nv01_gr_mthd_bind_clip()
734 nv04_gr_set_ctx1(device, inst, 0x2000, 0x2000); in nv01_gr_mthd_bind_clip()
741 nv01_gr_mthd_bind_chroma(struct nvkm_device *device, u32 inst, u32 data) in nv01_gr_mthd_bind_chroma() argument
745 nv04_gr_set_ctx1(device, inst, 0x1000, 0); in nv01_gr_mthd_bind_chroma()
751 nv04_gr_set_ctx1(device, inst, 0x1000, 0x1000); in nv01_gr_mthd_bind_chroma()
758 nv03_gr_mthd_gdi(struct nvkm_device *device, u32 inst, u32 mthd, u32 data) in nv03_gr_mthd_gdi() argument
770 return func(device, inst, data); in nv03_gr_mthd_gdi()
774 nv04_gr_mthd_gdi(struct nvkm_device *device, u32 inst, u32 mthd, u32 data) in nv04_gr_mthd_gdi() argument
787 return func(device, inst, data); in nv04_gr_mthd_gdi()
791 nv01_gr_mthd_blit(struct nvkm_device *device, u32 inst, u32 mthd, u32 data) in nv01_gr_mthd_blit() argument
806 return func(device, inst, data); in nv01_gr_mthd_blit()
810 nv04_gr_mthd_blit(struct nvkm_device *device, u32 inst, u32 mthd, u32 data) in nv04_gr_mthd_blit() argument
825 return func(device, inst, data); in nv04_gr_mthd_blit()
829 nv04_gr_mthd_iifc(struct nvkm_device *device, u32 inst, u32 mthd, u32 data) in nv04_gr_mthd_iifc() argument
844 return func(device, inst, data); in nv04_gr_mthd_iifc()
848 nv01_gr_mthd_ifc(struct nvkm_device *device, u32 inst, u32 mthd, u32 data) in nv01_gr_mthd_ifc() argument
862 return func(device, inst, data); in nv01_gr_mthd_ifc()
866 nv04_gr_mthd_ifc(struct nvkm_device *device, u32 inst, u32 mthd, u32 data) in nv04_gr_mthd_ifc() argument
881 return func(device, inst, data); in nv04_gr_mthd_ifc()
885 nv03_gr_mthd_sifc(struct nvkm_device *device, u32 inst, u32 mthd, u32 data) in nv03_gr_mthd_sifc() argument
898 return func(device, inst, data); in nv03_gr_mthd_sifc()
902 nv04_gr_mthd_sifc(struct nvkm_device *device, u32 inst, u32 mthd, u32 data) in nv04_gr_mthd_sifc() argument
916 return func(device, inst, data); in nv04_gr_mthd_sifc()
920 nv03_gr_mthd_sifm(struct nvkm_device *device, u32 inst, u32 mthd, u32 data) in nv03_gr_mthd_sifm() argument
932 return func(device, inst, data); in nv03_gr_mthd_sifm()
936 nv04_gr_mthd_sifm(struct nvkm_device *device, u32 inst, u32 mthd, u32 data) in nv04_gr_mthd_sifm() argument
949 return func(device, inst, data); in nv04_gr_mthd_sifm()
953 nv04_gr_mthd_surf3d(struct nvkm_device *device, u32 inst, u32 mthd, u32 data) in nv04_gr_mthd_surf3d() argument
962 return func(device, inst, data); in nv04_gr_mthd_surf3d()
966 nv03_gr_mthd_ttri(struct nvkm_device *device, u32 inst, u32 mthd, u32 data) in nv03_gr_mthd_ttri() argument
976 return func(device, inst, data); in nv03_gr_mthd_ttri()
980 nv01_gr_mthd_prim(struct nvkm_device *device, u32 inst, u32 mthd, u32 data) in nv01_gr_mthd_prim() argument
993 return func(device, inst, data); in nv01_gr_mthd_prim()
997 nv04_gr_mthd_prim(struct nvkm_device *device, u32 inst, u32 mthd, u32 data) in nv04_gr_mthd_prim() argument
1011 return func(device, inst, data); in nv04_gr_mthd_prim()
1015 nv04_gr_mthd(struct nvkm_device *device, u32 inst, u32 mthd, u32 data) in nv04_gr_mthd() argument
1018 switch (nvkm_rd32(device, 0x700000 + inst) & 0x000000ff) { in nv04_gr_mthd()
1039 return func(device, inst, mthd, data); in nv04_gr_mthd()
1286 u32 inst = (nvkm_rd32(device, 0x40016c) & 0xffff) << 4; in nv04_gr_intr() local
1297 if (!nv04_gr_mthd(device, inst, mthd, data)) in nv04_gr_intr()