Lines Matching refs:gpu_addr
155 radeon_ring_write(ring, ib->gpu_addr & 0xffffffe0); /* base must be 32 byte aligned */ in cik_sdma_ring_ib_execute()
156 radeon_ring_write(ring, upper_32_bits(ib->gpu_addr)); in cik_sdma_ring_ib_execute()
204 u64 addr = rdev->fence_drv[fence->ring].gpu_addr; in cik_sdma_fence_ring_emit()
233 u64 addr = semaphore->gpu_addr; in cik_sdma_semaphore_ring_emit()
401 upper_32_bits(rdev->wb.gpu_addr + wb_offset) & 0xFFFFFFFF); in cik_sdma_gfx_resume()
403 ((rdev->wb.gpu_addr + wb_offset) & 0xFFFFFFFC)); in cik_sdma_gfx_resume()
408 WREG32(SDMA0_GFX_RB_BASE + reg_offset, ring->gpu_addr >> 8); in cik_sdma_gfx_resume()
409 WREG32(SDMA0_GFX_RB_BASE_HI + reg_offset, ring->gpu_addr >> 40); in cik_sdma_gfx_resume()
652 u64 gpu_addr; in cik_sdma_ring_test() local
659 gpu_addr = rdev->wb.gpu_addr + index; in cik_sdma_ring_test()
670 radeon_ring_write(ring, lower_32_bits(gpu_addr)); in cik_sdma_ring_test()
671 radeon_ring_write(ring, upper_32_bits(gpu_addr)); in cik_sdma_ring_test()
709 u64 gpu_addr; in cik_sdma_ib_test() local
716 gpu_addr = rdev->wb.gpu_addr + index; in cik_sdma_ib_test()
728 ib.ptr[1] = lower_32_bits(gpu_addr); in cik_sdma_ib_test()
729 ib.ptr[2] = upper_32_bits(gpu_addr); in cik_sdma_ib_test()