Lines Matching refs:rdev
36 static int kv_enable_nb_dpm(struct radeon_device *rdev,
38 static void kv_init_graphics_levels(struct radeon_device *rdev);
39 static int kv_calculate_ds_divider(struct radeon_device *rdev);
40 static int kv_calculate_nbps_level_settings(struct radeon_device *rdev);
41 static int kv_calculate_dpm_settings(struct radeon_device *rdev);
42 static void kv_enable_new_levels(struct radeon_device *rdev);
43 static void kv_program_nbps_index_settings(struct radeon_device *rdev,
45 static int kv_set_enabled_level(struct radeon_device *rdev, u32 level);
46 static int kv_set_enabled_levels(struct radeon_device *rdev);
47 static int kv_force_dpm_highest(struct radeon_device *rdev);
48 static int kv_force_dpm_lowest(struct radeon_device *rdev);
49 static void kv_apply_state_adjust_rules(struct radeon_device *rdev,
52 static int kv_set_thermal_temperature_range(struct radeon_device *rdev,
54 static int kv_init_fps_limits(struct radeon_device *rdev);
56 void kv_dpm_powergate_uvd(struct radeon_device *rdev, bool gate);
57 static void kv_dpm_powergate_vce(struct radeon_device *rdev, bool gate);
58 static void kv_dpm_powergate_samu(struct radeon_device *rdev, bool gate);
59 static void kv_dpm_powergate_acp(struct radeon_device *rdev, bool gate);
61 extern void cik_enter_rlc_safe_mode(struct radeon_device *rdev);
62 extern void cik_exit_rlc_safe_mode(struct radeon_device *rdev);
63 extern void cik_update_cg(struct radeon_device *rdev,
249 static struct kv_power_info *kv_get_pi(struct radeon_device *rdev) in kv_get_pi() argument
251 struct kv_power_info *pi = rdev->pm.dpm.priv; in kv_get_pi()
257 static void kv_program_local_cac_table(struct radeon_device *rdev,
282 static int kv_program_pt_config_registers(struct radeon_device *rdev, in kv_program_pt_config_registers() argument
331 static void kv_do_enable_didt(struct radeon_device *rdev, bool enable) in kv_do_enable_didt() argument
333 struct kv_power_info *pi = kv_get_pi(rdev); in kv_do_enable_didt()
373 static int kv_enable_didt(struct radeon_device *rdev, bool enable) in kv_enable_didt() argument
375 struct kv_power_info *pi = kv_get_pi(rdev); in kv_enable_didt()
382 cik_enter_rlc_safe_mode(rdev); in kv_enable_didt()
385 ret = kv_program_pt_config_registers(rdev, didt_config_kv); in kv_enable_didt()
387 cik_exit_rlc_safe_mode(rdev); in kv_enable_didt()
392 kv_do_enable_didt(rdev, enable); in kv_enable_didt()
394 cik_exit_rlc_safe_mode(rdev); in kv_enable_didt()
401 static void kv_initialize_hardware_cac_manager(struct radeon_device *rdev)
403 struct kv_power_info *pi = kv_get_pi(rdev);
408 kv_program_local_cac_table(rdev, sx_local_cac_cfg_kv, sx0_cac_config_reg);
412 kv_program_local_cac_table(rdev, mc0_local_cac_cfg_kv, mc0_cac_config_reg);
416 kv_program_local_cac_table(rdev, mc1_local_cac_cfg_kv, mc1_cac_config_reg);
420 kv_program_local_cac_table(rdev, mc2_local_cac_cfg_kv, mc2_cac_config_reg);
424 kv_program_local_cac_table(rdev, mc3_local_cac_cfg_kv, mc3_cac_config_reg);
428 kv_program_local_cac_table(rdev, cpl_local_cac_cfg_kv, cpl_cac_config_reg);
433 static int kv_enable_smc_cac(struct radeon_device *rdev, bool enable) in kv_enable_smc_cac() argument
435 struct kv_power_info *pi = kv_get_pi(rdev); in kv_enable_smc_cac()
440 ret = kv_notify_message_to_smu(rdev, PPSMC_MSG_EnableCac); in kv_enable_smc_cac()
446 kv_notify_message_to_smu(rdev, PPSMC_MSG_DisableCac); in kv_enable_smc_cac()
454 static int kv_process_firmware_header(struct radeon_device *rdev) in kv_process_firmware_header() argument
456 struct kv_power_info *pi = kv_get_pi(rdev); in kv_process_firmware_header()
460 ret = kv_read_smc_sram_dword(rdev, SMU7_FIRMWARE_HEADER_LOCATION + in kv_process_firmware_header()
467 ret = kv_read_smc_sram_dword(rdev, SMU7_FIRMWARE_HEADER_LOCATION + in kv_process_firmware_header()
477 static int kv_enable_dpm_voltage_scaling(struct radeon_device *rdev) in kv_enable_dpm_voltage_scaling() argument
479 struct kv_power_info *pi = kv_get_pi(rdev); in kv_enable_dpm_voltage_scaling()
484 ret = kv_copy_bytes_to_smc(rdev, in kv_enable_dpm_voltage_scaling()
493 static int kv_set_dpm_interval(struct radeon_device *rdev) in kv_set_dpm_interval() argument
495 struct kv_power_info *pi = kv_get_pi(rdev); in kv_set_dpm_interval()
500 ret = kv_copy_bytes_to_smc(rdev, in kv_set_dpm_interval()
509 static int kv_set_dpm_boot_state(struct radeon_device *rdev) in kv_set_dpm_boot_state() argument
511 struct kv_power_info *pi = kv_get_pi(rdev); in kv_set_dpm_boot_state()
514 ret = kv_copy_bytes_to_smc(rdev, in kv_set_dpm_boot_state()
523 static void kv_program_vc(struct radeon_device *rdev) in kv_program_vc() argument
528 static void kv_clear_vc(struct radeon_device *rdev) in kv_clear_vc() argument
533 static int kv_set_divider_value(struct radeon_device *rdev, in kv_set_divider_value() argument
536 struct kv_power_info *pi = kv_get_pi(rdev); in kv_set_divider_value()
540 ret = radeon_atom_get_clock_dividers(rdev, COMPUTE_ENGINE_PLL_PARAM, in kv_set_divider_value()
551 static u32 kv_convert_vid2_to_vid7(struct radeon_device *rdev, in kv_convert_vid2_to_vid7() argument
556 &rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk; in kv_convert_vid2_to_vid7()
573 static u32 kv_convert_vid7_to_vid2(struct radeon_device *rdev, in kv_convert_vid7_to_vid2() argument
578 &rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk; in kv_convert_vid7_to_vid2()
597 static u16 kv_convert_8bit_index_to_voltage(struct radeon_device *rdev, in kv_convert_8bit_index_to_voltage() argument
603 static u16 kv_convert_2bit_index_to_voltage(struct radeon_device *rdev, in kv_convert_2bit_index_to_voltage() argument
606 struct kv_power_info *pi = kv_get_pi(rdev); in kv_convert_2bit_index_to_voltage()
607 u32 vid_8bit = kv_convert_vid2_to_vid7(rdev, in kv_convert_2bit_index_to_voltage()
611 return kv_convert_8bit_index_to_voltage(rdev, (u16)vid_8bit); in kv_convert_2bit_index_to_voltage()
615 static int kv_set_vid(struct radeon_device *rdev, u32 index, u32 vid) in kv_set_vid() argument
617 struct kv_power_info *pi = kv_get_pi(rdev); in kv_set_vid()
621 cpu_to_be32(kv_convert_2bit_index_to_voltage(rdev, vid)); in kv_set_vid()
626 static int kv_set_at(struct radeon_device *rdev, u32 index, u32 at) in kv_set_at() argument
628 struct kv_power_info *pi = kv_get_pi(rdev); in kv_set_at()
635 static void kv_dpm_power_level_enable(struct radeon_device *rdev, in kv_dpm_power_level_enable() argument
638 struct kv_power_info *pi = kv_get_pi(rdev); in kv_dpm_power_level_enable()
643 static void kv_start_dpm(struct radeon_device *rdev) in kv_start_dpm() argument
650 kv_smc_dpm_enable(rdev, true); in kv_start_dpm()
653 static void kv_stop_dpm(struct radeon_device *rdev) in kv_stop_dpm() argument
655 kv_smc_dpm_enable(rdev, false); in kv_stop_dpm()
658 static void kv_start_am(struct radeon_device *rdev) in kv_start_am() argument
668 static void kv_reset_am(struct radeon_device *rdev) in kv_reset_am() argument
677 static int kv_freeze_sclk_dpm(struct radeon_device *rdev, bool freeze) in kv_freeze_sclk_dpm() argument
679 return kv_notify_message_to_smu(rdev, freeze ? in kv_freeze_sclk_dpm()
683 static int kv_force_lowest_valid(struct radeon_device *rdev) in kv_force_lowest_valid() argument
685 return kv_force_dpm_lowest(rdev); in kv_force_lowest_valid()
688 static int kv_unforce_levels(struct radeon_device *rdev) in kv_unforce_levels() argument
690 if (rdev->family == CHIP_KABINI || rdev->family == CHIP_MULLINS) in kv_unforce_levels()
691 return kv_notify_message_to_smu(rdev, PPSMC_MSG_NoForcedLevel); in kv_unforce_levels()
693 return kv_set_enabled_levels(rdev); in kv_unforce_levels()
696 static int kv_update_sclk_t(struct radeon_device *rdev) in kv_update_sclk_t() argument
698 struct kv_power_info *pi = kv_get_pi(rdev); in kv_update_sclk_t()
705 ret = kv_copy_bytes_to_smc(rdev, in kv_update_sclk_t()
714 static int kv_program_bootup_state(struct radeon_device *rdev) in kv_program_bootup_state() argument
716 struct kv_power_info *pi = kv_get_pi(rdev); in kv_program_bootup_state()
719 &rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk; in kv_program_bootup_state()
728 kv_dpm_power_level_enable(rdev, i, true); in kv_program_bootup_state()
742 kv_dpm_power_level_enable(rdev, i, true); in kv_program_bootup_state()
747 static int kv_enable_auto_thermal_throttling(struct radeon_device *rdev) in kv_enable_auto_thermal_throttling() argument
749 struct kv_power_info *pi = kv_get_pi(rdev); in kv_enable_auto_thermal_throttling()
754 ret = kv_copy_bytes_to_smc(rdev, in kv_enable_auto_thermal_throttling()
763 static int kv_upload_dpm_settings(struct radeon_device *rdev) in kv_upload_dpm_settings() argument
765 struct kv_power_info *pi = kv_get_pi(rdev); in kv_upload_dpm_settings()
768 ret = kv_copy_bytes_to_smc(rdev, in kv_upload_dpm_settings()
778 ret = kv_copy_bytes_to_smc(rdev, in kv_upload_dpm_settings()
792 static u32 kv_get_clk_bypass(struct radeon_device *rdev, u32 clk) in kv_get_clk_bypass() argument
794 struct kv_power_info *pi = kv_get_pi(rdev); in kv_get_clk_bypass()
817 static int kv_populate_uvd_table(struct radeon_device *rdev) in kv_populate_uvd_table() argument
819 struct kv_power_info *pi = kv_get_pi(rdev); in kv_populate_uvd_table()
821 &rdev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table; in kv_populate_uvd_table()
840 (u8)kv_get_clk_bypass(rdev, table->entries[i].vclk); in kv_populate_uvd_table()
842 (u8)kv_get_clk_bypass(rdev, table->entries[i].dclk); in kv_populate_uvd_table()
844 ret = radeon_atom_get_clock_dividers(rdev, COMPUTE_ENGINE_PLL_PARAM, in kv_populate_uvd_table()
850 ret = radeon_atom_get_clock_dividers(rdev, COMPUTE_ENGINE_PLL_PARAM, in kv_populate_uvd_table()
859 ret = kv_copy_bytes_to_smc(rdev, in kv_populate_uvd_table()
869 ret = kv_copy_bytes_to_smc(rdev, in kv_populate_uvd_table()
877 ret = kv_copy_bytes_to_smc(rdev, in kv_populate_uvd_table()
888 static int kv_populate_vce_table(struct radeon_device *rdev) in kv_populate_vce_table() argument
890 struct kv_power_info *pi = kv_get_pi(rdev); in kv_populate_vce_table()
894 &rdev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table; in kv_populate_vce_table()
910 (u8)kv_get_clk_bypass(rdev, table->entries[i].evclk); in kv_populate_vce_table()
912 ret = radeon_atom_get_clock_dividers(rdev, COMPUTE_ENGINE_PLL_PARAM, in kv_populate_vce_table()
921 ret = kv_copy_bytes_to_smc(rdev, in kv_populate_vce_table()
932 ret = kv_copy_bytes_to_smc(rdev, in kv_populate_vce_table()
941 ret = kv_copy_bytes_to_smc(rdev, in kv_populate_vce_table()
951 static int kv_populate_samu_table(struct radeon_device *rdev) in kv_populate_samu_table() argument
953 struct kv_power_info *pi = kv_get_pi(rdev); in kv_populate_samu_table()
955 &rdev->pm.dpm.dyn_state.samu_clock_voltage_dependency_table; in kv_populate_samu_table()
973 (u8)kv_get_clk_bypass(rdev, table->entries[i].clk); in kv_populate_samu_table()
975 ret = radeon_atom_get_clock_dividers(rdev, COMPUTE_ENGINE_PLL_PARAM, in kv_populate_samu_table()
984 ret = kv_copy_bytes_to_smc(rdev, in kv_populate_samu_table()
995 ret = kv_copy_bytes_to_smc(rdev, in kv_populate_samu_table()
1004 ret = kv_copy_bytes_to_smc(rdev, in kv_populate_samu_table()
1017 static int kv_populate_acp_table(struct radeon_device *rdev) in kv_populate_acp_table() argument
1019 struct kv_power_info *pi = kv_get_pi(rdev); in kv_populate_acp_table()
1021 &rdev->pm.dpm.dyn_state.acp_clock_voltage_dependency_table; in kv_populate_acp_table()
1034 ret = radeon_atom_get_clock_dividers(rdev, COMPUTE_ENGINE_PLL_PARAM, in kv_populate_acp_table()
1043 ret = kv_copy_bytes_to_smc(rdev, in kv_populate_acp_table()
1054 ret = kv_copy_bytes_to_smc(rdev, in kv_populate_acp_table()
1063 ret = kv_copy_bytes_to_smc(rdev, in kv_populate_acp_table()
1075 static void kv_calculate_dfs_bypass_settings(struct radeon_device *rdev) in kv_calculate_dfs_bypass_settings() argument
1077 struct kv_power_info *pi = kv_get_pi(rdev); in kv_calculate_dfs_bypass_settings()
1080 &rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk; in kv_calculate_dfs_bypass_settings()
1125 static int kv_enable_ulv(struct radeon_device *rdev, bool enable) in kv_enable_ulv() argument
1127 return kv_notify_message_to_smu(rdev, enable ? in kv_enable_ulv()
1131 static void kv_reset_acp_boot_level(struct radeon_device *rdev) in kv_reset_acp_boot_level() argument
1133 struct kv_power_info *pi = kv_get_pi(rdev); in kv_reset_acp_boot_level()
1138 static void kv_update_current_ps(struct radeon_device *rdev, in kv_update_current_ps() argument
1142 struct kv_power_info *pi = kv_get_pi(rdev); in kv_update_current_ps()
1149 static void kv_update_requested_ps(struct radeon_device *rdev, in kv_update_requested_ps() argument
1153 struct kv_power_info *pi = kv_get_pi(rdev); in kv_update_requested_ps()
1160 void kv_dpm_enable_bapm(struct radeon_device *rdev, bool enable) in kv_dpm_enable_bapm() argument
1162 struct kv_power_info *pi = kv_get_pi(rdev); in kv_dpm_enable_bapm()
1166 ret = kv_smc_bapm_enable(rdev, enable); in kv_dpm_enable_bapm()
1172 static void kv_enable_thermal_int(struct radeon_device *rdev, bool enable) in kv_enable_thermal_int() argument
1185 int kv_dpm_enable(struct radeon_device *rdev) in kv_dpm_enable() argument
1187 struct kv_power_info *pi = kv_get_pi(rdev); in kv_dpm_enable()
1190 ret = kv_process_firmware_header(rdev); in kv_dpm_enable()
1195 kv_init_fps_limits(rdev); in kv_dpm_enable()
1196 kv_init_graphics_levels(rdev); in kv_dpm_enable()
1197 ret = kv_program_bootup_state(rdev); in kv_dpm_enable()
1202 kv_calculate_dfs_bypass_settings(rdev); in kv_dpm_enable()
1203 ret = kv_upload_dpm_settings(rdev); in kv_dpm_enable()
1208 ret = kv_populate_uvd_table(rdev); in kv_dpm_enable()
1213 ret = kv_populate_vce_table(rdev); in kv_dpm_enable()
1218 ret = kv_populate_samu_table(rdev); in kv_dpm_enable()
1223 ret = kv_populate_acp_table(rdev); in kv_dpm_enable()
1228 kv_program_vc(rdev); in kv_dpm_enable()
1230 kv_initialize_hardware_cac_manager(rdev); in kv_dpm_enable()
1232 kv_start_am(rdev); in kv_dpm_enable()
1234 ret = kv_enable_auto_thermal_throttling(rdev); in kv_dpm_enable()
1240 ret = kv_enable_dpm_voltage_scaling(rdev); in kv_dpm_enable()
1245 ret = kv_set_dpm_interval(rdev); in kv_dpm_enable()
1250 ret = kv_set_dpm_boot_state(rdev); in kv_dpm_enable()
1255 ret = kv_enable_ulv(rdev, true); in kv_dpm_enable()
1260 kv_start_dpm(rdev); in kv_dpm_enable()
1261 ret = kv_enable_didt(rdev, true); in kv_dpm_enable()
1266 ret = kv_enable_smc_cac(rdev, true); in kv_dpm_enable()
1272 kv_reset_acp_boot_level(rdev); in kv_dpm_enable()
1274 ret = kv_smc_bapm_enable(rdev, false); in kv_dpm_enable()
1280 kv_update_current_ps(rdev, rdev->pm.dpm.boot_ps); in kv_dpm_enable()
1285 int kv_dpm_late_enable(struct radeon_device *rdev) in kv_dpm_late_enable() argument
1289 if (rdev->irq.installed && in kv_dpm_late_enable()
1290 r600_is_internal_thermal_sensor(rdev->pm.int_thermal_type)) { in kv_dpm_late_enable()
1291 ret = kv_set_thermal_temperature_range(rdev, R600_TEMP_RANGE_MIN, R600_TEMP_RANGE_MAX); in kv_dpm_late_enable()
1296 kv_enable_thermal_int(rdev, true); in kv_dpm_late_enable()
1300 kv_dpm_powergate_acp(rdev, true); in kv_dpm_late_enable()
1301 kv_dpm_powergate_samu(rdev, true); in kv_dpm_late_enable()
1302 kv_dpm_powergate_vce(rdev, true); in kv_dpm_late_enable()
1303 kv_dpm_powergate_uvd(rdev, true); in kv_dpm_late_enable()
1308 void kv_dpm_disable(struct radeon_device *rdev) in kv_dpm_disable() argument
1310 kv_smc_bapm_enable(rdev, false); in kv_dpm_disable()
1312 if (rdev->family == CHIP_MULLINS) in kv_dpm_disable()
1313 kv_enable_nb_dpm(rdev, false); in kv_dpm_disable()
1316 kv_dpm_powergate_acp(rdev, false); in kv_dpm_disable()
1317 kv_dpm_powergate_samu(rdev, false); in kv_dpm_disable()
1318 kv_dpm_powergate_vce(rdev, false); in kv_dpm_disable()
1319 kv_dpm_powergate_uvd(rdev, false); in kv_dpm_disable()
1321 kv_enable_smc_cac(rdev, false); in kv_dpm_disable()
1322 kv_enable_didt(rdev, false); in kv_dpm_disable()
1323 kv_clear_vc(rdev); in kv_dpm_disable()
1324 kv_stop_dpm(rdev); in kv_dpm_disable()
1325 kv_enable_ulv(rdev, false); in kv_dpm_disable()
1326 kv_reset_am(rdev); in kv_dpm_disable()
1327 kv_enable_thermal_int(rdev, false); in kv_dpm_disable()
1329 kv_update_current_ps(rdev, rdev->pm.dpm.boot_ps); in kv_dpm_disable()
1333 static int kv_write_smc_soft_register(struct radeon_device *rdev,
1336 struct kv_power_info *pi = kv_get_pi(rdev);
1338 return kv_copy_bytes_to_smc(rdev, pi->soft_regs_start + reg_offset,
1342 static int kv_read_smc_soft_register(struct radeon_device *rdev,
1345 struct kv_power_info *pi = kv_get_pi(rdev);
1347 return kv_read_smc_sram_dword(rdev, pi->soft_regs_start + reg_offset,
1352 static void kv_init_sclk_t(struct radeon_device *rdev) in kv_init_sclk_t() argument
1354 struct kv_power_info *pi = kv_get_pi(rdev); in kv_init_sclk_t()
1359 static int kv_init_fps_limits(struct radeon_device *rdev) in kv_init_fps_limits() argument
1361 struct kv_power_info *pi = kv_get_pi(rdev); in kv_init_fps_limits()
1369 ret = kv_copy_bytes_to_smc(rdev, in kv_init_fps_limits()
1378 ret = kv_copy_bytes_to_smc(rdev, in kv_init_fps_limits()
1388 static void kv_init_powergate_state(struct radeon_device *rdev) in kv_init_powergate_state() argument
1390 struct kv_power_info *pi = kv_get_pi(rdev); in kv_init_powergate_state()
1399 static int kv_enable_uvd_dpm(struct radeon_device *rdev, bool enable) in kv_enable_uvd_dpm() argument
1401 return kv_notify_message_to_smu(rdev, enable ? in kv_enable_uvd_dpm()
1405 static int kv_enable_vce_dpm(struct radeon_device *rdev, bool enable) in kv_enable_vce_dpm() argument
1407 return kv_notify_message_to_smu(rdev, enable ? in kv_enable_vce_dpm()
1411 static int kv_enable_samu_dpm(struct radeon_device *rdev, bool enable) in kv_enable_samu_dpm() argument
1413 return kv_notify_message_to_smu(rdev, enable ? in kv_enable_samu_dpm()
1417 static int kv_enable_acp_dpm(struct radeon_device *rdev, bool enable) in kv_enable_acp_dpm() argument
1419 return kv_notify_message_to_smu(rdev, enable ? in kv_enable_acp_dpm()
1423 static int kv_update_uvd_dpm(struct radeon_device *rdev, bool gate) in kv_update_uvd_dpm() argument
1425 struct kv_power_info *pi = kv_get_pi(rdev); in kv_update_uvd_dpm()
1427 &rdev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table; in kv_update_uvd_dpm()
1443 ret = kv_copy_bytes_to_smc(rdev, in kv_update_uvd_dpm()
1451 kv_send_msg_to_smc_with_parameter(rdev, in kv_update_uvd_dpm()
1456 return kv_enable_uvd_dpm(rdev, !gate); in kv_update_uvd_dpm()
1459 static u8 kv_get_vce_boot_level(struct radeon_device *rdev, u32 evclk) in kv_get_vce_boot_level() argument
1463 &rdev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table; in kv_get_vce_boot_level()
1473 static int kv_update_vce_dpm(struct radeon_device *rdev, in kv_update_vce_dpm() argument
1477 struct kv_power_info *pi = kv_get_pi(rdev); in kv_update_vce_dpm()
1479 &rdev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table; in kv_update_vce_dpm()
1483 kv_dpm_powergate_vce(rdev, false); in kv_update_vce_dpm()
1485 cik_update_cg(rdev, RADEON_CG_BLOCK_VCE, false); in kv_update_vce_dpm()
1489 pi->vce_boot_level = kv_get_vce_boot_level(rdev, radeon_new_state->evclk); in kv_update_vce_dpm()
1491 ret = kv_copy_bytes_to_smc(rdev, in kv_update_vce_dpm()
1501 kv_send_msg_to_smc_with_parameter(rdev, in kv_update_vce_dpm()
1505 kv_enable_vce_dpm(rdev, true); in kv_update_vce_dpm()
1507 kv_enable_vce_dpm(rdev, false); in kv_update_vce_dpm()
1509 cik_update_cg(rdev, RADEON_CG_BLOCK_VCE, true); in kv_update_vce_dpm()
1510 kv_dpm_powergate_vce(rdev, true); in kv_update_vce_dpm()
1516 static int kv_update_samu_dpm(struct radeon_device *rdev, bool gate) in kv_update_samu_dpm() argument
1518 struct kv_power_info *pi = kv_get_pi(rdev); in kv_update_samu_dpm()
1520 &rdev->pm.dpm.dyn_state.samu_clock_voltage_dependency_table; in kv_update_samu_dpm()
1529 ret = kv_copy_bytes_to_smc(rdev, in kv_update_samu_dpm()
1539 kv_send_msg_to_smc_with_parameter(rdev, in kv_update_samu_dpm()
1544 return kv_enable_samu_dpm(rdev, !gate); in kv_update_samu_dpm()
1547 static u8 kv_get_acp_boot_level(struct radeon_device *rdev) in kv_get_acp_boot_level() argument
1551 &rdev->pm.dpm.dyn_state.acp_clock_voltage_dependency_table; in kv_get_acp_boot_level()
1564 static void kv_update_acp_boot_level(struct radeon_device *rdev) in kv_update_acp_boot_level() argument
1566 struct kv_power_info *pi = kv_get_pi(rdev); in kv_update_acp_boot_level()
1570 acp_boot_level = kv_get_acp_boot_level(rdev); in kv_update_acp_boot_level()
1573 kv_send_msg_to_smc_with_parameter(rdev, in kv_update_acp_boot_level()
1580 static int kv_update_acp_dpm(struct radeon_device *rdev, bool gate) in kv_update_acp_dpm() argument
1582 struct kv_power_info *pi = kv_get_pi(rdev); in kv_update_acp_dpm()
1584 &rdev->pm.dpm.dyn_state.acp_clock_voltage_dependency_table; in kv_update_acp_dpm()
1591 pi->acp_boot_level = kv_get_acp_boot_level(rdev); in kv_update_acp_dpm()
1593 ret = kv_copy_bytes_to_smc(rdev, in kv_update_acp_dpm()
1603 kv_send_msg_to_smc_with_parameter(rdev, in kv_update_acp_dpm()
1608 return kv_enable_acp_dpm(rdev, !gate); in kv_update_acp_dpm()
1611 void kv_dpm_powergate_uvd(struct radeon_device *rdev, bool gate) in kv_dpm_powergate_uvd() argument
1613 struct kv_power_info *pi = kv_get_pi(rdev); in kv_dpm_powergate_uvd()
1622 uvd_v1_0_stop(rdev); in kv_dpm_powergate_uvd()
1623 cik_update_cg(rdev, RADEON_CG_BLOCK_UVD, false); in kv_dpm_powergate_uvd()
1625 kv_update_uvd_dpm(rdev, gate); in kv_dpm_powergate_uvd()
1627 kv_notify_message_to_smu(rdev, PPSMC_MSG_UVDPowerOFF); in kv_dpm_powergate_uvd()
1630 kv_notify_message_to_smu(rdev, PPSMC_MSG_UVDPowerON); in kv_dpm_powergate_uvd()
1631 uvd_v4_2_resume(rdev); in kv_dpm_powergate_uvd()
1632 uvd_v1_0_start(rdev); in kv_dpm_powergate_uvd()
1633 cik_update_cg(rdev, RADEON_CG_BLOCK_UVD, true); in kv_dpm_powergate_uvd()
1635 kv_update_uvd_dpm(rdev, gate); in kv_dpm_powergate_uvd()
1639 static void kv_dpm_powergate_vce(struct radeon_device *rdev, bool gate) in kv_dpm_powergate_vce() argument
1641 struct kv_power_info *pi = kv_get_pi(rdev); in kv_dpm_powergate_vce()
1651 kv_notify_message_to_smu(rdev, PPSMC_MSG_VCEPowerOFF); in kv_dpm_powergate_vce()
1655 kv_notify_message_to_smu(rdev, PPSMC_MSG_VCEPowerON); in kv_dpm_powergate_vce()
1656 vce_v2_0_resume(rdev); in kv_dpm_powergate_vce()
1657 vce_v1_0_start(rdev); in kv_dpm_powergate_vce()
1662 static void kv_dpm_powergate_samu(struct radeon_device *rdev, bool gate) in kv_dpm_powergate_samu() argument
1664 struct kv_power_info *pi = kv_get_pi(rdev); in kv_dpm_powergate_samu()
1672 kv_update_samu_dpm(rdev, true); in kv_dpm_powergate_samu()
1674 kv_notify_message_to_smu(rdev, PPSMC_MSG_SAMPowerOFF); in kv_dpm_powergate_samu()
1677 kv_notify_message_to_smu(rdev, PPSMC_MSG_SAMPowerON); in kv_dpm_powergate_samu()
1678 kv_update_samu_dpm(rdev, false); in kv_dpm_powergate_samu()
1682 static void kv_dpm_powergate_acp(struct radeon_device *rdev, bool gate) in kv_dpm_powergate_acp() argument
1684 struct kv_power_info *pi = kv_get_pi(rdev); in kv_dpm_powergate_acp()
1689 if (rdev->family == CHIP_KABINI || rdev->family == CHIP_MULLINS) in kv_dpm_powergate_acp()
1695 kv_update_acp_dpm(rdev, true); in kv_dpm_powergate_acp()
1697 kv_notify_message_to_smu(rdev, PPSMC_MSG_ACPPowerOFF); in kv_dpm_powergate_acp()
1700 kv_notify_message_to_smu(rdev, PPSMC_MSG_ACPPowerON); in kv_dpm_powergate_acp()
1701 kv_update_acp_dpm(rdev, false); in kv_dpm_powergate_acp()
1705 static void kv_set_valid_clock_range(struct radeon_device *rdev, in kv_set_valid_clock_range() argument
1709 struct kv_power_info *pi = kv_get_pi(rdev); in kv_set_valid_clock_range()
1712 &rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk; in kv_set_valid_clock_range()
1767 static int kv_update_dfs_bypass_settings(struct radeon_device *rdev, in kv_update_dfs_bypass_settings() argument
1771 struct kv_power_info *pi = kv_get_pi(rdev); in kv_update_dfs_bypass_settings()
1778 ret = kv_copy_bytes_to_smc(rdev, in kv_update_dfs_bypass_settings()
1790 static int kv_enable_nb_dpm(struct radeon_device *rdev, in kv_enable_nb_dpm() argument
1793 struct kv_power_info *pi = kv_get_pi(rdev); in kv_enable_nb_dpm()
1798 ret = kv_notify_message_to_smu(rdev, PPSMC_MSG_NBDPM_Enable); in kv_enable_nb_dpm()
1804 ret = kv_notify_message_to_smu(rdev, PPSMC_MSG_NBDPM_Disable); in kv_enable_nb_dpm()
1813 int kv_dpm_force_performance_level(struct radeon_device *rdev, in kv_dpm_force_performance_level() argument
1819 ret = kv_force_dpm_highest(rdev); in kv_dpm_force_performance_level()
1823 ret = kv_force_dpm_lowest(rdev); in kv_dpm_force_performance_level()
1827 ret = kv_unforce_levels(rdev); in kv_dpm_force_performance_level()
1832 rdev->pm.dpm.forced_level = level; in kv_dpm_force_performance_level()
1837 int kv_dpm_pre_set_power_state(struct radeon_device *rdev) in kv_dpm_pre_set_power_state() argument
1839 struct kv_power_info *pi = kv_get_pi(rdev); in kv_dpm_pre_set_power_state()
1840 struct radeon_ps requested_ps = *rdev->pm.dpm.requested_ps; in kv_dpm_pre_set_power_state()
1843 kv_update_requested_ps(rdev, new_ps); in kv_dpm_pre_set_power_state()
1845 kv_apply_state_adjust_rules(rdev, in kv_dpm_pre_set_power_state()
1852 int kv_dpm_set_power_state(struct radeon_device *rdev) in kv_dpm_set_power_state() argument
1854 struct kv_power_info *pi = kv_get_pi(rdev); in kv_dpm_set_power_state()
1860 ret = kv_smc_bapm_enable(rdev, rdev->pm.dpm.ac_power); in kv_dpm_set_power_state()
1867 if (rdev->family == CHIP_KABINI || rdev->family == CHIP_MULLINS) { in kv_dpm_set_power_state()
1869 kv_set_valid_clock_range(rdev, new_ps); in kv_dpm_set_power_state()
1870 kv_update_dfs_bypass_settings(rdev, new_ps); in kv_dpm_set_power_state()
1871 ret = kv_calculate_ds_divider(rdev); in kv_dpm_set_power_state()
1876 kv_calculate_nbps_level_settings(rdev); in kv_dpm_set_power_state()
1877 kv_calculate_dpm_settings(rdev); in kv_dpm_set_power_state()
1878 kv_force_lowest_valid(rdev); in kv_dpm_set_power_state()
1879 kv_enable_new_levels(rdev); in kv_dpm_set_power_state()
1880 kv_upload_dpm_settings(rdev); in kv_dpm_set_power_state()
1881 kv_program_nbps_index_settings(rdev, new_ps); in kv_dpm_set_power_state()
1882 kv_unforce_levels(rdev); in kv_dpm_set_power_state()
1883 kv_set_enabled_levels(rdev); in kv_dpm_set_power_state()
1884 kv_force_lowest_valid(rdev); in kv_dpm_set_power_state()
1885 kv_unforce_levels(rdev); in kv_dpm_set_power_state()
1887 ret = kv_update_vce_dpm(rdev, new_ps, old_ps); in kv_dpm_set_power_state()
1892 kv_update_sclk_t(rdev); in kv_dpm_set_power_state()
1893 if (rdev->family == CHIP_MULLINS) in kv_dpm_set_power_state()
1894 kv_enable_nb_dpm(rdev, true); in kv_dpm_set_power_state()
1898 kv_set_valid_clock_range(rdev, new_ps); in kv_dpm_set_power_state()
1899 kv_update_dfs_bypass_settings(rdev, new_ps); in kv_dpm_set_power_state()
1900 ret = kv_calculate_ds_divider(rdev); in kv_dpm_set_power_state()
1905 kv_calculate_nbps_level_settings(rdev); in kv_dpm_set_power_state()
1906 kv_calculate_dpm_settings(rdev); in kv_dpm_set_power_state()
1907 kv_freeze_sclk_dpm(rdev, true); in kv_dpm_set_power_state()
1908 kv_upload_dpm_settings(rdev); in kv_dpm_set_power_state()
1909 kv_program_nbps_index_settings(rdev, new_ps); in kv_dpm_set_power_state()
1910 kv_freeze_sclk_dpm(rdev, false); in kv_dpm_set_power_state()
1911 kv_set_enabled_levels(rdev); in kv_dpm_set_power_state()
1912 ret = kv_update_vce_dpm(rdev, new_ps, old_ps); in kv_dpm_set_power_state()
1917 kv_update_acp_boot_level(rdev); in kv_dpm_set_power_state()
1918 kv_update_sclk_t(rdev); in kv_dpm_set_power_state()
1919 kv_enable_nb_dpm(rdev, true); in kv_dpm_set_power_state()
1926 void kv_dpm_post_set_power_state(struct radeon_device *rdev) in kv_dpm_post_set_power_state() argument
1928 struct kv_power_info *pi = kv_get_pi(rdev); in kv_dpm_post_set_power_state()
1931 kv_update_current_ps(rdev, new_ps); in kv_dpm_post_set_power_state()
1934 void kv_dpm_setup_asic(struct radeon_device *rdev) in kv_dpm_setup_asic() argument
1936 sumo_take_smu_control(rdev, true); in kv_dpm_setup_asic()
1937 kv_init_powergate_state(rdev); in kv_dpm_setup_asic()
1938 kv_init_sclk_t(rdev); in kv_dpm_setup_asic()
1942 void kv_dpm_reset_asic(struct radeon_device *rdev)
1944 struct kv_power_info *pi = kv_get_pi(rdev);
1946 if (rdev->family == CHIP_KABINI || rdev->family == CHIP_MULLINS) {
1947 kv_force_lowest_valid(rdev);
1948 kv_init_graphics_levels(rdev);
1949 kv_program_bootup_state(rdev);
1950 kv_upload_dpm_settings(rdev);
1951 kv_force_lowest_valid(rdev);
1952 kv_unforce_levels(rdev);
1954 kv_init_graphics_levels(rdev);
1955 kv_program_bootup_state(rdev);
1956 kv_freeze_sclk_dpm(rdev, true);
1957 kv_upload_dpm_settings(rdev);
1958 kv_freeze_sclk_dpm(rdev, false);
1959 kv_set_enabled_level(rdev, pi->graphics_boot_level);
1966 static void kv_construct_max_power_limits_table(struct radeon_device *rdev, in kv_construct_max_power_limits_table() argument
1969 struct kv_power_info *pi = kv_get_pi(rdev); in kv_construct_max_power_limits_table()
1976 kv_convert_2bit_index_to_voltage(rdev, in kv_construct_max_power_limits_table()
1983 static void kv_patch_voltage_values(struct radeon_device *rdev) in kv_patch_voltage_values() argument
1987 &rdev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table; in kv_patch_voltage_values()
1989 &rdev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table; in kv_patch_voltage_values()
1991 &rdev->pm.dpm.dyn_state.samu_clock_voltage_dependency_table; in kv_patch_voltage_values()
1993 &rdev->pm.dpm.dyn_state.acp_clock_voltage_dependency_table; in kv_patch_voltage_values()
1998 kv_convert_8bit_index_to_voltage(rdev, in kv_patch_voltage_values()
2005 kv_convert_8bit_index_to_voltage(rdev, in kv_patch_voltage_values()
2012 kv_convert_8bit_index_to_voltage(rdev, in kv_patch_voltage_values()
2019 kv_convert_8bit_index_to_voltage(rdev, in kv_patch_voltage_values()
2025 static void kv_construct_boot_state(struct radeon_device *rdev) in kv_construct_boot_state() argument
2027 struct kv_power_info *pi = kv_get_pi(rdev); in kv_construct_boot_state()
2039 static int kv_force_dpm_highest(struct radeon_device *rdev) in kv_force_dpm_highest() argument
2044 ret = kv_dpm_get_enable_mask(rdev, &enable_mask); in kv_force_dpm_highest()
2053 if (rdev->family == CHIP_KABINI || rdev->family == CHIP_MULLINS) in kv_force_dpm_highest()
2054 return kv_send_msg_to_smc_with_parameter(rdev, PPSMC_MSG_DPM_ForceState, i); in kv_force_dpm_highest()
2056 return kv_set_enabled_level(rdev, i); in kv_force_dpm_highest()
2059 static int kv_force_dpm_lowest(struct radeon_device *rdev) in kv_force_dpm_lowest() argument
2064 ret = kv_dpm_get_enable_mask(rdev, &enable_mask); in kv_force_dpm_lowest()
2073 if (rdev->family == CHIP_KABINI || rdev->family == CHIP_MULLINS) in kv_force_dpm_lowest()
2074 return kv_send_msg_to_smc_with_parameter(rdev, PPSMC_MSG_DPM_ForceState, i); in kv_force_dpm_lowest()
2076 return kv_set_enabled_level(rdev, i); in kv_force_dpm_lowest()
2079 static u8 kv_get_sleep_divider_id_from_clock(struct radeon_device *rdev, in kv_get_sleep_divider_id_from_clock() argument
2082 struct kv_power_info *pi = kv_get_pi(rdev); in kv_get_sleep_divider_id_from_clock()
2103 static int kv_get_high_voltage_limit(struct radeon_device *rdev, int *limit) in kv_get_high_voltage_limit() argument
2105 struct kv_power_info *pi = kv_get_pi(rdev); in kv_get_high_voltage_limit()
2107 &rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk; in kv_get_high_voltage_limit()
2113 (kv_convert_8bit_index_to_voltage(rdev, table->entries[i].v) <= in kv_get_high_voltage_limit()
2125 (kv_convert_2bit_index_to_voltage(rdev, table->entries[i].vid_2bit) <= in kv_get_high_voltage_limit()
2137 static void kv_apply_state_adjust_rules(struct radeon_device *rdev, in kv_apply_state_adjust_rules() argument
2142 struct kv_power_info *pi = kv_get_pi(rdev); in kv_apply_state_adjust_rules()
2148 &rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk; in kv_apply_state_adjust_rules()
2151 &rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac; in kv_apply_state_adjust_rules()
2154 new_rps->evclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].evclk; in kv_apply_state_adjust_rules()
2155 new_rps->ecclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].ecclk; in kv_apply_state_adjust_rules()
2181 if (sclk < rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].sclk) in kv_apply_state_adjust_rules()
2182 sclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].sclk; in kv_apply_state_adjust_rules()
2196 kv_convert_8bit_index_to_voltage(rdev, ps->levels[i].vddc_index))) { in kv_apply_state_adjust_rules()
2197 kv_get_high_voltage_limit(rdev, &limit); in kv_apply_state_adjust_rules()
2208 kv_convert_8bit_index_to_voltage(rdev, ps->levels[i].vddc_index))) { in kv_apply_state_adjust_rules()
2209 kv_get_high_voltage_limit(rdev, &limit); in kv_apply_state_adjust_rules()
2230 if (rdev->family == CHIP_KABINI || rdev->family == CHIP_MULLINS) { in kv_apply_state_adjust_rules()
2243 pi->video_start || (rdev->pm.dpm.new_active_crtc_count >= 3) || in kv_apply_state_adjust_rules()
2253 static void kv_dpm_power_level_enabled_for_throttle(struct radeon_device *rdev, in kv_dpm_power_level_enabled_for_throttle() argument
2256 struct kv_power_info *pi = kv_get_pi(rdev); in kv_dpm_power_level_enabled_for_throttle()
2261 static int kv_calculate_ds_divider(struct radeon_device *rdev) in kv_calculate_ds_divider() argument
2263 struct kv_power_info *pi = kv_get_pi(rdev); in kv_calculate_ds_divider()
2272 kv_get_sleep_divider_id_from_clock(rdev, in kv_calculate_ds_divider()
2279 static int kv_calculate_nbps_level_settings(struct radeon_device *rdev) in kv_calculate_nbps_level_settings() argument
2281 struct kv_power_info *pi = kv_get_pi(rdev); in kv_calculate_nbps_level_settings()
2285 &rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac; in kv_calculate_nbps_level_settings()
2291 if (rdev->family == CHIP_KABINI || rdev->family == CHIP_MULLINS) { in kv_calculate_nbps_level_settings()
2302 (rdev->pm.dpm.new_active_crtc_count >= 3) || pi->video_start); in kv_calculate_nbps_level_settings()
2333 static int kv_calculate_dpm_settings(struct radeon_device *rdev) in kv_calculate_dpm_settings() argument
2335 struct kv_power_info *pi = kv_get_pi(rdev); in kv_calculate_dpm_settings()
2347 static void kv_init_graphics_levels(struct radeon_device *rdev) in kv_init_graphics_levels() argument
2349 struct kv_power_info *pi = kv_get_pi(rdev); in kv_init_graphics_levels()
2352 &rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk; in kv_init_graphics_levels()
2361 kv_convert_8bit_index_to_voltage(rdev, table->entries[i].v))) in kv_init_graphics_levels()
2364 kv_set_divider_value(rdev, i, table->entries[i].clk); in kv_init_graphics_levels()
2365 vid_2bit = kv_convert_vid7_to_vid2(rdev, in kv_init_graphics_levels()
2368 kv_set_vid(rdev, i, vid_2bit); in kv_init_graphics_levels()
2369 kv_set_at(rdev, i, pi->at[i]); in kv_init_graphics_levels()
2370 kv_dpm_power_level_enabled_for_throttle(rdev, i, true); in kv_init_graphics_levels()
2381 kv_convert_2bit_index_to_voltage(rdev, table->entries[i].vid_2bit)) in kv_init_graphics_levels()
2384 kv_set_divider_value(rdev, i, table->entries[i].sclk_frequency); in kv_init_graphics_levels()
2385 kv_set_vid(rdev, i, table->entries[i].vid_2bit); in kv_init_graphics_levels()
2386 kv_set_at(rdev, i, pi->at[i]); in kv_init_graphics_levels()
2387 kv_dpm_power_level_enabled_for_throttle(rdev, i, true); in kv_init_graphics_levels()
2393 kv_dpm_power_level_enable(rdev, i, false); in kv_init_graphics_levels()
2396 static void kv_enable_new_levels(struct radeon_device *rdev) in kv_enable_new_levels() argument
2398 struct kv_power_info *pi = kv_get_pi(rdev); in kv_enable_new_levels()
2403 kv_dpm_power_level_enable(rdev, i, true); in kv_enable_new_levels()
2407 static int kv_set_enabled_level(struct radeon_device *rdev, u32 level) in kv_set_enabled_level() argument
2411 return kv_send_msg_to_smc_with_parameter(rdev, in kv_set_enabled_level()
2416 static int kv_set_enabled_levels(struct radeon_device *rdev) in kv_set_enabled_levels() argument
2418 struct kv_power_info *pi = kv_get_pi(rdev); in kv_set_enabled_levels()
2424 return kv_send_msg_to_smc_with_parameter(rdev, in kv_set_enabled_levels()
2429 static void kv_program_nbps_index_settings(struct radeon_device *rdev, in kv_program_nbps_index_settings() argument
2433 struct kv_power_info *pi = kv_get_pi(rdev); in kv_program_nbps_index_settings()
2436 if (rdev->family == CHIP_KABINI || rdev->family == CHIP_MULLINS) in kv_program_nbps_index_settings()
2451 static int kv_set_thermal_temperature_range(struct radeon_device *rdev, in kv_set_thermal_temperature_range() argument
2473 rdev->pm.dpm.thermal.min_temp = low_temp; in kv_set_thermal_temperature_range()
2474 rdev->pm.dpm.thermal.max_temp = high_temp; in kv_set_thermal_temperature_range()
2488 static int kv_parse_sys_info_table(struct radeon_device *rdev) in kv_parse_sys_info_table() argument
2490 struct kv_power_info *pi = kv_get_pi(rdev); in kv_parse_sys_info_table()
2491 struct radeon_mode_info *mode_info = &rdev->mode_info; in kv_parse_sys_info_table()
2538 sumo_construct_sclk_voltage_mapping_table(rdev, in kv_parse_sys_info_table()
2542 sumo_construct_vid_mapping_table(rdev, in kv_parse_sys_info_table()
2546 kv_construct_max_power_limits_table(rdev, in kv_parse_sys_info_table()
2547 &rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac); in kv_parse_sys_info_table()
2573 static void kv_patch_boot_state(struct radeon_device *rdev, in kv_patch_boot_state() argument
2576 struct kv_power_info *pi = kv_get_pi(rdev); in kv_patch_boot_state()
2582 static void kv_parse_pplib_non_clock_info(struct radeon_device *rdev, in kv_parse_pplib_non_clock_info() argument
2602 rdev->pm.dpm.boot_ps = rps; in kv_parse_pplib_non_clock_info()
2603 kv_patch_boot_state(rdev, ps); in kv_parse_pplib_non_clock_info()
2606 rdev->pm.dpm.uvd_ps = rps; in kv_parse_pplib_non_clock_info()
2609 static void kv_parse_pplib_clock_info(struct radeon_device *rdev, in kv_parse_pplib_clock_info() argument
2613 struct kv_power_info *pi = kv_get_pi(rdev); in kv_parse_pplib_clock_info()
2631 static int kv_parse_power_table(struct radeon_device *rdev) in kv_parse_power_table() argument
2633 struct radeon_mode_info *mode_info = &rdev->mode_info; in kv_parse_power_table()
2663 rdev->pm.dpm.ps = kzalloc(sizeof(struct radeon_ps) * in kv_parse_power_table()
2665 if (!rdev->pm.dpm.ps) in kv_parse_power_table()
2674 if (!rdev->pm.power_state[i].clock_info) in kv_parse_power_table()
2678 kfree(rdev->pm.dpm.ps); in kv_parse_power_table()
2681 rdev->pm.dpm.ps[i].ps_priv = ps; in kv_parse_power_table()
2693 kv_parse_pplib_clock_info(rdev, in kv_parse_power_table()
2694 &rdev->pm.dpm.ps[i], k, in kv_parse_power_table()
2698 kv_parse_pplib_non_clock_info(rdev, &rdev->pm.dpm.ps[i], in kv_parse_power_table()
2703 rdev->pm.dpm.num_ps = state_array->ucNumEntries; in kv_parse_power_table()
2708 clock_array_index = rdev->pm.dpm.vce_states[i].clk_idx; in kv_parse_power_table()
2713 rdev->pm.dpm.vce_states[i].sclk = sclk; in kv_parse_power_table()
2714 rdev->pm.dpm.vce_states[i].mclk = 0; in kv_parse_power_table()
2720 int kv_dpm_init(struct radeon_device *rdev) in kv_dpm_init() argument
2728 rdev->pm.dpm.priv = pi; in kv_dpm_init()
2730 ret = r600_get_platform_caps(rdev); in kv_dpm_init()
2734 ret = r600_parse_extended_power_table(rdev); in kv_dpm_init()
2744 if (rdev->pdev->subsystem_vendor == 0x1849) in kv_dpm_init()
2764 if (rdev->family == CHIP_KABINI || rdev->family == CHIP_MULLINS) in kv_dpm_init()
2783 ret = kv_parse_sys_info_table(rdev); in kv_dpm_init()
2787 kv_patch_voltage_values(rdev); in kv_dpm_init()
2788 kv_construct_boot_state(rdev); in kv_dpm_init()
2790 ret = kv_parse_power_table(rdev); in kv_dpm_init()
2799 void kv_dpm_debugfs_print_current_performance_level(struct radeon_device *rdev, in kv_dpm_debugfs_print_current_performance_level() argument
2802 struct kv_power_info *pi = kv_get_pi(rdev); in kv_dpm_debugfs_print_current_performance_level()
2815 vddc = kv_convert_8bit_index_to_voltage(rdev, (u16)tmp); in kv_dpm_debugfs_print_current_performance_level()
2823 u32 kv_dpm_get_current_sclk(struct radeon_device *rdev) in kv_dpm_get_current_sclk() argument
2825 struct kv_power_info *pi = kv_get_pi(rdev); in kv_dpm_get_current_sclk()
2839 u32 kv_dpm_get_current_mclk(struct radeon_device *rdev) in kv_dpm_get_current_mclk() argument
2841 struct kv_power_info *pi = kv_get_pi(rdev); in kv_dpm_get_current_mclk()
2846 void kv_dpm_print_power_state(struct radeon_device *rdev, in kv_dpm_print_power_state() argument
2859 kv_convert_8bit_index_to_voltage(rdev, pl->vddc_index)); in kv_dpm_print_power_state()
2861 r600_dpm_print_ps_status(rdev, rps); in kv_dpm_print_power_state()
2864 void kv_dpm_fini(struct radeon_device *rdev) in kv_dpm_fini() argument
2868 for (i = 0; i < rdev->pm.dpm.num_ps; i++) { in kv_dpm_fini()
2869 kfree(rdev->pm.dpm.ps[i].ps_priv); in kv_dpm_fini()
2871 kfree(rdev->pm.dpm.ps); in kv_dpm_fini()
2872 kfree(rdev->pm.dpm.priv); in kv_dpm_fini()
2873 r600_free_extended_power_table(rdev); in kv_dpm_fini()
2876 void kv_dpm_display_configuration_changed(struct radeon_device *rdev) in kv_dpm_display_configuration_changed() argument
2881 u32 kv_dpm_get_sclk(struct radeon_device *rdev, bool low) in kv_dpm_get_sclk() argument
2883 struct kv_power_info *pi = kv_get_pi(rdev); in kv_dpm_get_sclk()
2892 u32 kv_dpm_get_mclk(struct radeon_device *rdev, bool low) in kv_dpm_get_mclk() argument
2894 struct kv_power_info *pi = kv_get_pi(rdev); in kv_dpm_get_mclk()