843 	radeon_ring_write(ring, PACKET0(RADEON_HOST_PATH_CNTL, 0));  in r100_ring_hdp_flush()
846 	radeon_ring_write(ring, PACKET0(RADEON_HOST_PATH_CNTL, 0));  in r100_ring_hdp_flush()
859 	radeon_ring_write(ring, PACKET0(RADEON_RB3D_DSTCACHE_CTLSTAT, 0));  in r100_fence_ring_emit()
861 	radeon_ring_write(ring, PACKET0(RADEON_RB3D_ZCACHE_CTLSTAT, 0));  in r100_fence_ring_emit()
864 	radeon_ring_write(ring, PACKET0(RADEON_WAIT_UNTIL, 0));  in r100_fence_ring_emit()
868 	radeon_ring_write(ring, PACKET0(rdev->fence_drv[fence->ring].scratch_reg, 0));  in r100_fence_ring_emit()
870 	radeon_ring_write(ring, PACKET0(RADEON_GEN_INT_STATUS, 0));  in r100_fence_ring_emit()
945 	radeon_ring_write(ring, PACKET0(RADEON_DSTCACHE_CTLSTAT, 0));  in r100_copy_blit()
947 	radeon_ring_write(ring, PACKET0(RADEON_WAIT_UNTIL, 0));  in r100_copy_blit()
984 	radeon_ring_write(ring, PACKET0(RADEON_ISYNC_CNTL, 0));  in r100_ring_start()
3664 	radeon_ring_write(ring, PACKET0(scratch, 0));  in r100_ring_test()
3691 		radeon_ring_write(ring, PACKET0(ring->rptr_save_reg, 0));  in r100_ring_ib_execute()
3695 	radeon_ring_write(ring, PACKET0(RADEON_CP_IB_BASE, 1));  in r100_ring_ib_execute()
3719 	ib.ptr[0] = PACKET0(scratch, 0);  in r100_ib_test()