Lines Matching refs:rdev
41 static struct igp_power_info *rs780_get_pi(struct radeon_device *rdev) in rs780_get_pi() argument
43 struct igp_power_info *pi = rdev->pm.dpm.priv; in rs780_get_pi()
48 static void rs780_get_pm_mode_parameters(struct radeon_device *rdev) in rs780_get_pm_mode_parameters() argument
50 struct igp_power_info *pi = rs780_get_pi(rdev); in rs780_get_pm_mode_parameters()
51 struct radeon_mode_info *minfo = &rdev->mode_info; in rs780_get_pm_mode_parameters()
60 for (i = 0; i < rdev->num_crtc; i++) { in rs780_get_pm_mode_parameters()
72 static void rs780_voltage_scaling_enable(struct radeon_device *rdev, bool enable);
74 static int rs780_initialize_dpm_power_state(struct radeon_device *rdev, in rs780_initialize_dpm_power_state() argument
81 ret = radeon_atom_get_clock_dividers(rdev, COMPUTE_ENGINE_PLL_PARAM, in rs780_initialize_dpm_power_state()
86 r600_engine_clock_entry_set_reference_divider(rdev, 0, dividers.ref_div); in rs780_initialize_dpm_power_state()
87 r600_engine_clock_entry_set_feedback_divider(rdev, 0, dividers.fb_div); in rs780_initialize_dpm_power_state()
88 r600_engine_clock_entry_set_post_divider(rdev, 0, dividers.post_div); in rs780_initialize_dpm_power_state()
91 r600_engine_clock_entry_enable_post_divider(rdev, 0, true); in rs780_initialize_dpm_power_state()
93 r600_engine_clock_entry_enable_post_divider(rdev, 0, false); in rs780_initialize_dpm_power_state()
95 r600_engine_clock_entry_set_step_time(rdev, 0, R600_SST_DFLT); in rs780_initialize_dpm_power_state()
96 r600_engine_clock_entry_enable_pulse_skipping(rdev, 0, false); in rs780_initialize_dpm_power_state()
98 r600_engine_clock_entry_enable(rdev, 0, true); in rs780_initialize_dpm_power_state()
100 r600_engine_clock_entry_enable(rdev, i, false); in rs780_initialize_dpm_power_state()
102 r600_enable_mclk_control(rdev, false); in rs780_initialize_dpm_power_state()
103 r600_voltage_control_enable_pins(rdev, 0); in rs780_initialize_dpm_power_state()
108 static int rs780_initialize_dpm_parameters(struct radeon_device *rdev, in rs780_initialize_dpm_parameters() argument
114 r600_set_bsp(rdev, R600_BSU_DFLT, R600_BSP_DFLT); in rs780_initialize_dpm_parameters()
116 r600_set_at(rdev, 0, 0, 0, 0); in rs780_initialize_dpm_parameters()
118 r600_set_git(rdev, R600_GICST_DFLT); in rs780_initialize_dpm_parameters()
121 r600_set_tc(rdev, i, 0, 0); in rs780_initialize_dpm_parameters()
123 r600_select_td(rdev, R600_TD_DFLT); in rs780_initialize_dpm_parameters()
124 r600_set_vrc(rdev, 0); in rs780_initialize_dpm_parameters()
126 r600_set_tpu(rdev, R600_TPU_DFLT); in rs780_initialize_dpm_parameters()
127 r600_set_tpc(rdev, R600_TPC_DFLT); in rs780_initialize_dpm_parameters()
129 r600_set_sstu(rdev, R600_SSTU_DFLT); in rs780_initialize_dpm_parameters()
130 r600_set_sst(rdev, R600_SST_DFLT); in rs780_initialize_dpm_parameters()
132 r600_set_fctu(rdev, R600_FCTU_DFLT); in rs780_initialize_dpm_parameters()
133 r600_set_fct(rdev, R600_FCT_DFLT); in rs780_initialize_dpm_parameters()
135 r600_set_vddc3d_oorsu(rdev, R600_VDDC3DOORSU_DFLT); in rs780_initialize_dpm_parameters()
136 r600_set_vddc3d_oorphc(rdev, R600_VDDC3DOORPHC_DFLT); in rs780_initialize_dpm_parameters()
137 r600_set_vddc3d_oorsdc(rdev, R600_VDDC3DOORSDC_DFLT); in rs780_initialize_dpm_parameters()
138 r600_set_ctxcgtt3d_rphc(rdev, R600_CTXCGTT3DRPHC_DFLT); in rs780_initialize_dpm_parameters()
139 r600_set_ctxcgtt3d_rsdc(rdev, R600_CTXCGTT3DRSDC_DFLT); in rs780_initialize_dpm_parameters()
141 r600_vid_rt_set_vru(rdev, R600_VRU_DFLT); in rs780_initialize_dpm_parameters()
142 r600_vid_rt_set_vrt(rdev, R600_VOLTAGERESPONSETIME_DFLT); in rs780_initialize_dpm_parameters()
143 r600_vid_rt_set_ssu(rdev, R600_SPLLSTEPUNIT_DFLT); in rs780_initialize_dpm_parameters()
145 ret = rs780_initialize_dpm_power_state(rdev, boot_ps); in rs780_initialize_dpm_parameters()
147 r600_power_level_set_voltage_index(rdev, R600_POWER_LEVEL_LOW, 0); in rs780_initialize_dpm_parameters()
148 r600_power_level_set_voltage_index(rdev, R600_POWER_LEVEL_MEDIUM, 0); in rs780_initialize_dpm_parameters()
149 r600_power_level_set_voltage_index(rdev, R600_POWER_LEVEL_HIGH, 0); in rs780_initialize_dpm_parameters()
151 r600_power_level_set_mem_clock_index(rdev, R600_POWER_LEVEL_LOW, 0); in rs780_initialize_dpm_parameters()
152 r600_power_level_set_mem_clock_index(rdev, R600_POWER_LEVEL_MEDIUM, 0); in rs780_initialize_dpm_parameters()
153 r600_power_level_set_mem_clock_index(rdev, R600_POWER_LEVEL_HIGH, 0); in rs780_initialize_dpm_parameters()
155 r600_power_level_set_eng_clock_index(rdev, R600_POWER_LEVEL_LOW, 0); in rs780_initialize_dpm_parameters()
156 r600_power_level_set_eng_clock_index(rdev, R600_POWER_LEVEL_MEDIUM, 0); in rs780_initialize_dpm_parameters()
157 r600_power_level_set_eng_clock_index(rdev, R600_POWER_LEVEL_HIGH, 0); in rs780_initialize_dpm_parameters()
159 r600_power_level_set_watermark_id(rdev, R600_POWER_LEVEL_LOW, R600_DISPLAY_WATERMARK_HIGH); in rs780_initialize_dpm_parameters()
160 r600_power_level_set_watermark_id(rdev, R600_POWER_LEVEL_MEDIUM, R600_DISPLAY_WATERMARK_HIGH); in rs780_initialize_dpm_parameters()
161 r600_power_level_set_watermark_id(rdev, R600_POWER_LEVEL_HIGH, R600_DISPLAY_WATERMARK_HIGH); in rs780_initialize_dpm_parameters()
163 r600_power_level_enable(rdev, R600_POWER_LEVEL_CTXSW, false); in rs780_initialize_dpm_parameters()
164 r600_power_level_enable(rdev, R600_POWER_LEVEL_HIGH, false); in rs780_initialize_dpm_parameters()
165 r600_power_level_enable(rdev, R600_POWER_LEVEL_MEDIUM, false); in rs780_initialize_dpm_parameters()
166 r600_power_level_enable(rdev, R600_POWER_LEVEL_LOW, true); in rs780_initialize_dpm_parameters()
168 r600_power_level_set_enter_index(rdev, R600_POWER_LEVEL_LOW); in rs780_initialize_dpm_parameters()
170 r600_set_vrc(rdev, RS780_CGFTV_DFLT); in rs780_initialize_dpm_parameters()
175 static void rs780_start_dpm(struct radeon_device *rdev) in rs780_start_dpm() argument
177 r600_enable_sclk_control(rdev, false); in rs780_start_dpm()
178 r600_enable_mclk_control(rdev, false); in rs780_start_dpm()
180 r600_dynamicpm_enable(rdev, true); in rs780_start_dpm()
182 radeon_wait_for_vblank(rdev, 0); in rs780_start_dpm()
183 radeon_wait_for_vblank(rdev, 1); in rs780_start_dpm()
185 r600_enable_spll_bypass(rdev, true); in rs780_start_dpm()
186 r600_wait_for_spll_change(rdev); in rs780_start_dpm()
187 r600_enable_spll_bypass(rdev, false); in rs780_start_dpm()
188 r600_wait_for_spll_change(rdev); in rs780_start_dpm()
190 r600_enable_spll_bypass(rdev, true); in rs780_start_dpm()
191 r600_wait_for_spll_change(rdev); in rs780_start_dpm()
192 r600_enable_spll_bypass(rdev, false); in rs780_start_dpm()
193 r600_wait_for_spll_change(rdev); in rs780_start_dpm()
195 r600_enable_sclk_control(rdev, true); in rs780_start_dpm()
199 static void rs780_preset_ranges_slow_clk_fbdiv_en(struct radeon_device *rdev) in rs780_preset_ranges_slow_clk_fbdiv_en() argument
209 static void rs780_preset_starting_fbdiv(struct radeon_device *rdev) in rs780_preset_starting_fbdiv() argument
222 static void rs780_voltage_scaling_init(struct radeon_device *rdev) in rs780_voltage_scaling_init() argument
224 struct igp_power_info *pi = rs780_get_pi(rdev); in rs780_voltage_scaling_init()
225 struct drm_device *dev = rdev->ddev; in rs780_voltage_scaling_init()
276 rs780_voltage_scaling_enable(rdev, true); in rs780_voltage_scaling_init()
303 static void rs780_clk_scaling_enable(struct radeon_device *rdev, bool enable) in rs780_clk_scaling_enable() argument
313 static void rs780_voltage_scaling_enable(struct radeon_device *rdev, bool enable) in rs780_voltage_scaling_enable() argument
321 static void rs780_set_engine_clock_wfc(struct radeon_device *rdev) in rs780_set_engine_clock_wfc() argument
336 static void rs780_set_engine_clock_sc(struct radeon_device *rdev) in rs780_set_engine_clock_sc() argument
347 static void rs780_set_engine_clock_tdc(struct radeon_device *rdev) in rs780_set_engine_clock_tdc() argument
352 static void rs780_set_engine_clock_ssc(struct radeon_device *rdev) in rs780_set_engine_clock_ssc() argument
362 static void rs780_program_at(struct radeon_device *rdev) in rs780_program_at() argument
364 struct igp_power_info *pi = rs780_get_pi(rdev); in rs780_program_at()
373 static void rs780_disable_vbios_powersaving(struct radeon_device *rdev) in rs780_disable_vbios_powersaving() argument
378 static void rs780_force_voltage(struct radeon_device *rdev, u16 voltage) in rs780_force_voltage() argument
380 struct igp_ps *current_state = rs780_get_ps(rdev->pm.dpm.current_ps); in rs780_force_voltage()
405 static void rs780_force_fbdiv(struct radeon_device *rdev, u32 fb_div) in rs780_force_fbdiv() argument
407 struct igp_ps *current_state = rs780_get_ps(rdev->pm.dpm.current_ps); in rs780_force_fbdiv()
425 static int rs780_set_engine_clock_scaling(struct radeon_device *rdev, in rs780_set_engine_clock_scaling() argument
438 ret = radeon_atom_get_clock_dividers(rdev, COMPUTE_ENGINE_PLL_PARAM, in rs780_set_engine_clock_scaling()
443 ret = radeon_atom_get_clock_dividers(rdev, COMPUTE_ENGINE_PLL_PARAM, in rs780_set_engine_clock_scaling()
448 ret = radeon_atom_get_clock_dividers(rdev, COMPUTE_ENGINE_PLL_PARAM, in rs780_set_engine_clock_scaling()
459 rs780_force_fbdiv(rdev, max_dividers.fb_div); in rs780_set_engine_clock_scaling()
473 static void rs780_set_engine_clock_spc(struct radeon_device *rdev, in rs780_set_engine_clock_spc() argument
479 struct igp_power_info *pi = rs780_get_pi(rdev); in rs780_set_engine_clock_spc()
492 static void rs780_activate_engine_clk_scaling(struct radeon_device *rdev, in rs780_activate_engine_clk_scaling() argument
506 rs780_clk_scaling_enable(rdev, true); in rs780_activate_engine_clk_scaling()
509 static u32 rs780_get_voltage_for_vddc_level(struct radeon_device *rdev, in rs780_get_voltage_for_vddc_level() argument
512 struct igp_power_info *pi = rs780_get_pi(rdev); in rs780_get_voltage_for_vddc_level()
522 static void rs780_enable_voltage_scaling(struct radeon_device *rdev, in rs780_enable_voltage_scaling() argument
526 struct igp_power_info *pi = rs780_get_pi(rdev); in rs780_enable_voltage_scaling()
535 vddc_high = rs780_get_voltage_for_vddc_level(rdev, in rs780_enable_voltage_scaling()
537 vddc_low = rs780_get_voltage_for_vddc_level(rdev, in rs780_enable_voltage_scaling()
563 static void rs780_set_uvd_clock_before_set_eng_clock(struct radeon_device *rdev, in rs780_set_uvd_clock_before_set_eng_clock() argument
577 radeon_set_uvd_clocks(rdev, new_ps->vclk, new_ps->dclk); in rs780_set_uvd_clock_before_set_eng_clock()
580 static void rs780_set_uvd_clock_after_set_eng_clock(struct radeon_device *rdev, in rs780_set_uvd_clock_after_set_eng_clock() argument
594 radeon_set_uvd_clocks(rdev, new_ps->vclk, new_ps->dclk); in rs780_set_uvd_clock_after_set_eng_clock()
597 int rs780_dpm_enable(struct radeon_device *rdev) in rs780_dpm_enable() argument
599 struct igp_power_info *pi = rs780_get_pi(rdev); in rs780_dpm_enable()
600 struct radeon_ps *boot_ps = rdev->pm.dpm.boot_ps; in rs780_dpm_enable()
603 rs780_get_pm_mode_parameters(rdev); in rs780_dpm_enable()
604 rs780_disable_vbios_powersaving(rdev); in rs780_dpm_enable()
606 if (r600_dynamicpm_enabled(rdev)) in rs780_dpm_enable()
608 ret = rs780_initialize_dpm_parameters(rdev, boot_ps); in rs780_dpm_enable()
611 rs780_start_dpm(rdev); in rs780_dpm_enable()
613 rs780_preset_ranges_slow_clk_fbdiv_en(rdev); in rs780_dpm_enable()
614 rs780_preset_starting_fbdiv(rdev); in rs780_dpm_enable()
616 rs780_voltage_scaling_init(rdev); in rs780_dpm_enable()
617 rs780_clk_scaling_enable(rdev, true); in rs780_dpm_enable()
618 rs780_set_engine_clock_sc(rdev); in rs780_dpm_enable()
619 rs780_set_engine_clock_wfc(rdev); in rs780_dpm_enable()
620 rs780_program_at(rdev); in rs780_dpm_enable()
621 rs780_set_engine_clock_tdc(rdev); in rs780_dpm_enable()
622 rs780_set_engine_clock_ssc(rdev); in rs780_dpm_enable()
625 r600_gfx_clockgating_enable(rdev, true); in rs780_dpm_enable()
630 void rs780_dpm_disable(struct radeon_device *rdev) in rs780_dpm_disable() argument
632 struct igp_power_info *pi = rs780_get_pi(rdev); in rs780_dpm_disable()
634 r600_dynamicpm_enable(rdev, false); in rs780_dpm_disable()
636 rs780_clk_scaling_enable(rdev, false); in rs780_dpm_disable()
637 rs780_voltage_scaling_enable(rdev, false); in rs780_dpm_disable()
640 r600_gfx_clockgating_enable(rdev, false); in rs780_dpm_disable()
642 if (rdev->irq.installed && in rs780_dpm_disable()
643 (rdev->pm.int_thermal_type == THERMAL_TYPE_RV6XX)) { in rs780_dpm_disable()
644 rdev->irq.dpm_thermal = false; in rs780_dpm_disable()
645 radeon_irq_set(rdev); in rs780_dpm_disable()
649 int rs780_dpm_set_power_state(struct radeon_device *rdev) in rs780_dpm_set_power_state() argument
651 struct igp_power_info *pi = rs780_get_pi(rdev); in rs780_dpm_set_power_state()
652 struct radeon_ps *new_ps = rdev->pm.dpm.requested_ps; in rs780_dpm_set_power_state()
653 struct radeon_ps *old_ps = rdev->pm.dpm.current_ps; in rs780_dpm_set_power_state()
656 rs780_get_pm_mode_parameters(rdev); in rs780_dpm_set_power_state()
658 rs780_set_uvd_clock_before_set_eng_clock(rdev, new_ps, old_ps); in rs780_dpm_set_power_state()
661 rs780_force_voltage(rdev, pi->max_voltage); in rs780_dpm_set_power_state()
665 ret = rs780_set_engine_clock_scaling(rdev, new_ps, old_ps); in rs780_dpm_set_power_state()
668 rs780_set_engine_clock_spc(rdev, new_ps, old_ps); in rs780_dpm_set_power_state()
670 rs780_activate_engine_clk_scaling(rdev, new_ps, old_ps); in rs780_dpm_set_power_state()
673 rs780_enable_voltage_scaling(rdev, new_ps); in rs780_dpm_set_power_state()
675 rs780_set_uvd_clock_after_set_eng_clock(rdev, new_ps, old_ps); in rs780_dpm_set_power_state()
680 void rs780_dpm_setup_asic(struct radeon_device *rdev) in rs780_dpm_setup_asic() argument
685 void rs780_dpm_display_configuration_changed(struct radeon_device *rdev) in rs780_dpm_display_configuration_changed() argument
687 rs780_get_pm_mode_parameters(rdev); in rs780_dpm_display_configuration_changed()
688 rs780_program_at(rdev); in rs780_dpm_display_configuration_changed()
717 static void rs780_parse_pplib_non_clock_info(struct radeon_device *rdev, in rs780_parse_pplib_non_clock_info() argument
742 rdev->pm.dpm.boot_ps = rps; in rs780_parse_pplib_non_clock_info()
744 rdev->pm.dpm.uvd_ps = rps; in rs780_parse_pplib_non_clock_info()
747 static void rs780_parse_pplib_clock_info(struct radeon_device *rdev, in rs780_parse_pplib_clock_info() argument
782 ps->sclk_low = rdev->clock.default_sclk; in rs780_parse_pplib_clock_info()
783 ps->sclk_high = rdev->clock.default_sclk; in rs780_parse_pplib_clock_info()
789 static int rs780_parse_power_table(struct radeon_device *rdev) in rs780_parse_power_table() argument
791 struct radeon_mode_info *mode_info = &rdev->mode_info; in rs780_parse_power_table()
807 rdev->pm.dpm.ps = kzalloc(sizeof(struct radeon_ps) * in rs780_parse_power_table()
809 if (!rdev->pm.dpm.ps) in rs780_parse_power_table()
830 kfree(rdev->pm.dpm.ps); in rs780_parse_power_table()
833 rdev->pm.dpm.ps[i].ps_priv = ps; in rs780_parse_power_table()
834 rs780_parse_pplib_non_clock_info(rdev, &rdev->pm.dpm.ps[i], in rs780_parse_power_table()
837 rs780_parse_pplib_clock_info(rdev, in rs780_parse_power_table()
838 &rdev->pm.dpm.ps[i], in rs780_parse_power_table()
842 rdev->pm.dpm.num_ps = power_info->pplib.ucNumStates; in rs780_parse_power_table()
846 int rs780_dpm_init(struct radeon_device *rdev) in rs780_dpm_init() argument
858 rdev->pm.dpm.priv = pi; in rs780_dpm_init()
860 ret = r600_get_platform_caps(rdev); in rs780_dpm_init()
864 ret = rs780_parse_power_table(rdev); in rs780_dpm_init()
871 if (atom_parse_data_header(rdev->mode_info.atom_context, index, NULL, in rs780_dpm_init()
873 info = (union igp_info *)(rdev->mode_info.atom_context->bios + data_offset); in rs780_dpm_init()
933 radeon_dpm_fini(rdev); in rs780_dpm_init()
937 void rs780_dpm_print_power_state(struct radeon_device *rdev, in rs780_dpm_print_power_state() argument
949 r600_dpm_print_ps_status(rdev, rps); in rs780_dpm_print_power_state()
952 void rs780_dpm_fini(struct radeon_device *rdev) in rs780_dpm_fini() argument
956 for (i = 0; i < rdev->pm.dpm.num_ps; i++) { in rs780_dpm_fini()
957 kfree(rdev->pm.dpm.ps[i].ps_priv); in rs780_dpm_fini()
959 kfree(rdev->pm.dpm.ps); in rs780_dpm_fini()
960 kfree(rdev->pm.dpm.priv); in rs780_dpm_fini()
963 u32 rs780_dpm_get_sclk(struct radeon_device *rdev, bool low) in rs780_dpm_get_sclk() argument
965 struct igp_ps *requested_state = rs780_get_ps(rdev->pm.dpm.requested_ps); in rs780_dpm_get_sclk()
973 u32 rs780_dpm_get_mclk(struct radeon_device *rdev, bool low) in rs780_dpm_get_mclk() argument
975 struct igp_power_info *pi = rs780_get_pi(rdev); in rs780_dpm_get_mclk()
980 void rs780_dpm_debugfs_print_current_performance_level(struct radeon_device *rdev, in rs780_dpm_debugfs_print_current_performance_level() argument
983 struct radeon_ps *rps = rdev->pm.dpm.current_ps; in rs780_dpm_debugfs_print_current_performance_level()
990 u32 sclk = (rdev->clock.spll.reference_freq * current_fb_div) / in rs780_dpm_debugfs_print_current_performance_level()
1005 u32 rs780_dpm_get_current_sclk(struct radeon_device *rdev) in rs780_dpm_get_current_sclk() argument
1012 u32 sclk = (rdev->clock.spll.reference_freq * current_fb_div) / in rs780_dpm_get_current_sclk()
1019 u32 rs780_dpm_get_current_mclk(struct radeon_device *rdev) in rs780_dpm_get_current_mclk() argument
1021 struct igp_power_info *pi = rs780_get_pi(rdev); in rs780_dpm_get_current_mclk()
1026 int rs780_dpm_force_performance_level(struct radeon_device *rdev, in rs780_dpm_force_performance_level() argument
1029 struct igp_power_info *pi = rs780_get_pi(rdev); in rs780_dpm_force_performance_level()
1030 struct radeon_ps *rps = rdev->pm.dpm.current_ps; in rs780_dpm_force_performance_level()
1035 rs780_clk_scaling_enable(rdev, false); in rs780_dpm_force_performance_level()
1036 rs780_voltage_scaling_enable(rdev, false); in rs780_dpm_force_performance_level()
1040 rs780_force_voltage(rdev, pi->max_voltage); in rs780_dpm_force_performance_level()
1042 ret = radeon_atom_get_clock_dividers(rdev, COMPUTE_ENGINE_PLL_PARAM, in rs780_dpm_force_performance_level()
1047 rs780_force_fbdiv(rdev, dividers.fb_div); in rs780_dpm_force_performance_level()
1049 ret = radeon_atom_get_clock_dividers(rdev, COMPUTE_ENGINE_PLL_PARAM, in rs780_dpm_force_performance_level()
1054 rs780_force_fbdiv(rdev, dividers.fb_div); in rs780_dpm_force_performance_level()
1057 rs780_force_voltage(rdev, pi->min_voltage); in rs780_dpm_force_performance_level()
1060 rs780_force_voltage(rdev, pi->max_voltage); in rs780_dpm_force_performance_level()
1064 rs780_clk_scaling_enable(rdev, true); in rs780_dpm_force_performance_level()
1068 rs780_voltage_scaling_enable(rdev, true); in rs780_dpm_force_performance_level()
1069 rs780_enable_voltage_scaling(rdev, rps); in rs780_dpm_force_performance_level()
1073 rdev->pm.dpm.forced_level = level; in rs780_dpm_force_performance_level()