Lines Matching refs:dd
230 static inline u32 qib_read_ureg32(const struct qib_devdata *dd, in qib_read_ureg32() argument
233 if (!dd->kregbase || !(dd->flags & QIB_PRESENT)) in qib_read_ureg32()
236 if (dd->userbase) in qib_read_ureg32()
238 ((char __iomem *)dd->userbase + in qib_read_ureg32()
239 dd->ureg_align * ctxt)); in qib_read_ureg32()
242 (dd->uregbase + in qib_read_ureg32()
243 (char __iomem *)dd->kregbase + in qib_read_ureg32()
244 dd->ureg_align * ctxt)); in qib_read_ureg32()
256 static inline void qib_write_ureg(const struct qib_devdata *dd, in qib_write_ureg() argument
261 if (dd->userbase) in qib_write_ureg()
263 ((char __iomem *) dd->userbase + in qib_write_ureg()
264 dd->ureg_align * ctxt); in qib_write_ureg()
267 (dd->uregbase + in qib_write_ureg()
268 (char __iomem *) dd->kregbase + in qib_write_ureg()
269 dd->ureg_align * ctxt); in qib_write_ureg()
271 if (dd->kregbase && (dd->flags & QIB_PRESENT)) in qib_write_ureg()
282 static inline void qib_write_kreg_ctxt(const struct qib_devdata *dd, in qib_write_kreg_ctxt() argument
286 qib_write_kreg(dd, regno + ctxt, value); in qib_write_kreg_ctxt()
289 static inline void write_7220_creg(const struct qib_devdata *dd, in write_7220_creg() argument
292 if (dd->cspec->cregbase && (dd->flags & QIB_PRESENT)) in write_7220_creg()
293 writeq(value, &dd->cspec->cregbase[regno]); in write_7220_creg()
296 static inline u64 read_7220_creg(const struct qib_devdata *dd, u16 regno) in read_7220_creg() argument
298 if (!dd->cspec->cregbase || !(dd->flags & QIB_PRESENT)) in read_7220_creg()
300 return readq(&dd->cspec->cregbase[regno]); in read_7220_creg()
303 static inline u32 read_7220_creg32(const struct qib_devdata *dd, u16 regno) in read_7220_creg32() argument
305 if (!dd->cspec->cregbase || !(dd->flags & QIB_PRESENT)) in read_7220_creg32()
307 return readl(&dd->cspec->cregbase[regno]); in read_7220_creg32()
754 struct qib_devdata *dd = ppd->dd; in qib_disarm_7220_senderrbufs() local
761 sbuf[0] = qib_read_kreg64(dd, kr_sendbuffererror); in qib_disarm_7220_senderrbufs()
762 sbuf[1] = qib_read_kreg64(dd, kr_sendbuffererror + 1); in qib_disarm_7220_senderrbufs()
763 sbuf[2] = qib_read_kreg64(dd, kr_sendbuffererror + 2); in qib_disarm_7220_senderrbufs()
766 qib_disarm_piobufs_set(dd, sbuf, in qib_disarm_7220_senderrbufs()
767 dd->piobcnt2k + dd->piobcnt4k); in qib_disarm_7220_senderrbufs()
770 static void qib_7220_txe_recover(struct qib_devdata *dd) in qib_7220_txe_recover() argument
772 qib_devinfo(dd->pcidev, "Recovering from TXE PIO parity error\n"); in qib_7220_txe_recover()
773 qib_disarm_7220_senderrbufs(dd->pport); in qib_7220_txe_recover()
781 struct qib_devdata *dd = ppd->dd; in qib_7220_sdma_sendctrl() local
800 spin_lock(&dd->sendctrl_lock); in qib_7220_sdma_sendctrl()
802 dd->sendctrl |= set_sendctrl; in qib_7220_sdma_sendctrl()
803 dd->sendctrl &= ~clr_sendctrl; in qib_7220_sdma_sendctrl()
805 qib_write_kreg(dd, kr_sendctrl, dd->sendctrl); in qib_7220_sdma_sendctrl()
806 qib_write_kreg(dd, kr_scratch, 0); in qib_7220_sdma_sendctrl()
808 spin_unlock(&dd->sendctrl_lock); in qib_7220_sdma_sendctrl()
862 ppd->dd->upd_pio_shadow = 1; /* update our idea of what's busy */ in qib_7220_sdma_hw_clean_up()
872 qib_write_kreg(ppd->dd, kr_senddmalengen, ppd->sdma_descq_cnt); in qib_sdma_7220_setlengen()
873 qib_write_kreg(ppd->dd, kr_senddmalengen, in qib_sdma_7220_setlengen()
900 struct qib_devdata *dd = ppd->dd; in sdma_7220_errors() local
905 msg = dd->cspec->sdmamsgbuf; in sdma_7220_errors()
907 sizeof(dd->cspec->sdmamsgbuf)); in sdma_7220_errors()
913 sbuf[0] = qib_read_kreg64(dd, kr_sendbuffererror); in sdma_7220_errors()
914 sbuf[1] = qib_read_kreg64(dd, kr_sendbuffererror + 1); in sdma_7220_errors()
915 sbuf[2] = qib_read_kreg64(dd, kr_sendbuffererror + 2); in sdma_7220_errors()
917 qib_dev_err(ppd->dd, in sdma_7220_errors()
919 ppd->dd->unit, ppd->port, sbuf[2], sbuf[1], in sdma_7220_errors()
924 qib_dev_err(dd, "IB%u:%u SDmaUnexpData\n", ppd->dd->unit, in sdma_7220_errors()
970 static int qib_decode_7220_err(struct qib_devdata *dd, char *buf, size_t blen, in qib_decode_7220_err() argument
1038 qib_decode_7220_sdma_errs(dd->pport, err, buf, blen); in qib_decode_7220_err()
1092 static void handle_7220_errors(struct qib_devdata *dd, u64 errs) in handle_7220_errors() argument
1098 struct qib_pportdata *ppd = dd->pport; in handle_7220_errors()
1102 errs &= dd->cspec->errormask; in handle_7220_errors()
1103 msg = dd->cspec->emsgbuf; in handle_7220_errors()
1107 qib_7220_handle_hwerrors(dd, msg, sizeof(dd->cspec->emsgbuf)); in handle_7220_errors()
1110 if (errs & dd->eep_st_masks[log_idx].errs_to_log) in handle_7220_errors()
1111 qib_inc_eeprom_err(dd, log_idx, 1); in handle_7220_errors()
1117 qib_dev_err(dd, in handle_7220_errors()
1146 qib_write_kreg(dd, kr_errclear, errs); in handle_7220_errors()
1161 qib_decode_7220_err(dd, msg, sizeof(dd->cspec->emsgbuf), errs & ~mask); in handle_7220_errors()
1173 ibcs = qib_read_kreg64(dd, kr_ibcstatus); in handle_7220_errors()
1198 qib_dev_err(dd, in handle_7220_errors()
1200 dd->flags &= ~QIB_INITTED; /* needs re-init */ in handle_7220_errors()
1202 *dd->devstatusp |= QIB_STATUS_HWERROR; in handle_7220_errors()
1203 *dd->pport->statusp &= ~QIB_STATUS_IB_CONF; in handle_7220_errors()
1207 qib_dev_porterr(dd, ppd->port, "%s error\n", msg); in handle_7220_errors()
1220 qib_handle_urcv(dd, ~0U); in handle_7220_errors()
1231 static void qib_7220_set_intr_state(struct qib_devdata *dd, u32 enable) in qib_7220_set_intr_state() argument
1234 if (dd->flags & QIB_BADINTR) in qib_7220_set_intr_state()
1236 qib_write_kreg(dd, kr_intmask, ~0ULL); in qib_7220_set_intr_state()
1238 qib_write_kreg(dd, kr_intclear, 0ULL); in qib_7220_set_intr_state()
1240 qib_write_kreg(dd, kr_intmask, 0ULL); in qib_7220_set_intr_state()
1258 static void qib_7220_clear_freeze(struct qib_devdata *dd) in qib_7220_clear_freeze() argument
1261 qib_write_kreg(dd, kr_errmask, 0ULL); in qib_7220_clear_freeze()
1264 qib_7220_set_intr_state(dd, 0); in qib_7220_clear_freeze()
1266 qib_cancel_sends(dd->pport); in qib_7220_clear_freeze()
1269 qib_write_kreg(dd, kr_control, dd->control); in qib_7220_clear_freeze()
1270 qib_read_kreg32(dd, kr_scratch); in qib_7220_clear_freeze()
1273 qib_force_pio_avail_update(dd); in qib_7220_clear_freeze()
1281 qib_write_kreg(dd, kr_hwerrclear, 0ULL); in qib_7220_clear_freeze()
1282 qib_write_kreg(dd, kr_errclear, E_SPKT_ERRS_IGNORE); in qib_7220_clear_freeze()
1283 qib_write_kreg(dd, kr_errmask, dd->cspec->errormask); in qib_7220_clear_freeze()
1284 qib_7220_set_intr_state(dd, 1); in qib_7220_clear_freeze()
1298 static void qib_7220_handle_hwerrors(struct qib_devdata *dd, char *msg, in qib_7220_handle_hwerrors() argument
1307 hwerrs = qib_read_kreg64(dd, kr_hwerrstatus); in qib_7220_handle_hwerrors()
1311 qib_dev_err(dd, in qib_7220_handle_hwerrors()
1324 qib_write_kreg(dd, kr_hwerrclear, in qib_7220_handle_hwerrors()
1327 hwerrs &= dd->cspec->hwerrmask; in qib_7220_handle_hwerrors()
1331 if (hwerrs & dd->eep_st_masks[log_idx].hwerrs_to_log) in qib_7220_handle_hwerrors()
1332 qib_inc_eeprom_err(dd, log_idx, 1); in qib_7220_handle_hwerrors()
1335 qib_devinfo(dd->pcidev, in qib_7220_handle_hwerrors()
1340 qib_dev_err(dd, in qib_7220_handle_hwerrors()
1345 qib_sd7220_clr_ibpar(dd); in qib_7220_handle_hwerrors()
1347 ctrl = qib_read_kreg32(dd, kr_control); in qib_7220_handle_hwerrors()
1348 if ((ctrl & QLOGIC_IB_C_FREEZEMODE) && !dd->diag_client) { in qib_7220_handle_hwerrors()
1355 qib_7220_txe_recover(dd); in qib_7220_handle_hwerrors()
1362 qib_7220_clear_freeze(dd); in qib_7220_handle_hwerrors()
1373 dd->cspec->hwerrmask &= ~HWE_MASK(PowerOnBISTFailed); in qib_7220_handle_hwerrors()
1374 qib_write_kreg(dd, kr_hwerrmask, dd->cspec->hwerrmask); in qib_7220_handle_hwerrors()
1380 bitsmsg = dd->cspec->bitsmsgbuf; in qib_7220_handle_hwerrors()
1386 snprintf(bitsmsg, sizeof(dd->cspec->bitsmsgbuf), in qib_7220_handle_hwerrors()
1396 snprintf(bitsmsg, sizeof(dd->cspec->bitsmsgbuf), in qib_7220_handle_hwerrors()
1401 dd->cspec->hwerrmask &= ~(hwerrs & _QIB_PLL_FAIL); in qib_7220_handle_hwerrors()
1402 qib_write_kreg(dd, kr_hwerrmask, dd->cspec->hwerrmask); in qib_7220_handle_hwerrors()
1410 dd->cspec->hwerrmask &= ~QLOGIC_IB_HWE_SERDESPLLFAILED; in qib_7220_handle_hwerrors()
1411 qib_write_kreg(dd, kr_hwerrmask, dd->cspec->hwerrmask); in qib_7220_handle_hwerrors()
1414 qib_dev_err(dd, "%s hardware error\n", msg); in qib_7220_handle_hwerrors()
1416 if (isfatal && !dd->diag_client) { in qib_7220_handle_hwerrors()
1417 qib_dev_err(dd, in qib_7220_handle_hwerrors()
1419 dd->serial); in qib_7220_handle_hwerrors()
1424 if (dd->freezemsg) in qib_7220_handle_hwerrors()
1425 snprintf(dd->freezemsg, dd->freezelen, in qib_7220_handle_hwerrors()
1427 qib_disable_after_error(dd); in qib_7220_handle_hwerrors()
1442 static void qib_7220_init_hwerrors(struct qib_devdata *dd) in qib_7220_init_hwerrors() argument
1447 extsval = qib_read_kreg64(dd, kr_extstatus); in qib_7220_init_hwerrors()
1451 qib_dev_err(dd, "MemBIST did not complete!\n"); in qib_7220_init_hwerrors()
1453 qib_devinfo(dd->pcidev, "MemBIST is disabled.\n"); in qib_7220_init_hwerrors()
1458 dd->cspec->hwerrmask = val; in qib_7220_init_hwerrors()
1460 qib_write_kreg(dd, kr_hwerrclear, ~HWE_MASK(PowerOnBISTFailed)); in qib_7220_init_hwerrors()
1461 qib_write_kreg(dd, kr_hwerrmask, dd->cspec->hwerrmask); in qib_7220_init_hwerrors()
1464 qib_write_kreg(dd, kr_errclear, ~0ULL); in qib_7220_init_hwerrors()
1466 qib_write_kreg(dd, kr_errmask, ~0ULL); in qib_7220_init_hwerrors()
1467 dd->cspec->errormask = qib_read_kreg64(dd, kr_errmask); in qib_7220_init_hwerrors()
1469 qib_write_kreg(dd, kr_intclear, ~0ULL); in qib_7220_init_hwerrors()
1478 static void qib_set_7220_armlaunch(struct qib_devdata *dd, u32 enable) in qib_set_7220_armlaunch() argument
1481 qib_write_kreg(dd, kr_errclear, ERR_MASK(SendPioArmLaunchErr)); in qib_set_7220_armlaunch()
1482 dd->cspec->errormask |= ERR_MASK(SendPioArmLaunchErr); in qib_set_7220_armlaunch()
1484 dd->cspec->errormask &= ~ERR_MASK(SendPioArmLaunchErr); in qib_set_7220_armlaunch()
1485 qib_write_kreg(dd, kr_errmask, dd->cspec->errormask); in qib_set_7220_armlaunch()
1497 struct qib_devdata *dd = ppd->dd; in qib_set_ib_7220_lstate() local
1522 qib_write_kreg(dd, kr_ibcctrl, ppd->cpspec->ibcctrl | mod_wd); in qib_set_ib_7220_lstate()
1524 qib_write_kreg(dd, kr_scratch, 0); in qib_set_ib_7220_lstate()
1540 struct qib_devdata *dd = ppd->dd; in qib_7220_bringup_serdes() local
1545 dd->control &= ~QLOGIC_IB_C_LINKENABLE; in qib_7220_bringup_serdes()
1546 qib_write_kreg(dd, kr_control, 0ULL); in qib_7220_bringup_serdes()
1550 ppd->cpspec->ibsymsnap = read_7220_creg32(dd, cr_ibsymbolerr); in qib_7220_bringup_serdes()
1552 read_7220_creg32(dd, cr_iblinkerrrecov); in qib_7220_bringup_serdes()
1579 qib_write_kreg(dd, kr_ibcctrl, val); in qib_7220_bringup_serdes()
1583 ppd->cpspec->ibcddrctrl = qib_read_kreg64(dd, kr_ibcddrctrl); in qib_7220_bringup_serdes()
1612 qib_write_kreg(dd, kr_scratch, 0); in qib_7220_bringup_serdes()
1614 qib_write_kreg(dd, kr_ibcddrctrl, ppd->cpspec->ibcddrctrl); in qib_7220_bringup_serdes()
1615 qib_write_kreg(dd, kr_scratch, 0); in qib_7220_bringup_serdes()
1617 qib_write_kreg(dd, kr_ncmodectrl, 0Ull); in qib_7220_bringup_serdes()
1618 qib_write_kreg(dd, kr_scratch, 0); in qib_7220_bringup_serdes()
1620 ret = qib_sd7220_init(dd); in qib_7220_bringup_serdes()
1622 val = qib_read_kreg64(dd, kr_xgxs_cfg); in qib_7220_bringup_serdes()
1626 qib_write_kreg(dd, kr_xgxs_cfg, val); in qib_7220_bringup_serdes()
1627 qib_read_kreg32(dd, kr_scratch); in qib_7220_bringup_serdes()
1632 qib_write_kreg(dd, kr_xgxs_cfg, val); in qib_7220_bringup_serdes()
1636 ppd->guid = dd->base_guid; in qib_7220_bringup_serdes()
1639 qib_write_kreg(dd, kr_hrtbt_guid, guid); in qib_7220_bringup_serdes()
1641 dd->control |= QLOGIC_IB_C_LINKENABLE; in qib_7220_bringup_serdes()
1642 qib_write_kreg(dd, kr_control, dd->control); in qib_7220_bringup_serdes()
1645 qib_write_kreg(dd, kr_scratch, 0); in qib_7220_bringup_serdes()
1657 struct qib_devdata *dd = ppd->dd; in qib_7220_quiet_serdes() local
1661 dd->control &= ~QLOGIC_IB_C_LINKENABLE; in qib_7220_quiet_serdes()
1662 qib_write_kreg(dd, kr_control, in qib_7220_quiet_serdes()
1663 dd->control | QLOGIC_IB_C_FREEZEMODE); in qib_7220_quiet_serdes()
1674 diagc = qib_read_kreg64(dd, kr_hwdiagctrl); in qib_7220_quiet_serdes()
1675 qib_write_kreg(dd, kr_hwdiagctrl, in qib_7220_quiet_serdes()
1679 val = read_7220_creg32(dd, cr_ibsymbolerr); in qib_7220_quiet_serdes()
1683 write_7220_creg(dd, cr_ibsymbolerr, val); in qib_7220_quiet_serdes()
1686 val = read_7220_creg32(dd, cr_iblinkerrrecov); in qib_7220_quiet_serdes()
1690 write_7220_creg(dd, cr_iblinkerrrecov, val); in qib_7220_quiet_serdes()
1694 qib_write_kreg(dd, kr_hwdiagctrl, diagc); in qib_7220_quiet_serdes()
1704 shutdown_7220_relock_poll(ppd->dd); in qib_7220_quiet_serdes()
1705 val = qib_read_kreg64(ppd->dd, kr_xgxs_cfg); in qib_7220_quiet_serdes()
1707 qib_write_kreg(ppd->dd, kr_xgxs_cfg, val); in qib_7220_quiet_serdes()
1735 struct qib_devdata *dd = ppd->dd; in qib_setup_7220_setextled() local
1743 if (dd->diag_client) in qib_setup_7220_setextled()
1752 val = qib_read_kreg64(dd, kr_ibcstatus); in qib_setup_7220_setextled()
1760 spin_lock_irqsave(&dd->cspec->gpio_lock, flags); in qib_setup_7220_setextled()
1761 extctl = dd->cspec->extctrl & ~(SYM_MASK(EXTCtrl, LEDPriPortGreenOn) | in qib_setup_7220_setextled()
1775 dd->cspec->extctrl = extctl; in qib_setup_7220_setextled()
1776 qib_write_kreg(dd, kr_extctrl, extctl); in qib_setup_7220_setextled()
1777 spin_unlock_irqrestore(&dd->cspec->gpio_lock, flags); in qib_setup_7220_setextled()
1780 qib_write_kreg(dd, kr_rcvpktledcnt, ledblink); in qib_setup_7220_setextled()
1783 static void qib_7220_free_irq(struct qib_devdata *dd) in qib_7220_free_irq() argument
1785 if (dd->cspec->irq) { in qib_7220_free_irq()
1786 free_irq(dd->cspec->irq, dd); in qib_7220_free_irq()
1787 dd->cspec->irq = 0; in qib_7220_free_irq()
1789 qib_nomsi(dd); in qib_7220_free_irq()
1799 static void qib_setup_7220_cleanup(struct qib_devdata *dd) in qib_setup_7220_cleanup() argument
1801 qib_7220_free_irq(dd); in qib_setup_7220_cleanup()
1802 kfree(dd->cspec->cntrs); in qib_setup_7220_cleanup()
1803 kfree(dd->cspec->portcntrs); in qib_setup_7220_cleanup()
1845 static void qib_wantpiobuf_7220_intr(struct qib_devdata *dd, u32 needint) in qib_wantpiobuf_7220_intr() argument
1849 spin_lock_irqsave(&dd->sendctrl_lock, flags); in qib_wantpiobuf_7220_intr()
1851 if (!(dd->sendctrl & SYM_MASK(SendCtrl, SendBufAvailUpd))) in qib_wantpiobuf_7220_intr()
1858 qib_write_kreg(dd, kr_sendctrl, dd->sendctrl & in qib_wantpiobuf_7220_intr()
1860 qib_write_kreg(dd, kr_scratch, 0ULL); in qib_wantpiobuf_7220_intr()
1861 dd->sendctrl |= SYM_MASK(SendCtrl, SendIntBufAvail); in qib_wantpiobuf_7220_intr()
1863 dd->sendctrl &= ~SYM_MASK(SendCtrl, SendIntBufAvail); in qib_wantpiobuf_7220_intr()
1864 qib_write_kreg(dd, kr_sendctrl, dd->sendctrl); in qib_wantpiobuf_7220_intr()
1865 qib_write_kreg(dd, kr_scratch, 0ULL); in qib_wantpiobuf_7220_intr()
1867 spin_unlock_irqrestore(&dd->sendctrl_lock, flags); in qib_wantpiobuf_7220_intr()
1874 static noinline void unlikely_7220_intr(struct qib_devdata *dd, u64 istat) in unlikely_7220_intr() argument
1877 qib_dev_err(dd, in unlikely_7220_intr()
1891 gpiostatus = qib_read_kreg32(dd, kr_gpio_status); in unlikely_7220_intr()
1899 qib_write_kreg(dd, kr_gpio_clear, gpiostatus); in unlikely_7220_intr()
1902 const u32 mask = qib_read_kreg32(dd, kr_gpio_mask); in unlikely_7220_intr()
1916 dd->cspec->gpio_mask &= ~gpio_irq; in unlikely_7220_intr()
1917 qib_write_kreg(dd, kr_gpio_mask, dd->cspec->gpio_mask); in unlikely_7220_intr()
1925 estat = qib_read_kreg64(dd, kr_errstatus); in unlikely_7220_intr()
1927 qib_devinfo(dd->pcidev, in unlikely_7220_intr()
1931 handle_7220_errors(dd, estat); in unlikely_7220_intr()
1937 struct qib_devdata *dd = data; in qib_7220intr() local
1944 if ((dd->flags & (QIB_PRESENT | QIB_BADINTR)) != QIB_PRESENT) { in qib_7220intr()
1955 istat = qib_read_kreg64(dd, kr_intstatus); in qib_7220intr()
1962 qib_bad_intrstatus(dd); in qib_7220intr()
1968 this_cpu_inc(*dd->int_counter); in qib_7220intr()
1971 unlikely_7220_intr(dd, istat); in qib_7220intr()
1979 qib_write_kreg(dd, kr_intclear, istat); in qib_7220intr()
1992 for (i = 0; i < dd->first_user_ctxt; i++) { in qib_7220intr()
1995 qib_kreceive(dd->rcd[i], NULL, NULL); in qib_7220intr()
2003 qib_handle_urcv(dd, ctxtrbits); in qib_7220intr()
2009 sdma_7220_intr(dd->pport, istat); in qib_7220intr()
2011 if ((istat & QLOGIC_IB_I_SPIOBUFAVAIL) && (dd->flags & QIB_INITTED)) in qib_7220intr()
2012 qib_ib_piobufavail(dd); in qib_7220intr()
2027 static void qib_setup_7220_interrupt(struct qib_devdata *dd) in qib_setup_7220_interrupt() argument
2029 if (!dd->cspec->irq) in qib_setup_7220_interrupt()
2030 qib_dev_err(dd, in qib_setup_7220_interrupt()
2033 int ret = request_irq(dd->cspec->irq, qib_7220intr, in qib_setup_7220_interrupt()
2034 dd->msi_lo ? 0 : IRQF_SHARED, in qib_setup_7220_interrupt()
2035 QIB_DRV_NAME, dd); in qib_setup_7220_interrupt()
2038 qib_dev_err(dd, in qib_setup_7220_interrupt()
2040 dd->msi_lo ? "MSI" : "INTx", in qib_setup_7220_interrupt()
2041 dd->cspec->irq, ret); in qib_setup_7220_interrupt()
2051 static void qib_7220_boardname(struct qib_devdata *dd) in qib_7220_boardname() argument
2055 boardid = SYM_FIELD(dd->revision, Revision, in qib_7220_boardname()
2060 dd->boardname = "InfiniPath_QLE7240"; in qib_7220_boardname()
2063 dd->boardname = "InfiniPath_QLE7280"; in qib_7220_boardname()
2066 qib_dev_err(dd, "Unknown 7220 board with ID %u\n", boardid); in qib_7220_boardname()
2067 dd->boardname = "Unknown_InfiniPath_7220"; in qib_7220_boardname()
2071 if (dd->majrev != 5 || !dd->minrev || dd->minrev > 2) in qib_7220_boardname()
2072 qib_dev_err(dd, in qib_7220_boardname()
2074 dd->majrev, dd->minrev); in qib_7220_boardname()
2076 snprintf(dd->boardversion, sizeof(dd->boardversion), in qib_7220_boardname()
2078 QIB_CHIP_VERS_MAJ, QIB_CHIP_VERS_MIN, dd->boardname, in qib_7220_boardname()
2079 (unsigned int)SYM_FIELD(dd->revision, Revision_R, Arch), in qib_7220_boardname()
2080 dd->majrev, dd->minrev, in qib_7220_boardname()
2081 (unsigned int)SYM_FIELD(dd->revision, Revision_R, SW)); in qib_7220_boardname()
2088 static int qib_setup_7220_reset(struct qib_devdata *dd) in qib_setup_7220_reset() argument
2097 qib_pcie_getcmd(dd, &cmdval, &int_line, &clinesz); in qib_setup_7220_reset()
2100 qib_dev_err(dd, "Resetting InfiniPath unit %u\n", dd->unit); in qib_setup_7220_reset()
2103 qib_7220_set_intr_state(dd, 0); in qib_setup_7220_reset()
2105 dd->pport->cpspec->ibdeltainprog = 0; in qib_setup_7220_reset()
2106 dd->pport->cpspec->ibsymdelta = 0; in qib_setup_7220_reset()
2107 dd->pport->cpspec->iblnkerrdelta = 0; in qib_setup_7220_reset()
2114 dd->flags &= ~(QIB_INITTED | QIB_PRESENT); in qib_setup_7220_reset()
2116 dd->z_int_counter = qib_int_counter(dd); in qib_setup_7220_reset()
2117 val = dd->control | QLOGIC_IB_C_RESET; in qib_setup_7220_reset()
2118 writeq(val, &dd->kregbase[kr_control]); in qib_setup_7220_reset()
2129 qib_pcie_reenable(dd, cmdval, int_line, clinesz); in qib_setup_7220_reset()
2135 val = readq(&dd->kregbase[kr_revision]); in qib_setup_7220_reset()
2136 if (val == dd->revision) { in qib_setup_7220_reset()
2137 dd->flags |= QIB_PRESENT; /* it's back */ in qib_setup_7220_reset()
2138 ret = qib_reinit_intr(dd); in qib_setup_7220_reset()
2146 if (qib_pcie_params(dd, dd->lbus_width, NULL)) in qib_setup_7220_reset()
2147 qib_dev_err(dd, in qib_setup_7220_reset()
2151 qib_write_kreg(dd, kr_control, 0ULL); in qib_setup_7220_reset()
2154 qib_7220_init_hwerrors(dd); in qib_setup_7220_reset()
2157 if (dd->pport->cpspec->ibcddrctrl & IBA7220_IBC_IBTA_1_2_MASK) in qib_setup_7220_reset()
2158 dd->cspec->presets_needed = 1; in qib_setup_7220_reset()
2159 spin_lock_irqsave(&dd->pport->lflags_lock, flags); in qib_setup_7220_reset()
2160 dd->pport->lflags |= QIBL_IB_FORCE_NOTIFY; in qib_setup_7220_reset()
2161 dd->pport->lflags &= ~QIBL_IB_AUTONEG_FAILED; in qib_setup_7220_reset()
2162 spin_unlock_irqrestore(&dd->pport->lflags_lock, flags); in qib_setup_7220_reset()
2175 static void qib_7220_put_tid(struct qib_devdata *dd, u64 __iomem *tidptr, in qib_7220_put_tid() argument
2178 if (pa != dd->tidinvalid) { in qib_7220_put_tid()
2183 qib_dev_err(dd, "Physaddr %lx not 2KB aligned!\n", in qib_7220_put_tid()
2188 qib_dev_err(dd, in qib_7220_put_tid()
2195 chippa |= dd->tidtemplate; in qib_7220_put_tid()
2214 static void qib_7220_clear_tids(struct qib_devdata *dd, in qib_7220_clear_tids() argument
2222 if (!dd->kregbase || !rcd) in qib_7220_clear_tids()
2227 tidinv = dd->tidinvalid; in qib_7220_clear_tids()
2229 ((char __iomem *)(dd->kregbase) + in qib_7220_clear_tids()
2230 dd->rcvtidbase + in qib_7220_clear_tids()
2231 ctxt * dd->rcvtidcnt * sizeof(*tidbase)); in qib_7220_clear_tids()
2233 for (i = 0; i < dd->rcvtidcnt; i++) in qib_7220_clear_tids()
2234 qib_7220_put_tid(dd, &tidbase[i], RCVHQ_RCV_TYPE_EXPECTED, in qib_7220_clear_tids()
2238 ((char __iomem *)(dd->kregbase) + in qib_7220_clear_tids()
2239 dd->rcvegrbase + in qib_7220_clear_tids()
2243 qib_7220_put_tid(dd, &tidbase[i], RCVHQ_RCV_TYPE_EAGER, in qib_7220_clear_tids()
2253 static void qib_7220_tidtemplate(struct qib_devdata *dd) in qib_7220_tidtemplate() argument
2255 if (dd->rcvegrbufsize == 2048) in qib_7220_tidtemplate()
2256 dd->tidtemplate = IBA7220_TID_SZ_2K; in qib_7220_tidtemplate()
2257 else if (dd->rcvegrbufsize == 4096) in qib_7220_tidtemplate()
2258 dd->tidtemplate = IBA7220_TID_SZ_4K; in qib_7220_tidtemplate()
2259 dd->tidinvalid = 0; in qib_7220_tidtemplate()
2276 if (rcd->dd->flags & QIB_USE_SPCL_TRIG) in qib_7220_get_base_info()
2283 qib_7220_get_msgheader(struct qib_devdata *dd, __le32 *rhf_addr) in qib_7220_get_msgheader() argument
2288 (rhf_addr - dd->rhf_offset + offset); in qib_7220_get_msgheader()
2291 static void qib_7220_config_ctxts(struct qib_devdata *dd) in qib_7220_config_ctxts() argument
2296 nchipctxts = qib_read_kreg32(dd, kr_portcnt); in qib_7220_config_ctxts()
2297 dd->cspec->numctxts = nchipctxts; in qib_7220_config_ctxts()
2299 dd->qpn_mask = 0x3e; in qib_7220_config_ctxts()
2300 dd->first_user_ctxt = qib_n_krcv_queues * dd->num_pports; in qib_7220_config_ctxts()
2301 if (dd->first_user_ctxt > nchipctxts) in qib_7220_config_ctxts()
2302 dd->first_user_ctxt = nchipctxts; in qib_7220_config_ctxts()
2304 dd->first_user_ctxt = dd->num_pports; in qib_7220_config_ctxts()
2305 dd->n_krcv_queues = dd->first_user_ctxt; in qib_7220_config_ctxts()
2308 int nctxts = dd->first_user_ctxt + num_online_cpus(); in qib_7220_config_ctxts()
2311 dd->ctxtcnt = 5; in qib_7220_config_ctxts()
2313 dd->ctxtcnt = 9; in qib_7220_config_ctxts()
2315 dd->ctxtcnt = nchipctxts; in qib_7220_config_ctxts()
2317 dd->ctxtcnt = qib_cfgctxts; in qib_7220_config_ctxts()
2318 if (!dd->ctxtcnt) /* none of the above, set to max */ in qib_7220_config_ctxts()
2319 dd->ctxtcnt = nchipctxts; in qib_7220_config_ctxts()
2326 spin_lock_irqsave(&dd->cspec->rcvmod_lock, flags); in qib_7220_config_ctxts()
2327 if (dd->ctxtcnt > 9) in qib_7220_config_ctxts()
2328 dd->rcvctrl |= 2ULL << IBA7220_R_CTXTCFG_SHIFT; in qib_7220_config_ctxts()
2329 else if (dd->ctxtcnt > 5) in qib_7220_config_ctxts()
2330 dd->rcvctrl |= 1ULL << IBA7220_R_CTXTCFG_SHIFT; in qib_7220_config_ctxts()
2332 if (dd->qpn_mask) in qib_7220_config_ctxts()
2333 dd->rcvctrl |= 1ULL << QIB_7220_RcvCtrl_RcvQPMapEnable_LSB; in qib_7220_config_ctxts()
2334 qib_write_kreg(dd, kr_rcvctrl, dd->rcvctrl); in qib_7220_config_ctxts()
2335 spin_unlock_irqrestore(&dd->cspec->rcvmod_lock, flags); in qib_7220_config_ctxts()
2338 dd->cspec->rcvegrcnt = qib_read_kreg32(dd, kr_rcvegrcnt); in qib_7220_config_ctxts()
2339 dd->rcvhdrcnt = max(dd->cspec->rcvegrcnt, IBA7220_KRCVEGRCNT); in qib_7220_config_ctxts()
2375 ret = qib_read_kreg64(ppd->dd, kr_ibcddrstatus) in qib_7220_get_ib_cfg()
2432 struct qib_devdata *dd = ppd->dd; in qib_7220_set_ib_cfg() local
2486 dd->cspec->presets_needed = 1; in qib_7220_set_ib_cfg()
2532 qib_write_kreg(dd, kr_ibcctrl, ppd->cpspec->ibcctrl); in qib_7220_set_ib_cfg()
2533 qib_write_kreg(dd, kr_scratch, 0); in qib_7220_set_ib_cfg()
2545 qib_write_kreg(dd, kr_ibcctrl, ppd->cpspec->ibcctrl); in qib_7220_set_ib_cfg()
2546 qib_write_kreg(dd, kr_scratch, 0); in qib_7220_set_ib_cfg()
2554 qib_write_kreg(dd, kr_partitionkey, maskr); in qib_7220_set_ib_cfg()
2565 qib_write_kreg(dd, kr_ibcctrl, ppd->cpspec->ibcctrl); in qib_7220_set_ib_cfg()
2566 qib_write_kreg(dd, kr_scratch, 0); in qib_7220_set_ib_cfg()
2580 qib_write_kreg(dd, kr_ibcctrl, ppd->cpspec->ibcctrl); in qib_7220_set_ib_cfg()
2581 qib_write_kreg(dd, kr_scratch, 0); in qib_7220_set_ib_cfg()
2592 read_7220_creg32(dd, cr_ibsymbolerr); in qib_7220_set_ib_cfg()
2594 read_7220_creg32(dd, cr_iblinkerrrecov); in qib_7220_set_ib_cfg()
2608 qib_dev_err(dd, "bad linkcmd req 0x%x\n", val >> 16); in qib_7220_set_ib_cfg()
2639 qib_dev_err(dd, "bad linkinitcmd req 0x%x\n", in qib_7220_set_ib_cfg()
2659 qib_write_kreg(dd, kr_ibcddrctrl, in qib_7220_set_ib_cfg()
2661 qib_write_kreg(dd, kr_scratch, 0); in qib_7220_set_ib_cfg()
2683 qib_write_kreg(dd, kr_ibcddrctrl, ppd->cpspec->ibcddrctrl); in qib_7220_set_ib_cfg()
2684 qib_write_kreg(dd, kr_scratch, 0); in qib_7220_set_ib_cfg()
2702 qib_devinfo(ppd->dd->pcidev, "Enabling IB%u:%u IBC loopback\n", in qib_7220_set_loopback()
2703 ppd->dd->unit, ppd->port); in qib_7220_set_loopback()
2708 qib_devinfo(ppd->dd->pcidev, in qib_7220_set_loopback()
2710 ppd->dd->unit, ppd->port); in qib_7220_set_loopback()
2714 qib_write_kreg(ppd->dd, kr_ibcctrl, ppd->cpspec->ibcctrl); in qib_7220_set_loopback()
2718 qib_write_kreg(ppd->dd, kr_ibcddrctrl, in qib_7220_set_loopback()
2720 qib_write_kreg(ppd->dd, kr_scratch, 0); in qib_7220_set_loopback()
2729 qib_write_ureg(rcd->dd, ur_rcvegrindexhead, egrhd, rcd->ctxt); in qib_update_7220_usrhead()
2731 qib_write_ureg(rcd->dd, ur_rcvhdrhead, hd, rcd->ctxt); in qib_update_7220_usrhead()
2739 head = qib_read_ureg32(rcd->dd, ur_rcvhdrhead, rcd->ctxt); in qib_7220_hdrqempty()
2743 tail = qib_read_ureg32(rcd->dd, ur_rcvhdrtail, rcd->ctxt); in qib_7220_hdrqempty()
2757 struct qib_devdata *dd = ppd->dd; in rcvctrl_7220_mod() local
2761 spin_lock_irqsave(&dd->cspec->rcvmod_lock, flags); in rcvctrl_7220_mod()
2763 dd->rcvctrl |= (1ULL << IBA7220_R_TAILUPD_SHIFT); in rcvctrl_7220_mod()
2765 dd->rcvctrl &= ~(1ULL << IBA7220_R_TAILUPD_SHIFT); in rcvctrl_7220_mod()
2767 dd->rcvctrl &= ~(1ULL << IBA7220_R_PKEY_DIS_SHIFT); in rcvctrl_7220_mod()
2769 dd->rcvctrl |= (1ULL << IBA7220_R_PKEY_DIS_SHIFT); in rcvctrl_7220_mod()
2771 mask = (1ULL << dd->ctxtcnt) - 1; in rcvctrl_7220_mod()
2776 dd->rcvctrl |= (mask << SYM_LSB(RcvCtrl, PortEnable)); in rcvctrl_7220_mod()
2777 if (!(dd->flags & QIB_NODMA_RTAIL)) in rcvctrl_7220_mod()
2778 dd->rcvctrl |= 1ULL << IBA7220_R_TAILUPD_SHIFT; in rcvctrl_7220_mod()
2780 qib_write_kreg_ctxt(dd, kr_rcvhdrtailaddr, ctxt, in rcvctrl_7220_mod()
2781 dd->rcd[ctxt]->rcvhdrqtailaddr_phys); in rcvctrl_7220_mod()
2782 qib_write_kreg_ctxt(dd, kr_rcvhdraddr, ctxt, in rcvctrl_7220_mod()
2783 dd->rcd[ctxt]->rcvhdrq_phys); in rcvctrl_7220_mod()
2784 dd->rcd[ctxt]->seq_cnt = 1; in rcvctrl_7220_mod()
2787 dd->rcvctrl &= ~(mask << SYM_LSB(RcvCtrl, PortEnable)); in rcvctrl_7220_mod()
2789 dd->rcvctrl |= (mask << IBA7220_R_INTRAVAIL_SHIFT); in rcvctrl_7220_mod()
2791 dd->rcvctrl &= ~(mask << IBA7220_R_INTRAVAIL_SHIFT); in rcvctrl_7220_mod()
2792 qib_write_kreg(dd, kr_rcvctrl, dd->rcvctrl); in rcvctrl_7220_mod()
2793 if ((op & QIB_RCVCTRL_INTRAVAIL_ENB) && dd->rhdrhead_intr_off) { in rcvctrl_7220_mod()
2795 val = qib_read_ureg32(dd, ur_rcvhdrhead, ctxt) | in rcvctrl_7220_mod()
2796 dd->rhdrhead_intr_off; in rcvctrl_7220_mod()
2797 qib_write_ureg(dd, ur_rcvhdrhead, val, ctxt); in rcvctrl_7220_mod()
2806 val = qib_read_ureg32(dd, ur_rcvegrindextail, ctxt); in rcvctrl_7220_mod()
2807 qib_write_ureg(dd, ur_rcvegrindexhead, val, ctxt); in rcvctrl_7220_mod()
2809 val = qib_read_ureg32(dd, ur_rcvhdrtail, ctxt); in rcvctrl_7220_mod()
2810 dd->rcd[ctxt]->head = val; in rcvctrl_7220_mod()
2812 if (ctxt < dd->first_user_ctxt) in rcvctrl_7220_mod()
2813 val |= dd->rhdrhead_intr_off; in rcvctrl_7220_mod()
2814 qib_write_ureg(dd, ur_rcvhdrhead, val, ctxt); in rcvctrl_7220_mod()
2818 qib_write_kreg_ctxt(dd, kr_rcvhdrtailaddr, ctxt, 0); in rcvctrl_7220_mod()
2819 qib_write_kreg_ctxt(dd, kr_rcvhdraddr, ctxt, 0); in rcvctrl_7220_mod()
2823 for (i = 0; i < dd->cfgctxts; i++) { in rcvctrl_7220_mod()
2824 qib_write_kreg_ctxt(dd, kr_rcvhdrtailaddr, in rcvctrl_7220_mod()
2826 qib_write_kreg_ctxt(dd, kr_rcvhdraddr, i, 0); in rcvctrl_7220_mod()
2830 spin_unlock_irqrestore(&dd->cspec->rcvmod_lock, flags); in rcvctrl_7220_mod()
2843 struct qib_devdata *dd = ppd->dd; in sendctrl_7220_mod() local
2847 spin_lock_irqsave(&dd->sendctrl_lock, flags); in sendctrl_7220_mod()
2851 dd->sendctrl = 0; in sendctrl_7220_mod()
2853 dd->sendctrl &= ~SYM_MASK(SendCtrl, SPioEnable); in sendctrl_7220_mod()
2855 dd->sendctrl |= SYM_MASK(SendCtrl, SPioEnable); in sendctrl_7220_mod()
2856 if (dd->flags & QIB_USE_SPCL_TRIG) in sendctrl_7220_mod()
2857 dd->sendctrl |= SYM_MASK(SendCtrl, in sendctrl_7220_mod()
2861 dd->sendctrl &= ~SYM_MASK(SendCtrl, SendBufAvailUpd); in sendctrl_7220_mod()
2863 dd->sendctrl |= SYM_MASK(SendCtrl, SendBufAvailUpd); in sendctrl_7220_mod()
2868 tmp_dd_sendctrl = dd->sendctrl; in sendctrl_7220_mod()
2873 last = dd->piobcnt2k + dd->piobcnt4k; in sendctrl_7220_mod()
2878 qib_write_kreg(dd, kr_sendctrl, in sendctrl_7220_mod()
2881 qib_write_kreg(dd, kr_scratch, 0); in sendctrl_7220_mod()
2885 tmp_dd_sendctrl = dd->sendctrl; in sendctrl_7220_mod()
2894 (dd->sendctrl & SYM_MASK(SendCtrl, SendBufAvailUpd))) in sendctrl_7220_mod()
2897 qib_write_kreg(dd, kr_sendctrl, tmp_dd_sendctrl); in sendctrl_7220_mod()
2898 qib_write_kreg(dd, kr_scratch, 0); in sendctrl_7220_mod()
2901 qib_write_kreg(dd, kr_sendctrl, dd->sendctrl); in sendctrl_7220_mod()
2902 qib_write_kreg(dd, kr_scratch, 0); in sendctrl_7220_mod()
2905 spin_unlock_irqrestore(&dd->sendctrl_lock, flags); in sendctrl_7220_mod()
2915 v = qib_read_kreg32(dd, kr_scratch); in sendctrl_7220_mod()
2916 qib_write_kreg(dd, kr_scratch, v); in sendctrl_7220_mod()
2917 v = qib_read_kreg32(dd, kr_scratch); in sendctrl_7220_mod()
2918 qib_write_kreg(dd, kr_scratch, v); in sendctrl_7220_mod()
2919 qib_read_kreg32(dd, kr_scratch); in sendctrl_7220_mod()
2931 struct qib_devdata *dd = ppd->dd; in qib_portcntr_7220() local
2972 qib_devinfo(ppd->dd->pcidev, in qib_portcntr_7220()
2982 for (i = 0; i < dd->first_user_ctxt; i++) in qib_portcntr_7220()
2983 ret += read_7220_creg32(dd, cr_portovfl + i); in qib_portcntr_7220()
2994 ret = read_7220_creg(dd, creg); in qib_portcntr_7220()
2996 ret = read_7220_creg32(dd, creg); in qib_portcntr_7220()
2998 if (dd->pport->cpspec->ibdeltainprog) in qib_portcntr_7220()
3000 ret -= dd->pport->cpspec->ibsymdelta; in qib_portcntr_7220()
3002 if (dd->pport->cpspec->ibdeltainprog) in qib_portcntr_7220()
3004 ret -= dd->pport->cpspec->iblnkerrdelta; in qib_portcntr_7220()
3153 static void init_7220_cntrnames(struct qib_devdata *dd) in init_7220_cntrnames() argument
3158 for (i = 0, s = (char *)cntr7220names; s && j <= dd->cfgctxts; in init_7220_cntrnames()
3167 dd->cspec->ncntrs = i; in init_7220_cntrnames()
3170 dd->cspec->cntrnamelen = sizeof(cntr7220names) - 1; in init_7220_cntrnames()
3172 dd->cspec->cntrnamelen = 1 + s - cntr7220names; in init_7220_cntrnames()
3173 dd->cspec->cntrs = kmalloc(dd->cspec->ncntrs in init_7220_cntrnames()
3178 dd->cspec->nportcntrs = i - 1; in init_7220_cntrnames()
3179 dd->cspec->portcntrnamelen = sizeof(portcntr7220names) - 1; in init_7220_cntrnames()
3180 dd->cspec->portcntrs = kmalloc(dd->cspec->nportcntrs in init_7220_cntrnames()
3184 static u32 qib_read_7220cntrs(struct qib_devdata *dd, loff_t pos, char **namep, in qib_read_7220cntrs() argument
3189 if (!dd->cspec->cntrs) { in qib_read_7220cntrs()
3196 ret = dd->cspec->cntrnamelen; in qib_read_7220cntrs()
3200 u64 *cntr = dd->cspec->cntrs; in qib_read_7220cntrs()
3203 ret = dd->cspec->ncntrs * sizeof(u64); in qib_read_7220cntrs()
3211 for (i = 0; i < dd->cspec->ncntrs; i++) in qib_read_7220cntrs()
3212 *cntr++ = read_7220_creg32(dd, cntr7220indices[i]); in qib_read_7220cntrs()
3218 static u32 qib_read_7220portcntrs(struct qib_devdata *dd, loff_t pos, u32 port, in qib_read_7220portcntrs() argument
3223 if (!dd->cspec->portcntrs) { in qib_read_7220portcntrs()
3229 ret = dd->cspec->portcntrnamelen; in qib_read_7220portcntrs()
3233 u64 *cntr = dd->cspec->portcntrs; in qib_read_7220portcntrs()
3234 struct qib_pportdata *ppd = &dd->pport[port]; in qib_read_7220portcntrs()
3237 ret = dd->cspec->nportcntrs * sizeof(u64); in qib_read_7220portcntrs()
3244 for (i = 0; i < dd->cspec->nportcntrs; i++) { in qib_read_7220portcntrs()
3250 *cntr++ = read_7220_creg32(dd, in qib_read_7220portcntrs()
3268 struct qib_devdata *dd = (struct qib_devdata *) opaque; in qib_get_7220_faststats() local
3269 struct qib_pportdata *ppd = dd->pport; in qib_get_7220_faststats()
3277 if (!(dd->flags & QIB_INITTED) || dd->diag_client) in qib_get_7220_faststats()
3288 spin_lock_irqsave(&dd->eep_st_lock, flags); in qib_get_7220_faststats()
3289 traffic_wds -= dd->traffic_wds; in qib_get_7220_faststats()
3290 dd->traffic_wds += traffic_wds; in qib_get_7220_faststats()
3291 spin_unlock_irqrestore(&dd->eep_st_lock, flags); in qib_get_7220_faststats()
3293 mod_timer(&dd->stats_timer, jiffies + HZ * ACTIVITY_TIMER); in qib_get_7220_faststats()
3299 static int qib_7220_intr_fallback(struct qib_devdata *dd) in qib_7220_intr_fallback() argument
3301 if (!dd->msi_lo) in qib_7220_intr_fallback()
3304 qib_devinfo(dd->pcidev, in qib_7220_intr_fallback()
3306 qib_7220_free_irq(dd); in qib_7220_intr_fallback()
3307 qib_enable_intx(dd); in qib_7220_intr_fallback()
3314 dd->cspec->irq = dd->pcidev->irq; in qib_7220_intr_fallback()
3315 qib_setup_7220_interrupt(dd); in qib_7220_intr_fallback()
3328 struct qib_devdata *dd = ppd->dd; in qib_7220_xgxs_reset() local
3330 prev_val = qib_read_kreg64(dd, kr_xgxs_cfg); in qib_7220_xgxs_reset()
3333 qib_write_kreg(dd, kr_control, in qib_7220_xgxs_reset()
3334 dd->control & ~QLOGIC_IB_C_LINKENABLE); in qib_7220_xgxs_reset()
3335 qib_write_kreg(dd, kr_xgxs_cfg, val); in qib_7220_xgxs_reset()
3336 qib_read_kreg32(dd, kr_scratch); in qib_7220_xgxs_reset()
3337 qib_write_kreg(dd, kr_xgxs_cfg, prev_val); in qib_7220_xgxs_reset()
3338 qib_write_kreg(dd, kr_control, dd->control); in qib_7220_xgxs_reset()
3359 u32 lbuf = ppd->dd->cspec->lastbuf_for_pio; in get_7220_link_buf()
3367 sendctrl_7220_mod(ppd->dd->pport, QIB_SENDCTRL_AVAIL_BLIP); in get_7220_link_buf()
3368 qib_read_kreg64(ppd->dd, kr_scratch); /* extra chip flush */ in get_7220_link_buf()
3369 buf = qib_getsendbuf_range(ppd->dd, bnum, lbuf, lbuf); in get_7220_link_buf()
3385 qib_read_kreg64(ppd->dd, kr_scratch); /* extra chip flush */ in get_7220_link_buf()
3386 buf = qib_getsendbuf_range(ppd->dd, bnum, lbuf, lbuf); in get_7220_link_buf()
3407 struct qib_devdata *dd = ppd->dd; in autoneg_7220_sendpkt() local
3417 sendctrl_7220_mod(dd->pport, QIB_SENDCTRL_DISARM_BUF(pnum)); in autoneg_7220_sendpkt()
3422 if (dd->flags & QIB_USE_SPCL_TRIG) { in autoneg_7220_sendpkt()
3423 u32 spcl_off = (pnum >= dd->piobcnt2k) ? 2047 : 1023; in autoneg_7220_sendpkt()
3429 qib_sendbuf_done(dd, pnum); in autoneg_7220_sendpkt()
3437 struct qib_devdata *dd = ppd->dd; in autoneg_7220_send() local
3472 qib_read_kreg64(dd, kr_scratch); in autoneg_7220_send()
3475 qib_read_kreg64(dd, kr_scratch); in autoneg_7220_send()
3505 qib_write_kreg(ppd->dd, kr_ibcddrctrl, ppd->cpspec->ibcddrctrl); in set_7220_ibspeed_fast()
3506 qib_write_kreg(ppd->dd, kr_scratch, 0); in set_7220_ibspeed_fast()
3524 qib_write_kreg(ppd->dd, kr_ncmodectrl, 0x3b9dc07); in try_7220_autoneg()
3532 toggle_7220_rclkrls(ppd->dd); in try_7220_autoneg()
3545 struct qib_devdata *dd; in autoneg_7220_work() local
3552 dd = ppd->dd; in autoneg_7220_work()
3578 toggle_7220_rclkrls(dd); in autoneg_7220_work()
3587 toggle_7220_rclkrls(dd); in autoneg_7220_work()
3600 if (dd->cspec->autoneg_tries == AUTONEG_TRIES) { in autoneg_7220_work()
3602 dd->cspec->autoneg_tries = 0; in autoneg_7220_work()
3643 struct qib_devdata *dd = ppd->dd; in qib_7220_ib_updown() local
3660 qib_sd7220_presets(dd); in qib_7220_ib_updown()
3669 set_7220_relock_poll(dd, ibup); in qib_7220_ib_updown()
3677 dd->cspec->autoneg_tries < AUTONEG_TRIES) { in qib_7220_ib_updown()
3679 ++dd->cspec->autoneg_tries; in qib_7220_ib_updown()
3682 ppd->cpspec->ibsymsnap = read_7220_creg32(dd, in qib_7220_ib_updown()
3684 ppd->cpspec->iblnkerrsnap = read_7220_creg32(dd, in qib_7220_ib_updown()
3694 toggle_7220_rclkrls(dd); in qib_7220_ib_updown()
3704 dd->cspec->autoneg_tries = 0; in qib_7220_ib_updown()
3723 qib_write_kreg(dd, kr_ncmodectrl, 0); in qib_7220_ib_updown()
3736 set_7220_relock_poll(dd, ibup); in qib_7220_ib_updown()
3754 ppd->cpspec->ibsymdelta += read_7220_creg32(ppd->dd, in qib_7220_ib_updown()
3756 ppd->cpspec->iblnkerrdelta += read_7220_creg32(ppd->dd, in qib_7220_ib_updown()
3763 ppd->cpspec->ibsymsnap = read_7220_creg32(ppd->dd, in qib_7220_ib_updown()
3765 ppd->cpspec->iblnkerrsnap = read_7220_creg32(ppd->dd, in qib_7220_ib_updown()
3781 static int gpio_7220_mod(struct qib_devdata *dd, u32 out, u32 dir, u32 mask) in gpio_7220_mod() argument
3790 spin_lock_irqsave(&dd->cspec->gpio_lock, flags); in gpio_7220_mod()
3791 dd->cspec->extctrl &= ~((u64)mask << SYM_LSB(EXTCtrl, GPIOOe)); in gpio_7220_mod()
3792 dd->cspec->extctrl |= ((u64) dir << SYM_LSB(EXTCtrl, GPIOOe)); in gpio_7220_mod()
3793 new_out = (dd->cspec->gpio_out & ~mask) | out; in gpio_7220_mod()
3795 qib_write_kreg(dd, kr_extctrl, dd->cspec->extctrl); in gpio_7220_mod()
3796 qib_write_kreg(dd, kr_gpio_out, new_out); in gpio_7220_mod()
3797 dd->cspec->gpio_out = new_out; in gpio_7220_mod()
3798 spin_unlock_irqrestore(&dd->cspec->gpio_lock, flags); in gpio_7220_mod()
3808 read_val = qib_read_kreg64(dd, kr_extstatus); in gpio_7220_mod()
3817 static void get_7220_chip_params(struct qib_devdata *dd) in get_7220_chip_params() argument
3823 dd->uregbase = qib_read_kreg32(dd, kr_userregbase); in get_7220_chip_params()
3825 dd->rcvtidcnt = qib_read_kreg32(dd, kr_rcvtidcnt); in get_7220_chip_params()
3826 dd->rcvtidbase = qib_read_kreg32(dd, kr_rcvtidbase); in get_7220_chip_params()
3827 dd->rcvegrbase = qib_read_kreg32(dd, kr_rcvegrbase); in get_7220_chip_params()
3828 dd->palign = qib_read_kreg32(dd, kr_palign); in get_7220_chip_params()
3829 dd->piobufbase = qib_read_kreg64(dd, kr_sendpiobufbase); in get_7220_chip_params()
3830 dd->pio2k_bufbase = dd->piobufbase & 0xffffffff; in get_7220_chip_params()
3832 val = qib_read_kreg64(dd, kr_sendpiosize); in get_7220_chip_params()
3833 dd->piosize2k = val & ~0U; in get_7220_chip_params()
3834 dd->piosize4k = val >> 32; in get_7220_chip_params()
3839 dd->pport->ibmtu = (u32)mtu; in get_7220_chip_params()
3841 val = qib_read_kreg64(dd, kr_sendpiobufcnt); in get_7220_chip_params()
3842 dd->piobcnt2k = val & ~0U; in get_7220_chip_params()
3843 dd->piobcnt4k = val >> 32; in get_7220_chip_params()
3845 dd->pio2kbase = (u32 __iomem *) in get_7220_chip_params()
3846 ((char __iomem *) dd->kregbase + dd->pio2k_bufbase); in get_7220_chip_params()
3847 if (dd->piobcnt4k) { in get_7220_chip_params()
3848 dd->pio4kbase = (u32 __iomem *) in get_7220_chip_params()
3849 ((char __iomem *) dd->kregbase + in get_7220_chip_params()
3850 (dd->piobufbase >> 32)); in get_7220_chip_params()
3856 dd->align4k = ALIGN(dd->piosize4k, dd->palign); in get_7220_chip_params()
3859 piobufs = dd->piobcnt4k + dd->piobcnt2k; in get_7220_chip_params()
3861 dd->pioavregs = ALIGN(piobufs, sizeof(u64) * BITS_PER_BYTE / 2) / in get_7220_chip_params()
3870 static void set_7220_baseaddrs(struct qib_devdata *dd) in set_7220_baseaddrs() argument
3874 cregbase = qib_read_kreg32(dd, kr_counterregbase); in set_7220_baseaddrs()
3875 dd->cspec->cregbase = (u64 __iomem *) in set_7220_baseaddrs()
3876 ((char __iomem *) dd->kregbase + cregbase); in set_7220_baseaddrs()
3878 dd->egrtidbase = (u64 __iomem *) in set_7220_baseaddrs()
3879 ((char __iomem *) dd->kregbase + dd->rcvegrbase); in set_7220_baseaddrs()
3893 static int sendctrl_hook(struct qib_devdata *dd, in sendctrl_hook() argument
3902 qib_dev_err(dd, "SendCtrl Hook called with offs %X, %s-bit\n", in sendctrl_hook()
3910 spin_lock_irqsave(&dd->sendctrl_lock, flags); in sendctrl_hook()
3920 local_data = (u64)qib_read_kreg32(dd, idx); in sendctrl_hook()
3922 local_data = qib_read_kreg64(dd, idx); in sendctrl_hook()
3923 qib_dev_err(dd, "Sendctrl -> %X, Shad -> %X\n", in sendctrl_hook()
3924 (u32)local_data, (u32)dd->sendctrl); in sendctrl_hook()
3926 (dd->sendctrl & SENDCTRL_SHADOWED)) in sendctrl_hook()
3927 qib_dev_err(dd, "Sendctrl read: %X shadow is %X\n", in sendctrl_hook()
3928 (u32)local_data, (u32) dd->sendctrl); in sendctrl_hook()
3942 sval = (dd->sendctrl & ~mask); in sendctrl_hook()
3944 dd->sendctrl = sval; in sendctrl_hook()
3946 qib_dev_err(dd, "Sendctrl <- %X, Shad <- %X\n", in sendctrl_hook()
3948 qib_write_kreg(dd, kr_sendctrl, tval); in sendctrl_hook()
3949 qib_write_kreg(dd, kr_scratch, 0Ull); in sendctrl_hook()
3951 spin_unlock_irqrestore(&dd->sendctrl_lock, flags); in sendctrl_hook()
3966 static int qib_late_7220_initreg(struct qib_devdata *dd) in qib_late_7220_initreg() argument
3971 qib_write_kreg(dd, kr_rcvhdrentsize, dd->rcvhdrentsize); in qib_late_7220_initreg()
3972 qib_write_kreg(dd, kr_rcvhdrsize, dd->rcvhdrsize); in qib_late_7220_initreg()
3973 qib_write_kreg(dd, kr_rcvhdrcnt, dd->rcvhdrcnt); in qib_late_7220_initreg()
3974 qib_write_kreg(dd, kr_sendpioavailaddr, dd->pioavailregs_phys); in qib_late_7220_initreg()
3975 val = qib_read_kreg64(dd, kr_sendpioavailaddr); in qib_late_7220_initreg()
3976 if (val != dd->pioavailregs_phys) { in qib_late_7220_initreg()
3977 qib_dev_err(dd, in qib_late_7220_initreg()
3979 (unsigned long) dd->pioavailregs_phys, in qib_late_7220_initreg()
3983 qib_register_observer(dd, &sendctrl_observer); in qib_late_7220_initreg()
3987 static int qib_init_7220_variables(struct qib_devdata *dd) in qib_init_7220_variables() argument
3994 cpspec = (struct qib_chippport_specific *)(dd + 1); in qib_init_7220_variables()
3996 dd->pport = ppd; in qib_init_7220_variables()
3997 dd->num_pports = 1; in qib_init_7220_variables()
3999 dd->cspec = (struct qib_chip_specific *)(cpspec + dd->num_pports); in qib_init_7220_variables()
4002 spin_lock_init(&dd->cspec->sdepb_lock); in qib_init_7220_variables()
4003 spin_lock_init(&dd->cspec->rcvmod_lock); in qib_init_7220_variables()
4004 spin_lock_init(&dd->cspec->gpio_lock); in qib_init_7220_variables()
4007 dd->revision = readq(&dd->kregbase[kr_revision]); in qib_init_7220_variables()
4009 if ((dd->revision & 0xffffffffU) == 0xffffffffU) { in qib_init_7220_variables()
4010 qib_dev_err(dd, in qib_init_7220_variables()
4015 dd->flags |= QIB_PRESENT; /* now register routines work */ in qib_init_7220_variables()
4017 dd->majrev = (u8) SYM_FIELD(dd->revision, Revision_R, in qib_init_7220_variables()
4019 dd->minrev = (u8) SYM_FIELD(dd->revision, Revision_R, in qib_init_7220_variables()
4022 get_7220_chip_params(dd); in qib_init_7220_variables()
4023 qib_7220_boardname(dd); in qib_init_7220_variables()
4029 dd->gpio_sda_num = _QIB_GPIO_SDA_NUM; in qib_init_7220_variables()
4030 dd->gpio_scl_num = _QIB_GPIO_SCL_NUM; in qib_init_7220_variables()
4031 dd->twsi_eeprom_dev = QIB_TWSI_EEPROM_DEV; in qib_init_7220_variables()
4033 dd->flags |= QIB_HAS_INTX | QIB_HAS_LINK_LATENCY | in qib_init_7220_variables()
4035 dd->flags |= qib_special_trigger ? in qib_init_7220_variables()
4042 dd->eep_st_masks[0].hwerrs_to_log = HWE_MASK(TXEMemParityErr); in qib_init_7220_variables()
4044 dd->eep_st_masks[1].hwerrs_to_log = HWE_MASK(RXEMemParityErr); in qib_init_7220_variables()
4046 dd->eep_st_masks[2].errs_to_log = ERR_MASK(ResetNegated); in qib_init_7220_variables()
4051 ret = qib_init_pportdata(ppd, dd, 0, 1); in qib_init_7220_variables()
4070 qib_write_kreg(dd, kr_rcvbthqp, QIB_KD_QP); in qib_init_7220_variables()
4077 dd->rcvhdrentsize = QIB_RCVHDR_ENTSIZE; in qib_init_7220_variables()
4078 dd->rcvhdrsize = QIB_DFLT_RCVHDRSIZE; in qib_init_7220_variables()
4079 dd->rhf_offset = in qib_init_7220_variables()
4080 dd->rcvhdrentsize - sizeof(u64) / sizeof(u32); in qib_init_7220_variables()
4084 dd->rcvegrbufsize = ret != -1 ? max(ret, 2048) : QIB_DEFAULT_MTU; in qib_init_7220_variables()
4085 BUG_ON(!is_power_of_2(dd->rcvegrbufsize)); in qib_init_7220_variables()
4086 dd->rcvegrbufsize_shift = ilog2(dd->rcvegrbufsize); in qib_init_7220_variables()
4088 qib_7220_tidtemplate(dd); in qib_init_7220_variables()
4095 dd->rhdrhead_intr_off = 1ULL << 32; in qib_init_7220_variables()
4098 init_timer(&dd->stats_timer); in qib_init_7220_variables()
4099 dd->stats_timer.function = qib_get_7220_faststats; in qib_init_7220_variables()
4100 dd->stats_timer.data = (unsigned long) dd; in qib_init_7220_variables()
4101 dd->stats_timer.expires = jiffies + ACTIVITY_TIMER * HZ; in qib_init_7220_variables()
4109 dd->control |= 1 << 4; in qib_init_7220_variables()
4111 dd->ureg_align = 0x10000; /* 64KB alignment */ in qib_init_7220_variables()
4113 dd->piosize2kmax_dwords = (dd->piosize2k >> 2)-1; in qib_init_7220_variables()
4114 qib_7220_config_ctxts(dd); in qib_init_7220_variables()
4115 qib_set_ctxtcnt(dd); /* needed for PAT setup */ in qib_init_7220_variables()
4117 ret = init_chip_wc_pat(dd, 0); in qib_init_7220_variables()
4120 set_7220_baseaddrs(dd); /* set chip access pointers now */ in qib_init_7220_variables()
4126 ret = qib_create_ctxts(dd); in qib_init_7220_variables()
4127 init_7220_cntrnames(dd); in qib_init_7220_variables()
4140 if (dd->flags & QIB_HAS_SEND_DMA) { in qib_init_7220_variables()
4141 dd->cspec->sdmabufcnt = dd->piobcnt4k; in qib_init_7220_variables()
4144 dd->cspec->sdmabufcnt = 0; in qib_init_7220_variables()
4145 sbufs = dd->piobcnt4k; in qib_init_7220_variables()
4148 dd->cspec->lastbuf_for_pio = dd->piobcnt2k + dd->piobcnt4k - in qib_init_7220_variables()
4149 dd->cspec->sdmabufcnt; in qib_init_7220_variables()
4150 dd->lastctxt_piobuf = dd->cspec->lastbuf_for_pio - sbufs; in qib_init_7220_variables()
4151 dd->cspec->lastbuf_for_pio--; /* range is <= , not < */ in qib_init_7220_variables()
4152 dd->last_pio = dd->cspec->lastbuf_for_pio; in qib_init_7220_variables()
4153 dd->pbufsctxt = dd->lastctxt_piobuf / in qib_init_7220_variables()
4154 (dd->cfgctxts - dd->first_user_ctxt); in qib_init_7220_variables()
4162 if ((dd->pbufsctxt - 2) < updthresh) in qib_init_7220_variables()
4163 updthresh = dd->pbufsctxt - 2; in qib_init_7220_variables()
4165 dd->cspec->updthresh_dflt = updthresh; in qib_init_7220_variables()
4166 dd->cspec->updthresh = updthresh; in qib_init_7220_variables()
4169 dd->sendctrl |= (updthresh & SYM_RMASK(SendCtrl, AvailUpdThld)) in qib_init_7220_variables()
4172 dd->psxmitwait_supported = 1; in qib_init_7220_variables()
4173 dd->psxmitwait_check_rate = QIB_7220_PSXMITWAIT_CHECK_RATE; in qib_init_7220_variables()
4182 struct qib_devdata *dd = ppd->dd; in qib_7220_getsendbuf() local
4189 if ((plen + 1) > dd->piosize2kmax_dwords) in qib_7220_getsendbuf()
4190 first = dd->piobcnt2k; in qib_7220_getsendbuf()
4194 last = dd->cspec->lastbuf_for_pio; in qib_7220_getsendbuf()
4195 buf = qib_getsendbuf_range(dd, pbufnum, first, last); in qib_7220_getsendbuf()
4204 write_7220_creg(ppd->dd, cr_psinterval, intv); in qib_set_cntr_7220_sample()
4205 write_7220_creg(ppd->dd, cr_psstart, start); in qib_set_cntr_7220_sample()
4220 qib_write_kreg(ppd->dd, kr_senddmatail, tail); in qib_sdma_update_7220_tail()
4274 struct qib_devdata *dd = ppd->dd; in init_sdma_7220_regs() local
4279 qib_write_kreg(dd, kr_senddmabase, ppd->sdma_descq_phys); in init_sdma_7220_regs()
4283 qib_write_kreg(dd, kr_senddmaheadaddr, ppd->sdma_head_phys); in init_sdma_7220_regs()
4289 n = dd->piobcnt2k + dd->piobcnt4k; in init_sdma_7220_regs()
4290 i = n - dd->cspec->sdmabufcnt; in init_sdma_7220_regs()
4299 qib_write_kreg(dd, kr_senddmabufmask0, senddmabufmask[0]); in init_sdma_7220_regs()
4300 qib_write_kreg(dd, kr_senddmabufmask1, senddmabufmask[1]); in init_sdma_7220_regs()
4301 qib_write_kreg(dd, kr_senddmabufmask2, senddmabufmask[2]); in init_sdma_7220_regs()
4312 struct qib_devdata *dd = ppd->dd; in qib_sdma_7220_gethead() local
4321 (dd->flags & QIB_HAS_SDMA_TIMEOUT); in qib_sdma_7220_gethead()
4325 (u16)qib_read_kreg32(dd, kr_senddmahead); in qib_sdma_7220_gethead()
4358 u64 hwstatus = qib_read_kreg64(ppd->dd, kr_senddmastatus); in qib_sdma_7220_busy()
4390 static void qib_7220_initvl15_bufs(struct qib_devdata *dd) in qib_7220_initvl15_bufs() argument
4400 rcd->rcvegrcnt = rcd->dd->cspec->rcvegrcnt; in qib_7220_init_ctxt()
4406 static void qib_7220_txchk_change(struct qib_devdata *dd, u32 start, in qib_7220_txchk_change() argument
4415 spin_lock_irqsave(&dd->uctxt_lock, flags); in qib_7220_txchk_change()
4416 for (i = dd->first_user_ctxt; in qib_7220_txchk_change()
4417 dd->cspec->updthresh != dd->cspec->updthresh_dflt in qib_7220_txchk_change()
4418 && i < dd->cfgctxts; i++) in qib_7220_txchk_change()
4419 if (dd->rcd[i] && dd->rcd[i]->subctxt_cnt && in qib_7220_txchk_change()
4420 ((dd->rcd[i]->piocnt / dd->rcd[i]->subctxt_cnt) - 1) in qib_7220_txchk_change()
4421 < dd->cspec->updthresh_dflt) in qib_7220_txchk_change()
4423 spin_unlock_irqrestore(&dd->uctxt_lock, flags); in qib_7220_txchk_change()
4424 if (i == dd->cfgctxts) { in qib_7220_txchk_change()
4425 spin_lock_irqsave(&dd->sendctrl_lock, flags); in qib_7220_txchk_change()
4426 dd->cspec->updthresh = dd->cspec->updthresh_dflt; in qib_7220_txchk_change()
4427 dd->sendctrl &= ~SYM_MASK(SendCtrl, AvailUpdThld); in qib_7220_txchk_change()
4428 dd->sendctrl |= (dd->cspec->updthresh & in qib_7220_txchk_change()
4431 spin_unlock_irqrestore(&dd->sendctrl_lock, flags); in qib_7220_txchk_change()
4432 sendctrl_7220_mod(dd->pport, QIB_SENDCTRL_AVAIL_BLIP); in qib_7220_txchk_change()
4436 spin_lock_irqsave(&dd->sendctrl_lock, flags); in qib_7220_txchk_change()
4438 / rcd->subctxt_cnt) - 1) < dd->cspec->updthresh) { in qib_7220_txchk_change()
4439 dd->cspec->updthresh = (rcd->piocnt / in qib_7220_txchk_change()
4441 dd->sendctrl &= ~SYM_MASK(SendCtrl, AvailUpdThld); in qib_7220_txchk_change()
4442 dd->sendctrl |= (dd->cspec->updthresh & in qib_7220_txchk_change()
4445 spin_unlock_irqrestore(&dd->sendctrl_lock, flags); in qib_7220_txchk_change()
4446 sendctrl_7220_mod(dd->pport, QIB_SENDCTRL_AVAIL_BLIP); in qib_7220_txchk_change()
4448 spin_unlock_irqrestore(&dd->sendctrl_lock, flags); in qib_7220_txchk_change()
4453 static void writescratch(struct qib_devdata *dd, u32 val) in writescratch() argument
4455 qib_write_kreg(dd, kr_scratch, val); in writescratch()
4466 static int qib_7220_tempsense_rd(struct qib_devdata *dd, int regnum) in qib_7220_tempsense_rd() argument
4482 ret = mutex_lock_interruptible(&dd->eep_lock); in qib_7220_tempsense_rd()
4486 ret = qib_twsi_blk_rd(dd, QIB_TWSI_TEMP_DEV, regnum, &rdata, 1); in qib_7220_tempsense_rd()
4490 mutex_unlock(&dd->eep_lock); in qib_7220_tempsense_rd()
4503 static int qib_7220_notify_dca(struct qib_devdata *dd, unsigned long event) in qib_7220_notify_dca() argument
4510 static int qib_7220_eeprom_wen(struct qib_devdata *dd, int wen) in qib_7220_eeprom_wen() argument
4526 struct qib_devdata *dd; in qib_init_iba7220_funcs() local
4530 dd = qib_alloc_devdata(pdev, sizeof(struct qib_chip_specific) + in qib_init_iba7220_funcs()
4532 if (IS_ERR(dd)) in qib_init_iba7220_funcs()
4535 dd->f_bringup_serdes = qib_7220_bringup_serdes; in qib_init_iba7220_funcs()
4536 dd->f_cleanup = qib_setup_7220_cleanup; in qib_init_iba7220_funcs()
4537 dd->f_clear_tids = qib_7220_clear_tids; in qib_init_iba7220_funcs()
4538 dd->f_free_irq = qib_7220_free_irq; in qib_init_iba7220_funcs()
4539 dd->f_get_base_info = qib_7220_get_base_info; in qib_init_iba7220_funcs()
4540 dd->f_get_msgheader = qib_7220_get_msgheader; in qib_init_iba7220_funcs()
4541 dd->f_getsendbuf = qib_7220_getsendbuf; in qib_init_iba7220_funcs()
4542 dd->f_gpio_mod = gpio_7220_mod; in qib_init_iba7220_funcs()
4543 dd->f_eeprom_wen = qib_7220_eeprom_wen; in qib_init_iba7220_funcs()
4544 dd->f_hdrqempty = qib_7220_hdrqempty; in qib_init_iba7220_funcs()
4545 dd->f_ib_updown = qib_7220_ib_updown; in qib_init_iba7220_funcs()
4546 dd->f_init_ctxt = qib_7220_init_ctxt; in qib_init_iba7220_funcs()
4547 dd->f_initvl15_bufs = qib_7220_initvl15_bufs; in qib_init_iba7220_funcs()
4548 dd->f_intr_fallback = qib_7220_intr_fallback; in qib_init_iba7220_funcs()
4549 dd->f_late_initreg = qib_late_7220_initreg; in qib_init_iba7220_funcs()
4550 dd->f_setpbc_control = qib_7220_setpbc_control; in qib_init_iba7220_funcs()
4551 dd->f_portcntr = qib_portcntr_7220; in qib_init_iba7220_funcs()
4552 dd->f_put_tid = qib_7220_put_tid; in qib_init_iba7220_funcs()
4553 dd->f_quiet_serdes = qib_7220_quiet_serdes; in qib_init_iba7220_funcs()
4554 dd->f_rcvctrl = rcvctrl_7220_mod; in qib_init_iba7220_funcs()
4555 dd->f_read_cntrs = qib_read_7220cntrs; in qib_init_iba7220_funcs()
4556 dd->f_read_portcntrs = qib_read_7220portcntrs; in qib_init_iba7220_funcs()
4557 dd->f_reset = qib_setup_7220_reset; in qib_init_iba7220_funcs()
4558 dd->f_init_sdma_regs = init_sdma_7220_regs; in qib_init_iba7220_funcs()
4559 dd->f_sdma_busy = qib_sdma_7220_busy; in qib_init_iba7220_funcs()
4560 dd->f_sdma_gethead = qib_sdma_7220_gethead; in qib_init_iba7220_funcs()
4561 dd->f_sdma_sendctrl = qib_7220_sdma_sendctrl; in qib_init_iba7220_funcs()
4562 dd->f_sdma_set_desc_cnt = qib_sdma_set_7220_desc_cnt; in qib_init_iba7220_funcs()
4563 dd->f_sdma_update_tail = qib_sdma_update_7220_tail; in qib_init_iba7220_funcs()
4564 dd->f_sdma_hw_clean_up = qib_7220_sdma_hw_clean_up; in qib_init_iba7220_funcs()
4565 dd->f_sdma_hw_start_up = qib_7220_sdma_hw_start_up; in qib_init_iba7220_funcs()
4566 dd->f_sdma_init_early = qib_7220_sdma_init_early; in qib_init_iba7220_funcs()
4567 dd->f_sendctrl = sendctrl_7220_mod; in qib_init_iba7220_funcs()
4568 dd->f_set_armlaunch = qib_set_7220_armlaunch; in qib_init_iba7220_funcs()
4569 dd->f_set_cntr_sample = qib_set_cntr_7220_sample; in qib_init_iba7220_funcs()
4570 dd->f_iblink_state = qib_7220_iblink_state; in qib_init_iba7220_funcs()
4571 dd->f_ibphys_portstate = qib_7220_phys_portstate; in qib_init_iba7220_funcs()
4572 dd->f_get_ib_cfg = qib_7220_get_ib_cfg; in qib_init_iba7220_funcs()
4573 dd->f_set_ib_cfg = qib_7220_set_ib_cfg; in qib_init_iba7220_funcs()
4574 dd->f_set_ib_loopback = qib_7220_set_loopback; in qib_init_iba7220_funcs()
4575 dd->f_set_intr_state = qib_7220_set_intr_state; in qib_init_iba7220_funcs()
4576 dd->f_setextled = qib_setup_7220_setextled; in qib_init_iba7220_funcs()
4577 dd->f_txchk_change = qib_7220_txchk_change; in qib_init_iba7220_funcs()
4578 dd->f_update_usrhead = qib_update_7220_usrhead; in qib_init_iba7220_funcs()
4579 dd->f_wantpiobuf_intr = qib_wantpiobuf_7220_intr; in qib_init_iba7220_funcs()
4580 dd->f_xgxs_reset = qib_7220_xgxs_reset; in qib_init_iba7220_funcs()
4581 dd->f_writescratch = writescratch; in qib_init_iba7220_funcs()
4582 dd->f_tempsense_rd = qib_7220_tempsense_rd; in qib_init_iba7220_funcs()
4584 dd->f_notify_dca = qib_7220_notify_dca; in qib_init_iba7220_funcs()
4592 ret = qib_pcie_ddinit(dd, pdev, ent); in qib_init_iba7220_funcs()
4597 ret = qib_init_7220_variables(dd); in qib_init_iba7220_funcs()
4604 boardid = SYM_FIELD(dd->revision, Revision, in qib_init_iba7220_funcs()
4617 if (qib_pcie_params(dd, minwidth, NULL)) in qib_init_iba7220_funcs()
4618 qib_dev_err(dd, in qib_init_iba7220_funcs()
4622 dd->cspec->irq = pdev->irq; in qib_init_iba7220_funcs()
4624 if (qib_read_kreg64(dd, kr_hwerrstatus) & in qib_init_iba7220_funcs()
4626 qib_write_kreg(dd, kr_hwerrclear, in qib_init_iba7220_funcs()
4630 qib_setup_7220_interrupt(dd); in qib_init_iba7220_funcs()
4631 qib_7220_init_hwerrors(dd); in qib_init_iba7220_funcs()
4634 qib_write_kreg(dd, kr_hwdiagctrl, 0); in qib_init_iba7220_funcs()
4639 qib_pcie_ddcleanup(dd); in qib_init_iba7220_funcs()
4641 qib_free_devdata(dd); in qib_init_iba7220_funcs()
4642 dd = ERR_PTR(ret); in qib_init_iba7220_funcs()
4644 return dd; in qib_init_iba7220_funcs()