239 static void epu_dma_done(struct cx18 *cx, struct cx18_in_work_order *order)  in epu_dma_done()  argument
248 	mb = &order->mb;  in epu_dma_done()
255 			  (order->flags & CX18_F_EWO_MB_STALE_UPON_RECEIPT) ?  in epu_dma_done()
261 	mdl_ack = order->mdl_ack;  in epu_dma_done()
285 		if ((order->flags & CX18_F_EWO_MB_STALE_UPON_RECEIPT) &&  in epu_dma_done()
332 static void epu_debug(struct cx18 *cx, struct cx18_in_work_order *order)  in epu_debug()  argument
335 	char *str = order->str;  in epu_debug()
337 	CX18_DEBUG_INFO("%x %s\n", order->mb.args[0], str);  in epu_debug()
343 static void epu_cmd(struct cx18 *cx, struct cx18_in_work_order *order)  in epu_cmd()  argument
345 	switch (order->rpu) {  in epu_cmd()
348 		switch (order->mb.cmd) {  in epu_cmd()
350 			epu_dma_done(cx, order);  in epu_cmd()
353 			epu_debug(cx, order);  in epu_cmd()
357 				  order->mb.cmd);  in epu_cmd()
364 			  order->mb.cmd);  in epu_cmd()
372 void free_in_work_order(struct cx18 *cx, struct cx18_in_work_order *order)  in free_in_work_order()  argument
374 	atomic_set(&order->pending, 0);  in free_in_work_order()
379 	struct cx18_in_work_order *order =  in cx18_in_work_handler()  local
381 	struct cx18 *cx = order->cx;  in cx18_in_work_handler()
382 	epu_cmd(cx, order);  in cx18_in_work_handler()
383 	free_in_work_order(cx, order);  in cx18_in_work_handler()
391 static void mb_ack_irq(struct cx18 *cx, struct cx18_in_work_order *order)  in mb_ack_irq()  argument
396 	switch (order->rpu) {  in mb_ack_irq()
407 			  order->rpu, order->mb.cmd);  in mb_ack_irq()
411 	req = order->mb.request;  in mb_ack_irq()
416 				rpu_str[order->rpu], rpu_str[order->rpu], req);  in mb_ack_irq()
417 		order->flags |= CX18_F_EWO_MB_STALE_WHILE_PROC;  in mb_ack_irq()
425 static int epu_dma_done_irq(struct cx18 *cx, struct cx18_in_work_order *order)  in epu_dma_done_irq()  argument
431 	mb = &order->mb;  in epu_dma_done_irq()
438 		if ((order->flags & CX18_F_EWO_MB_STALE) == 0)  in epu_dma_done_irq()
439 			mb_ack_irq(cx, order);  in epu_dma_done_irq()
444 		((u32 *)order->mdl_ack)[i / sizeof(u32)] =  in epu_dma_done_irq()
447 	if ((order->flags & CX18_F_EWO_MB_STALE) == 0)  in epu_dma_done_irq()
448 		mb_ack_irq(cx, order);  in epu_dma_done_irq()
453 int epu_debug_irq(struct cx18 *cx, struct cx18_in_work_order *order)  in epu_debug_irq()  argument
456 	char *str = order->str;  in epu_debug_irq()
459 	str_offset = order->mb.args[1];  in epu_debug_irq()
467 	if ((order->flags & CX18_F_EWO_MB_STALE) == 0)  in epu_debug_irq()
468 		mb_ack_irq(cx, order);  in epu_debug_irq()
474 int epu_cmd_irq(struct cx18 *cx, struct cx18_in_work_order *order)  in epu_cmd_irq()  argument
478 	switch (order->rpu) {  in epu_cmd_irq()
481 		switch (order->mb.cmd) {  in epu_cmd_irq()
483 			ret = epu_dma_done_irq(cx, order);  in epu_cmd_irq()
486 			ret = epu_debug_irq(cx, order);  in epu_cmd_irq()
490 				  order->mb.cmd);  in epu_cmd_irq()
497 			  order->mb.cmd);  in epu_cmd_irq()
509 	struct cx18_in_work_order *order = NULL;  in alloc_in_work_order_irq()  local
521 			order = &cx->in_work_order[i];  in alloc_in_work_order_irq()
522 			atomic_set(&order->pending, 1);  in alloc_in_work_order_irq()
526 	return order;  in alloc_in_work_order_irq()
533 	struct cx18_in_work_order *order;  in cx18_api_epu_cmd_irq()  local
548 	order = alloc_in_work_order_irq(cx);  in cx18_api_epu_cmd_irq()
549 	if (order == NULL) {  in cx18_api_epu_cmd_irq()
554 	order->flags = 0;  in cx18_api_epu_cmd_irq()
555 	order->rpu = rpu;  in cx18_api_epu_cmd_irq()
556 	order_mb = &order->mb;  in cx18_api_epu_cmd_irq()
571 		order->flags = CX18_F_EWO_MB_STALE_UPON_RECEIPT;  in cx18_api_epu_cmd_irq()
578 	submit = epu_cmd_irq(cx, order);  in cx18_api_epu_cmd_irq()
580 		queue_work(cx->in_work_queue, &order->work);  in cx18_api_epu_cmd_irq()