99 	u8 hw_revision, old_ver;  in ene_hw_detect()  local
107 	hw_revision = ene_read_reg(dev, ENE_ECHV);  in ene_hw_detect()
117 	if (hw_revision == 0xFF) {  in ene_hw_detect()
125 		  chip_major, chip_minor, old_ver, hw_revision);  in ene_hw_detect()
134 	if (chip_major == 0x39 && chip_minor == 0x26 && hw_revision == 0xC0) {  in ene_hw_detect()
135 		dev->hw_revision = ENE_HW_C;  in ene_hw_detect()
137 	} else if (old_ver == 0x24 && hw_revision == 0xC0) {  in ene_hw_detect()
138 		dev->hw_revision = ENE_HW_B;  in ene_hw_detect()
141 		dev->hw_revision = ENE_HW_D;  in ene_hw_detect()
146 	if (dev->hw_revision < ENE_HW_C)  in ene_hw_detect()
410 	if (dev->hw_revision < ENE_HW_C)  in ene_rx_setup()
479 	if (dev->hw_revision < ENE_HW_C) {  in ene_rx_enable_hw()
601 	if (dev->hw_revision == ENE_HW_C)  in ene_tx_enable()
693 	if (dev->hw_revision < ENE_HW_C) {  in ene_irq_status()