Lines Matching refs:irqs
646 ctx->elem->ivte_offsets[r] = cpu_to_be16(ctx->irqs.offset[r]); in update_ivtes_directed()
647 ctx->elem->ivte_ranges[r] = cpu_to_be16(ctx->irqs.range[r]); in update_ivtes_directed()
698 if (ctx->irqs.range[0] == 0) { in process_element_entry_psl9()
699 ctx->irqs.offset[0] = ctx->afu->native->psl_hwirq; in process_element_entry_psl9()
700 ctx->irqs.range[0] = 1; in process_element_entry_psl9()
761 if (ctx->irqs.range[0] == 0) { in cxl_attach_afu_directed_psl8()
762 ctx->irqs.offset[0] = ctx->afu->native->psl_hwirq; in cxl_attach_afu_directed_psl8()
763 ctx->irqs.range[0] = 1; in cxl_attach_afu_directed_psl8()
875 ctx->elem->ivte_offsets[r] = cpu_to_be16(ctx->irqs.offset[r]); in cxl_update_dedicated_ivtes_psl9()
876 ctx->elem->ivte_ranges[r] = cpu_to_be16(ctx->irqs.range[r]); in cxl_update_dedicated_ivtes_psl9()
885 (((u64)ctx->irqs.offset[0] & 0xffff) << 48) | in cxl_update_dedicated_ivtes_psl8()
886 (((u64)ctx->irqs.offset[1] & 0xffff) << 32) | in cxl_update_dedicated_ivtes_psl8()
887 (((u64)ctx->irqs.offset[2] & 0xffff) << 16) | in cxl_update_dedicated_ivtes_psl8()
888 ((u64)ctx->irqs.offset[3] & 0xffff)); in cxl_update_dedicated_ivtes_psl8()
890 (((u64)ctx->irqs.range[0] & 0xffff) << 48) | in cxl_update_dedicated_ivtes_psl8()
891 (((u64)ctx->irqs.range[1] & 0xffff) << 32) | in cxl_update_dedicated_ivtes_psl8()
892 (((u64)ctx->irqs.range[2] & 0xffff) << 16) | in cxl_update_dedicated_ivtes_psl8()
893 ((u64)ctx->irqs.range[3] & 0xffff)); in cxl_update_dedicated_ivtes_psl8()