Lines Matching refs:U64_HI
1844 U64_HI(r->rdata_mapping), in bnx2x_execute_vlan_mac()
2536 U64_HI(p->rdata_mapping), in bnx2x_set_rx_mode_e2()
3446 raw->cid, U64_HI(raw->rdata_mapping), in bnx2x_mcast_setup_e2()
3943 U64_HI(raw->rdata_mapping), in bnx2x_mcast_setup_e1()
4583 U64_HI(r->rdata_mapping), in bnx2x_setup_rss()
4857 cpu_to_le32(U64_HI(params->dscr_map)); in bnx2x_q_fill_init_tx_data()
4917 cpu_to_le32(U64_HI(params->dscr_map)); in bnx2x_q_fill_init_rx_data()
4921 cpu_to_le32(U64_HI(params->sge_map)); in bnx2x_q_fill_init_rx_data()
4925 cpu_to_le32(U64_HI(params->rcq_map)); in bnx2x_q_fill_init_rx_data()
5070 U64_HI(data_mapping), in bnx2x_q_send_setup_e1x()
5097 U64_HI(data_mapping), in bnx2x_q_send_setup_e2()
5140 U64_HI(data_mapping), in bnx2x_q_send_setup_tx_only()
5246 o->cids[cid_index], U64_HI(data_mapping), in bnx2x_q_send_update()
5304 data->sge_page_base_hi = cpu_to_le32(U64_HI(params->sge_map)); in bnx2x_q_fill_update_tpa_data()
5345 U64_HI(data_mapping), in bnx2x_q_send_update_tpa()
6194 U64_HI(data_mapping), in bnx2x_func_send_start()
6273 U64_HI(data_mapping), in bnx2x_func_send_switch_update()
6311 U64_HI(data_mapping), in bnx2x_func_send_afex_update()
6350 U64_HI(*p_rdata), U64_LO(*p_rdata), in bnx2x_func_send_afex_viflists()
6397 U64_HI(data_mapping), in bnx2x_func_send_tx_start()
6424 cpu_to_le32(U64_HI(set_timesync_params->offset_delta)); in bnx2x_func_send_set_timesync()
6433 U64_HI(data_mapping), in bnx2x_func_send_set_timesync()