Lines Matching refs:caps
404 find_first_bit(actv_ports.ports, dev->caps.num_ports); in mlx4_QUERY_FUNC_CAP_wrapper()
432 MLX4_PUT(outbox->buf, dev->caps.phys_port_id[vhcr->in_modifier], in mlx4_QUERY_FUNC_CAP_wrapper()
441 if (dev->caps.phv_bit[port]) in mlx4_QUERY_FUNC_CAP_wrapper()
462 bitmap_weight(actv_ports.ports, dev->caps.num_ports), in mlx4_QUERY_FUNC_CAP_wrapper()
463 dev->caps.num_ports); in mlx4_QUERY_FUNC_CAP_wrapper()
466 size = dev->caps.function_caps; /* set PF behaviours */ in mlx4_QUERY_FUNC_CAP_wrapper()
474 size = dev->caps.num_qps; in mlx4_QUERY_FUNC_CAP_wrapper()
479 size = dev->caps.num_srqs; in mlx4_QUERY_FUNC_CAP_wrapper()
484 size = dev->caps.num_cqs; in mlx4_QUERY_FUNC_CAP_wrapper()
487 if (!(dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_SYS_EQS) || in mlx4_QUERY_FUNC_CAP_wrapper()
491 dev->caps.num_eqs : in mlx4_QUERY_FUNC_CAP_wrapper()
492 rounddown_pow_of_two(dev->caps.num_eqs); in mlx4_QUERY_FUNC_CAP_wrapper()
494 size = dev->caps.reserved_eqs; in mlx4_QUERY_FUNC_CAP_wrapper()
508 size = dev->caps.num_mpts; in mlx4_QUERY_FUNC_CAP_wrapper()
513 size = dev->caps.num_mtts; in mlx4_QUERY_FUNC_CAP_wrapper()
516 size = dev->caps.num_mgms + dev->caps.num_amgms; in mlx4_QUERY_FUNC_CAP_wrapper()
524 size = dev->caps.reserved_lkey + ((slave << 8) & 0xFF00); in mlx4_QUERY_FUNC_CAP_wrapper()
648 if (gen_or_port > dev->caps.num_ports) { in mlx4_QUERY_FUNC_CAP()
654 if (dev->caps.port_type[gen_or_port] == MLX4_PORT_TYPE_ETH) { in mlx4_QUERY_FUNC_CAP()
666 } else if (dev->caps.port_type[gen_or_port] == MLX4_PORT_TYPE_IB) { in mlx4_QUERY_FUNC_CAP()
1288 first_port = find_first_bit(actv_ports.ports, dev->caps.num_ports); in mlx4_QUERY_DEV_CAP_wrapper()
1291 bitmap_weight(actv_ports.ports, dev->caps.num_ports); in mlx4_QUERY_DEV_CAP_wrapper()
1298 for (; slave_port < dev->caps.num_ports; ++slave_port) in mlx4_QUERY_DEV_CAP_wrapper()
1307 field |= bitmap_weight(actv_ports.ports, dev->caps.num_ports) & 0x0F; in mlx4_QUERY_DEV_CAP_wrapper()
1337 if (dev->caps.steering_mode != MLX4_STEERING_MODE_DEVICE_MANAGED) { in mlx4_QUERY_DEV_CAP_wrapper()
1428 if (!err && dev->caps.function != slave) { in mlx4_QUERY_PORT_wrapper()
1439 port_type |= (dev->caps.port_type[vhcr->in_modifier] & 0x3); in mlx4_QUERY_PORT_wrapper()
1459 if (dev->caps.port_type[vhcr->in_modifier] == MLX4_PORT_TYPE_ETH) in mlx4_QUERY_PORT_wrapper()
1466 short_field = dev->caps.pkey_table_len[vhcr->in_modifier]; in mlx4_QUERY_PORT_wrapper()
1650 dev->caps.fw_ver = (fw_ver & 0xffff00000000ull) | in mlx4_QUERY_FW()
1655 dev->caps.function = lg; in mlx4_QUERY_FW()
1667 (int) (dev->caps.fw_ver >> 32), in mlx4_QUERY_FW()
1668 (int) (dev->caps.fw_ver >> 16) & 0xffff, in mlx4_QUERY_FW()
1669 (int) dev->caps.fw_ver & 0xffff); in mlx4_QUERY_FW()
1683 (int) (dev->caps.fw_ver >> 32), in mlx4_QUERY_FW()
1684 (int) (dev->caps.fw_ver >> 16) & 0xffff, in mlx4_QUERY_FW()
1685 (int) dev->caps.fw_ver & 0xffff, in mlx4_QUERY_FW()
1902 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_IPOIB_CSUM) in mlx4_INIT_HCA()
1906 if (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_ETS_CFG && enable_qos) in mlx4_INIT_HCA()
1910 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_COUNTERS) in mlx4_INIT_HCA()
1914 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_RSS_IP_FRAG) in mlx4_INIT_HCA()
1918 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_64B_EQE) { in mlx4_INIT_HCA()
1920 dev->caps.eqe_size = 64; in mlx4_INIT_HCA()
1921 dev->caps.eqe_factor = 1; in mlx4_INIT_HCA()
1923 dev->caps.eqe_size = 32; in mlx4_INIT_HCA()
1924 dev->caps.eqe_factor = 0; in mlx4_INIT_HCA()
1927 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_64B_CQE) { in mlx4_INIT_HCA()
1929 dev->caps.cqe_size = 64; in mlx4_INIT_HCA()
1930 dev->caps.userspace_caps |= MLX4_USER_DEV_CAP_LARGE_CQE; in mlx4_INIT_HCA()
1932 dev->caps.cqe_size = 32; in mlx4_INIT_HCA()
1936 if ((dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_EQE_STRIDE) && in mlx4_INIT_HCA()
1937 (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_CQE_STRIDE)) { in mlx4_INIT_HCA()
1938 dev->caps.eqe_size = cache_line_size(); in mlx4_INIT_HCA()
1939 dev->caps.cqe_size = cache_line_size(); in mlx4_INIT_HCA()
1940 dev->caps.eqe_factor = 0; in mlx4_INIT_HCA()
1941 MLX4_PUT(inbox, (u8)((ilog2(dev->caps.eqe_size) - 5) << 4 | in mlx4_INIT_HCA()
1942 (ilog2(dev->caps.eqe_size) - 5)), in mlx4_INIT_HCA()
1946 dev->caps.userspace_caps |= MLX4_USER_DEV_CAP_LARGE_CQE; in mlx4_INIT_HCA()
1949 if (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_RECOVERABLE_ERROR_EVENT) in mlx4_INIT_HCA()
1969 if (dev->caps.steering_mode == in mlx4_INIT_HCA()
1983 if (dev->caps.dmfs_high_steer_mode != in mlx4_INIT_HCA()
1998 if (dev->caps.dmfs_high_steer_mode != in mlx4_INIT_HCA()
2001 ((u8)(a0_dmfs_hw_steering[dev->caps.dmfs_high_steer_mode] in mlx4_INIT_HCA()
2012 if (dev->caps.steering_mode == MLX4_STEERING_MODE_B0) in mlx4_INIT_HCA()
2031 if (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_VXLAN_OFFLOADS) { in mlx4_INIT_HCA()
2210 MLX4_GET(dev->caps.hca_core_clock, outbox, QUERY_HCA_CORE_CLOCK_OFFSET); in mlx4_hca_core_clock_update()
2247 if (dev->caps.port_mask[port] != MLX4_PORT_TYPE_IB) { in mlx4_INIT_PORT_wrapper()
2303 flags |= (dev->caps.vl_cap[port] & 0xf) << INIT_PORT_VL_SHIFT; in mlx4_INIT_PORT()
2304 flags |= (dev->caps.port_width_cap[port] & 0xf) << INIT_PORT_PORT_WIDTH_SHIFT; in mlx4_INIT_PORT()
2307 field = 128 << dev->caps.ib_mtu_cap[port]; in mlx4_INIT_PORT()
2309 field = dev->caps.gid_table_len[port]; in mlx4_INIT_PORT()
2311 field = dev->caps.pkey_table_len[port]; in mlx4_INIT_PORT()
2346 if (dev->caps.port_mask[port] != MLX4_PORT_TYPE_IB) { in mlx4_CLOSE_PORT_wrapper()
2466 if (!(dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_CONFIG_DEV)) in mlx4_config_dev_retrieval()
2635 for (port = 1; port <= dev->caps.num_ports; port++) { in mlx4_get_phys_port_id()
2647 dev->caps.phys_port_id[port] = (u64)guid_lo | in mlx4_get_phys_port_id()
2727 if (dev->caps.steering_mode == in mlx4_opreq_action()
2822 if (!(dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_MAD_DEMUX)) in mlx4_config_mad_demux()
3047 if (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_PHV_EN && in set_phv_bit()
3048 !(dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_SKIP_OUTER_VLAN)) { in set_phv_bit()
3051 dev->caps.phv_bit[port] = new_val; in set_phv_bit()
3081 for (i = 1; i <= dev->caps.num_ports; ++i) in mlx4_replace_zero_macs()
3082 if (!dev->caps.def_mac[i] && in mlx4_replace_zero_macs()
3083 dev->caps.port_type[i] == MLX4_PORT_TYPE_ETH) { in mlx4_replace_zero_macs()
3086 dev->caps.def_mac[i] = mlx4_mac_to_u64(mac_addr); in mlx4_replace_zero_macs()