810 			  p_hwfn->hw_info.hw_mode);  in qed_qm_reconf()
1141 	int hw_mode = 0;  in qed_calc_hw_mode()  local
1144 		hw_mode |= 1 << MODE_BB;  in qed_calc_hw_mode()
1146 		hw_mode |= 1 << MODE_K2;  in qed_calc_hw_mode()
1155 		hw_mode |= 1 << MODE_PORTS_PER_ENG_1;  in qed_calc_hw_mode()
1158 		hw_mode |= 1 << MODE_PORTS_PER_ENG_2;  in qed_calc_hw_mode()
1161 		hw_mode |= 1 << MODE_PORTS_PER_ENG_4;  in qed_calc_hw_mode()
1172 		hw_mode |= 1 << MODE_MF_SI;  in qed_calc_hw_mode()
1175 		hw_mode |= 1 << MODE_MF_SD;  in qed_calc_hw_mode()
1179 		hw_mode |= 1 << MODE_MF_SI;  in qed_calc_hw_mode()
1182 	hw_mode |= 1 << MODE_ASIC;  in qed_calc_hw_mode()
1185 		hw_mode |= 1 << MODE_100G;  in qed_calc_hw_mode()
1187 	p_hwfn->hw_info.hw_mode = hw_mode;  in qed_calc_hw_mode()
1191 		   p_hwfn->hw_info.hw_mode);  in qed_calc_hw_mode()
1281 			      struct qed_ptt *p_ptt, int hw_mode)  in qed_hw_init_common()  argument
1318 	rc = qed_init_run(p_hwfn, p_ptt, PHASE_ENGINE, ANY_PHASE_ID, hw_mode);  in qed_hw_init_common()
1482 			    struct qed_ptt *p_ptt, int hw_mode)  in qed_hw_init_port()  argument
1486 	rc = qed_init_run(p_hwfn, p_ptt, PHASE_PORT, p_hwfn->port_id, hw_mode);  in qed_hw_init_port()
1498 			  int hw_mode,  in qed_hw_init_pf()  argument
1522 	if (hw_mode & BIT(MODE_MF_SD)) {  in qed_hw_init_pf()
1530 	if (hw_mode & BIT(MODE_MF_SI)) {  in qed_hw_init_pf()
1550 	rc = qed_init_run(p_hwfn, p_ptt, PHASE_PF, rel_pf_id, hw_mode);  in qed_hw_init_pf()
1555 	rc = qed_init_run(p_hwfn, p_ptt, PHASE_QM_PF, rel_pf_id, hw_mode);  in qed_hw_init_pf()
1716 						p_hwfn->hw_info.hw_mode);  in qed_hw_init()
1722 					      p_hwfn->hw_info.hw_mode);  in qed_hw_init()
1730 					    p_hwfn->hw_info.hw_mode,  in qed_hw_init()