100 static void tpu_pwm_write(struct tpu_pwm_device *pwm, int reg_nr, u16 value)  in tpu_pwm_write()  argument
102 	void __iomem *base = pwm->tpu->base + TPU_CHANNEL_OFFSET  in tpu_pwm_write()
103 			   + pwm->channel * TPU_CHANNEL_SIZE;  in tpu_pwm_write()
108 static void tpu_pwm_set_pin(struct tpu_pwm_device *pwm,  in tpu_pwm_set_pin()  argument
113 	dev_dbg(&pwm->tpu->pdev->dev, "%u: configuring pin as %s\n",  in tpu_pwm_set_pin()
114 		pwm->channel, states[state]);  in tpu_pwm_set_pin()
118 		tpu_pwm_write(pwm, TPU_TIORn,  in tpu_pwm_set_pin()
119 			      pwm->polarity == PWM_POLARITY_INVERSED ?  in tpu_pwm_set_pin()
123 		tpu_pwm_write(pwm, TPU_TIORn,  in tpu_pwm_set_pin()
124 			      pwm->polarity == PWM_POLARITY_INVERSED ?  in tpu_pwm_set_pin()
128 		tpu_pwm_write(pwm, TPU_TIORn,  in tpu_pwm_set_pin()
129 			      pwm->polarity == PWM_POLARITY_INVERSED ?  in tpu_pwm_set_pin()
135 static void tpu_pwm_start_stop(struct tpu_pwm_device *pwm, int start)  in tpu_pwm_start_stop()  argument
140 	spin_lock_irqsave(&pwm->tpu->lock, flags);  in tpu_pwm_start_stop()
141 	value = ioread16(pwm->tpu->base + TPU_TSTR);  in tpu_pwm_start_stop()
144 		value |= 1 << pwm->channel;  in tpu_pwm_start_stop()
146 		value &= ~(1 << pwm->channel);  in tpu_pwm_start_stop()
148 	iowrite16(value, pwm->tpu->base + TPU_TSTR);  in tpu_pwm_start_stop()
149 	spin_unlock_irqrestore(&pwm->tpu->lock, flags);  in tpu_pwm_start_stop()
152 static int tpu_pwm_timer_start(struct tpu_pwm_device *pwm)  in tpu_pwm_timer_start()  argument
156 	if (!pwm->timer_on) {  in tpu_pwm_timer_start()
158 		pm_runtime_get_sync(&pwm->tpu->pdev->dev);  in tpu_pwm_timer_start()
159 		ret = clk_prepare_enable(pwm->tpu->clk);  in tpu_pwm_timer_start()
161 			dev_err(&pwm->tpu->pdev->dev, "cannot enable clock\n");  in tpu_pwm_timer_start()
164 		pwm->timer_on = true;  in tpu_pwm_timer_start()
172 	tpu_pwm_set_pin(pwm, TPU_PIN_INACTIVE);  in tpu_pwm_timer_start()
173 	tpu_pwm_start_stop(pwm, false);  in tpu_pwm_timer_start()
183 	tpu_pwm_write(pwm, TPU_TCRn, TPU_TCR_CCLR_TGRB | TPU_TCR_CKEG_RISING |  in tpu_pwm_timer_start()
184 		      pwm->prescaler);  in tpu_pwm_timer_start()
185 	tpu_pwm_write(pwm, TPU_TMDRn, TPU_TMDR_MD_PWM);  in tpu_pwm_timer_start()
186 	tpu_pwm_set_pin(pwm, TPU_PIN_PWM);  in tpu_pwm_timer_start()
187 	tpu_pwm_write(pwm, TPU_TGRAn, pwm->duty);  in tpu_pwm_timer_start()
188 	tpu_pwm_write(pwm, TPU_TGRBn, pwm->period);  in tpu_pwm_timer_start()
190 	dev_dbg(&pwm->tpu->pdev->dev, "%u: TGRA 0x%04x TGRB 0x%04x\n",  in tpu_pwm_timer_start()
191 		pwm->channel, pwm->duty, pwm->period);  in tpu_pwm_timer_start()
194 	tpu_pwm_start_stop(pwm, true);  in tpu_pwm_timer_start()
199 static void tpu_pwm_timer_stop(struct tpu_pwm_device *pwm)  in tpu_pwm_timer_stop()  argument
201 	if (!pwm->timer_on)  in tpu_pwm_timer_stop()
205 	tpu_pwm_start_stop(pwm, false);  in tpu_pwm_timer_stop()
208 	clk_disable_unprepare(pwm->tpu->clk);  in tpu_pwm_timer_stop()
209 	pm_runtime_put(&pwm->tpu->pdev->dev);  in tpu_pwm_timer_stop()
211 	pwm->timer_on = false;  in tpu_pwm_timer_stop()
221 	struct tpu_pwm_device *pwm;  in tpu_pwm_request()  local
226 	pwm = kzalloc(sizeof(*pwm), GFP_KERNEL);  in tpu_pwm_request()
227 	if (pwm == NULL)  in tpu_pwm_request()
230 	pwm->tpu = tpu;  in tpu_pwm_request()
231 	pwm->channel = _pwm->hwpwm;  in tpu_pwm_request()
232 	pwm->polarity = PWM_POLARITY_NORMAL;  in tpu_pwm_request()
233 	pwm->prescaler = 0;  in tpu_pwm_request()
234 	pwm->period = 0;  in tpu_pwm_request()
235 	pwm->duty = 0;  in tpu_pwm_request()
237 	pwm->timer_on = false;  in tpu_pwm_request()
239 	pwm_set_chip_data(_pwm, pwm);  in tpu_pwm_request()
246 	struct tpu_pwm_device *pwm = pwm_get_chip_data(_pwm);  in tpu_pwm_free()  local
248 	tpu_pwm_timer_stop(pwm);  in tpu_pwm_free()
249 	kfree(pwm);  in tpu_pwm_free()
256 	struct tpu_pwm_device *pwm = pwm_get_chip_data(_pwm);  in tpu_pwm_config()  local
296 	if (pwm->prescaler == prescaler && pwm->period == period)  in tpu_pwm_config()
299 	pwm->prescaler = prescaler;  in tpu_pwm_config()
300 	pwm->period = period;  in tpu_pwm_config()
301 	pwm->duty = duty;  in tpu_pwm_config()
307 	if (duty_only && pwm->timer_on) {  in tpu_pwm_config()
313 		tpu_pwm_write(pwm, TPU_TGRAn, pwm->duty);  in tpu_pwm_config()
314 		dev_dbg(&tpu->pdev->dev, "%u: TGRA 0x%04x\n", pwm->channel,  in tpu_pwm_config()
315 			pwm->duty);  in tpu_pwm_config()
318 		ret = tpu_pwm_timer_start(pwm);  in tpu_pwm_config()
328 		tpu_pwm_set_pin(pwm, duty ? TPU_PIN_ACTIVE : TPU_PIN_INACTIVE);  in tpu_pwm_config()
329 		tpu_pwm_timer_stop(pwm);  in tpu_pwm_config()
338 	struct tpu_pwm_device *pwm = pwm_get_chip_data(_pwm);  in tpu_pwm_set_polarity()  local
340 	pwm->polarity = polarity;  in tpu_pwm_set_polarity()
347 	struct tpu_pwm_device *pwm = pwm_get_chip_data(_pwm);  in tpu_pwm_enable()  local
350 	ret = tpu_pwm_timer_start(pwm);  in tpu_pwm_enable()
358 	if (pwm->duty == 0 || pwm->duty == pwm->period) {  in tpu_pwm_enable()
359 		tpu_pwm_set_pin(pwm, pwm->duty ?  in tpu_pwm_enable()
361 		tpu_pwm_timer_stop(pwm);  in tpu_pwm_enable()
369 	struct tpu_pwm_device *pwm = pwm_get_chip_data(_pwm);  in tpu_pwm_disable()  local
372 	tpu_pwm_timer_start(pwm);  in tpu_pwm_disable()
373 	tpu_pwm_set_pin(pwm, TPU_PIN_INACTIVE);  in tpu_pwm_disable()
374 	tpu_pwm_timer_stop(pwm);  in tpu_pwm_disable()