Lines Matching refs:ss
92 static void spi_sh_write(struct spi_sh_data *ss, unsigned long data, in spi_sh_write() argument
95 if (ss->width == 8) in spi_sh_write()
96 iowrite8(data, ss->addr + (offset >> 2)); in spi_sh_write()
97 else if (ss->width == 32) in spi_sh_write()
98 iowrite32(data, ss->addr + offset); in spi_sh_write()
101 static unsigned long spi_sh_read(struct spi_sh_data *ss, unsigned long offset) in spi_sh_read() argument
103 if (ss->width == 8) in spi_sh_read()
104 return ioread8(ss->addr + (offset >> 2)); in spi_sh_read()
105 else if (ss->width == 32) in spi_sh_read()
106 return ioread32(ss->addr + offset); in spi_sh_read()
111 static void spi_sh_set_bit(struct spi_sh_data *ss, unsigned long val, in spi_sh_set_bit() argument
116 tmp = spi_sh_read(ss, offset); in spi_sh_set_bit()
118 spi_sh_write(ss, tmp, offset); in spi_sh_set_bit()
121 static void spi_sh_clear_bit(struct spi_sh_data *ss, unsigned long val, in spi_sh_clear_bit() argument
126 tmp = spi_sh_read(ss, offset); in spi_sh_clear_bit()
128 spi_sh_write(ss, tmp, offset); in spi_sh_clear_bit()
131 static void clear_fifo(struct spi_sh_data *ss) in clear_fifo() argument
133 spi_sh_set_bit(ss, SPI_SH_RSTF, SPI_SH_CR2); in clear_fifo()
134 spi_sh_clear_bit(ss, SPI_SH_RSTF, SPI_SH_CR2); in clear_fifo()
137 static int spi_sh_wait_receive_buffer(struct spi_sh_data *ss) in spi_sh_wait_receive_buffer() argument
141 while (spi_sh_read(ss, SPI_SH_CR1) & SPI_SH_RBE) { in spi_sh_wait_receive_buffer()
149 static int spi_sh_wait_write_buffer_empty(struct spi_sh_data *ss) in spi_sh_wait_write_buffer_empty() argument
153 while (!(spi_sh_read(ss, SPI_SH_CR1) & SPI_SH_TBE)) { in spi_sh_wait_write_buffer_empty()
161 static int spi_sh_send(struct spi_sh_data *ss, struct spi_message *mesg, in spi_sh_send() argument
171 spi_sh_set_bit(ss, SPI_SH_SSA, SPI_SH_CR1); in spi_sh_send()
177 !(spi_sh_read(ss, SPI_SH_CR4) & in spi_sh_send()
179 !(spi_sh_read(ss, SPI_SH_CR1) & SPI_SH_TBF); in spi_sh_send()
181 spi_sh_write(ss, (unsigned long)data[i], SPI_SH_TBR); in spi_sh_send()
183 if (spi_sh_read(ss, SPI_SH_CR4) & SPI_SH_WPABRT) { in spi_sh_send()
185 spi_sh_set_bit(ss, SPI_SH_WPABRT, SPI_SH_CR4); in spi_sh_send()
196 ss->cr1 &= ~SPI_SH_TBE; in spi_sh_send()
197 spi_sh_set_bit(ss, SPI_SH_TBE, SPI_SH_CR4); in spi_sh_send()
198 ret = wait_event_interruptible_timeout(ss->wait, in spi_sh_send()
199 ss->cr1 & SPI_SH_TBE, in spi_sh_send()
201 if (ret == 0 && !(ss->cr1 & SPI_SH_TBE)) { in spi_sh_send()
209 spi_sh_clear_bit(ss, SPI_SH_SSD | SPI_SH_SSDB, SPI_SH_CR1); in spi_sh_send()
210 spi_sh_set_bit(ss, SPI_SH_SSA, SPI_SH_CR1); in spi_sh_send()
212 ss->cr1 &= ~SPI_SH_TBE; in spi_sh_send()
213 spi_sh_set_bit(ss, SPI_SH_TBE, SPI_SH_CR4); in spi_sh_send()
214 ret = wait_event_interruptible_timeout(ss->wait, in spi_sh_send()
215 ss->cr1 & SPI_SH_TBE, in spi_sh_send()
217 if (ret == 0 && (ss->cr1 & SPI_SH_TBE)) { in spi_sh_send()
226 static int spi_sh_receive(struct spi_sh_data *ss, struct spi_message *mesg, in spi_sh_receive() argument
236 spi_sh_write(ss, SPI_SH_MAX_BYTE, SPI_SH_CR3); in spi_sh_receive()
238 spi_sh_write(ss, t->len, SPI_SH_CR3); in spi_sh_receive()
240 spi_sh_clear_bit(ss, SPI_SH_SSD | SPI_SH_SSDB, SPI_SH_CR1); in spi_sh_receive()
241 spi_sh_set_bit(ss, SPI_SH_SSA, SPI_SH_CR1); in spi_sh_receive()
243 spi_sh_wait_write_buffer_empty(ss); in spi_sh_receive()
248 ss->cr1 &= ~SPI_SH_RBF; in spi_sh_receive()
249 spi_sh_set_bit(ss, SPI_SH_RBF, SPI_SH_CR4); in spi_sh_receive()
250 ret = wait_event_interruptible_timeout(ss->wait, in spi_sh_receive()
251 ss->cr1 & SPI_SH_RBF, in spi_sh_receive()
254 spi_sh_read(ss, SPI_SH_CR1) & SPI_SH_RBE) { in spi_sh_receive()
262 if (spi_sh_wait_receive_buffer(ss)) in spi_sh_receive()
264 data[i] = (unsigned char)spi_sh_read(ss, SPI_SH_RBR); in spi_sh_receive()
273 clear_fifo(ss); in spi_sh_receive()
274 spi_sh_write(ss, 1, SPI_SH_CR3); in spi_sh_receive()
276 spi_sh_write(ss, 0, SPI_SH_CR3); in spi_sh_receive()
284 struct spi_sh_data *ss = container_of(work, struct spi_sh_data, ws); in spi_sh_work() local
292 spin_lock_irqsave(&ss->lock, flags); in spi_sh_work()
293 while (!list_empty(&ss->queue)) { in spi_sh_work()
294 mesg = list_entry(ss->queue.next, struct spi_message, queue); in spi_sh_work()
297 spin_unlock_irqrestore(&ss->lock, flags); in spi_sh_work()
305 ret = spi_sh_send(ss, mesg, t); in spi_sh_work()
310 ret = spi_sh_receive(ss, mesg, t); in spi_sh_work()
316 spin_lock_irqsave(&ss->lock, flags); in spi_sh_work()
323 clear_fifo(ss); in spi_sh_work()
324 spi_sh_set_bit(ss, SPI_SH_SSD, SPI_SH_CR1); in spi_sh_work()
327 spi_sh_clear_bit(ss, SPI_SH_SSA | SPI_SH_SSDB | SPI_SH_SSD, in spi_sh_work()
330 clear_fifo(ss); in spi_sh_work()
332 spin_unlock_irqrestore(&ss->lock, flags); in spi_sh_work()
341 spi_sh_clear_bit(ss, SPI_SH_SSA | SPI_SH_SSDB | SPI_SH_SSD, in spi_sh_work()
343 clear_fifo(ss); in spi_sh_work()
349 struct spi_sh_data *ss = spi_master_get_devdata(spi->master); in spi_sh_setup() local
353 spi_sh_write(ss, 0xfe, SPI_SH_CR1); /* SPI sycle stop */ in spi_sh_setup()
354 spi_sh_write(ss, 0x00, SPI_SH_CR1); /* CR1 init */ in spi_sh_setup()
355 spi_sh_write(ss, 0x00, SPI_SH_CR3); /* CR3 init */ in spi_sh_setup()
357 clear_fifo(ss); in spi_sh_setup()
360 spi_sh_write(ss, spi_sh_read(ss, SPI_SH_CR2) | 0x07, SPI_SH_CR2); in spi_sh_setup()
368 struct spi_sh_data *ss = spi_master_get_devdata(spi->master); in spi_sh_transfer() local
374 spin_lock_irqsave(&ss->lock, flags); in spi_sh_transfer()
379 spi_sh_clear_bit(ss, SPI_SH_SSA, SPI_SH_CR1); in spi_sh_transfer()
381 list_add_tail(&mesg->queue, &ss->queue); in spi_sh_transfer()
382 schedule_work(&ss->ws); in spi_sh_transfer()
384 spin_unlock_irqrestore(&ss->lock, flags); in spi_sh_transfer()
391 struct spi_sh_data *ss = spi_master_get_devdata(spi->master); in spi_sh_cleanup() local
395 spi_sh_clear_bit(ss, SPI_SH_SSA | SPI_SH_SSDB | SPI_SH_SSD, in spi_sh_cleanup()
401 struct spi_sh_data *ss = (struct spi_sh_data *)_ss; in spi_sh_irq() local
404 cr1 = spi_sh_read(ss, SPI_SH_CR1); in spi_sh_irq()
406 ss->cr1 |= SPI_SH_TBE; in spi_sh_irq()
408 ss->cr1 |= SPI_SH_TBF; in spi_sh_irq()
410 ss->cr1 |= SPI_SH_RBE; in spi_sh_irq()
412 ss->cr1 |= SPI_SH_RBF; in spi_sh_irq()
414 if (ss->cr1) { in spi_sh_irq()
415 spi_sh_clear_bit(ss, ss->cr1, SPI_SH_CR4); in spi_sh_irq()
416 wake_up(&ss->wait); in spi_sh_irq()
424 struct spi_sh_data *ss = platform_get_drvdata(pdev); in spi_sh_remove() local
426 spi_unregister_master(ss->master); in spi_sh_remove()
427 flush_work(&ss->ws); in spi_sh_remove()
428 free_irq(ss->irq, ss); in spi_sh_remove()
437 struct spi_sh_data *ss; in spi_sh_probe() local
459 ss = spi_master_get_devdata(master); in spi_sh_probe()
460 platform_set_drvdata(pdev, ss); in spi_sh_probe()
464 ss->width = 8; in spi_sh_probe()
467 ss->width = 32; in spi_sh_probe()
474 ss->irq = irq; in spi_sh_probe()
475 ss->master = master; in spi_sh_probe()
476 ss->addr = devm_ioremap(&pdev->dev, res->start, resource_size(res)); in spi_sh_probe()
477 if (ss->addr == NULL) { in spi_sh_probe()
482 INIT_LIST_HEAD(&ss->queue); in spi_sh_probe()
483 spin_lock_init(&ss->lock); in spi_sh_probe()
484 INIT_WORK(&ss->ws, spi_sh_work); in spi_sh_probe()
485 init_waitqueue_head(&ss->wait); in spi_sh_probe()
487 ret = request_irq(irq, spi_sh_irq, 0, "spi_sh", ss); in spi_sh_probe()
508 free_irq(irq, ss); in spi_sh_probe()