1102 		if (!index && hsotg->ep0_state == DWC2_EP0_DATA_OUT &&  in dwc2_hsotg_start_req()
1144 	dev_dbg(hsotg->dev, "ep0 state:%d\n", hsotg->ep0_state);  in dwc2_hsotg_start_req()
1147 	if (!(index == 0 && hsotg->ep0_state == DWC2_EP0_SETUP))  in dwc2_hsotg_start_req()
1308 	switch (hsotg->ep0_state) {  in dwc2_gadget_set_ep0_desc_chain()
1325 			hsotg->ep0_state);  in dwc2_gadget_set_ep0_desc_chain()
1829 		hsotg->ep0_state = DWC2_EP0_STATUS_IN;  in dwc2_hsotg_process_control()
1832 		hsotg->ep0_state = DWC2_EP0_DATA_IN;  in dwc2_hsotg_process_control()
1835 		hsotg->ep0_state = DWC2_EP0_DATA_OUT;  in dwc2_hsotg_process_control()
1937 	hsotg->ep0_state = DWC2_EP0_SETUP;  in dwc2_hsotg_enqueue_setup()
2236 	hsotg->ep0_state = dir_in ? DWC2_EP0_STATUS_IN : DWC2_EP0_STATUS_OUT;  in dwc2_hsotg_ep0_zlp()
2308 	if (epnum == 0 && hsotg->ep0_state == DWC2_EP0_STATUS_OUT) {  in dwc2_hsotg_handle_outdone()
2354 	    hsotg->ep0_state == DWC2_EP0_DATA_OUT) {  in dwc2_hsotg_handle_outdone()
2429 		if (hsotg->ep0_state == DWC2_EP0_SETUP)  in dwc2_hsotg_handle_rx()
2443 		WARN_ON(hsotg->ep0_state != DWC2_EP0_SETUP);  in dwc2_hsotg_handle_rx()
2624 	if (hs_ep->index == 0 && hsotg->ep0_state == DWC2_EP0_STATUS_IN) {  in dwc2_hsotg_complete_in()
2692 	if (hs_ep->index == 0 && hsotg->ep0_state == DWC2_EP0_DATA_IN) {  in dwc2_hsotg_complete_in()
2951 	    hsotg->ep0_state == DWC2_EP0_SETUP && !(ints & DXEPINT_SETUP))  in dwc2_hsotg_epint()