Lines Matching defs:ehci_hcd
124 struct ehci_hcd { /* one per controller */ struct
126 enum ehci_hrtimer_event next_hrtimer_event;
127 unsigned enabled_hrtimer_events;
128 ktime_t hr_timeouts[EHCI_HRTIMER_NUM_EVENTS];
129 struct hrtimer hrtimer;
131 int PSS_poll_count;
132 int ASS_poll_count;
133 int died_poll_count;
136 struct ehci_caps __iomem *caps;
137 struct ehci_regs __iomem *regs;
138 struct ehci_dbg_port __iomem *debug;
140 __u32 hcs_params; /* cached register copy */
141 spinlock_t lock;
142 enum ehci_rh_state rh_state;
145 bool scanning:1;
146 bool need_rescan:1;
147 bool intr_unlinking:1;
148 bool iaa_in_progress:1;
149 bool async_unlinking:1;
150 bool shutdown:1;
151 struct ehci_qh *qh_scan_next;
154 struct ehci_qh *async;
155 struct ehci_qh *dummy; /* For AMD quirk use */
156 struct list_head async_unlink;
157 struct list_head async_idle;
158 unsigned async_unlink_cycle;
159 unsigned async_count; /* async activity count */
160 __hc32 old_current; /* Test for QH becoming */
161 __hc32 old_token; /* inactive during unlink */
165 unsigned periodic_size;
166 __hc32 *periodic; /* hw periodic table */
167 dma_addr_t periodic_dma;
168 struct list_head intr_qh_list;
169 unsigned i_thresh; /* uframes HC might cache */
171 union ehci_shadow *pshadow; /* mirror hw periodic table */
172 struct list_head intr_unlink_wait;
173 struct list_head intr_unlink;
174 unsigned intr_unlink_wait_cycle;
175 unsigned intr_unlink_cycle;
176 unsigned now_frame; /* frame from HC hardware */
177 unsigned last_iso_frame; /* last frame scanned for iso */
178 unsigned intr_count; /* intr activity count */
179 unsigned isoc_count; /* isoc activity count */
180 unsigned periodic_count; /* periodic activity count */
181 unsigned uframe_periodic_max; /* max periodic time per uframe */
185 struct list_head cached_itd_list;
186 struct ehci_itd *last_itd_to_free;
187 struct list_head cached_sitd_list;
188 struct ehci_sitd *last_sitd_to_free;
191 unsigned long reset_done[EHCI_MAX_ROOT_PORTS];
194 unsigned long bus_suspended; /* which ports were
196 unsigned long companion_ports; /* which ports are
198 unsigned long owned_ports; /* which ports are
200 unsigned long port_c_suspend; /* which ports have
202 unsigned long suspended_ports; /* which ports are
204 unsigned long resuming_ports; /* which ports have
208 struct dma_pool *qh_pool; /* qh per active urb */
209 struct dma_pool *qtd_pool; /* one or more per qh */
210 struct dma_pool *itd_pool; /* itd per iso urb */
211 struct dma_pool *sitd_pool; /* sitd per split iso urb */
213 unsigned random_frame;
214 unsigned long next_statechange;
215 ktime_t last_periodic_enable;
216 u32 command;
219 unsigned no_selective_suspend:1;
220 unsigned has_fsl_port_bug:1; /* FreeScale */
221 unsigned has_fsl_hs_errata:1; /* Freescale HS quirk */
222 unsigned has_fsl_susp_errata:1; /* NXP SUSP quirk */
223 unsigned big_endian_mmio:1;
224 unsigned big_endian_desc:1;
225 unsigned big_endian_capbase:1;
226 unsigned has_amcc_usb23:1;
227 unsigned need_io_watchdog:1;
228 unsigned amd_pll_fix:1;
229 unsigned use_dummy_qh:1; /* AMD Frame List table quirk*/
230 unsigned has_synopsys_hc_bug:1; /* Synopsys HC */
231 unsigned frame_index_bug:1; /* MosChip (AKA NetMos) */
232 unsigned need_oc_pp_cycle:1; /* MPC834X port power */
233 unsigned imx28_write_fix:1; /* For Freescale i.MX28 */
242 __hc32 *ohci_hcctrl_reg;
243 unsigned has_hostpc:1;
244 unsigned has_tdi_phy_lpm:1;
245 unsigned has_ppcd:1; /* support per-port change bits */
246 u8 sbrn; /* packed release number */
250 struct ehci_stats stats;
275 static inline struct ehci_hcd *hcd_to_ehci(struct usb_hcd *hcd) in hcd_to_ehci() argument