Lines Matching refs:maxpacket
1135 { .hw_ep_num = 1, .style = FIFO_TX, .maxpacket = 512, },
1136 { .hw_ep_num = 1, .style = FIFO_RX, .maxpacket = 512, },
1137 { .hw_ep_num = 2, .style = FIFO_RXTX, .maxpacket = 512, },
1138 { .hw_ep_num = 3, .style = FIFO_RXTX, .maxpacket = 256, },
1139 { .hw_ep_num = 4, .style = FIFO_RXTX, .maxpacket = 256, },
1144 { .hw_ep_num = 1, .style = FIFO_TX, .maxpacket = 512, .mode = BUF_DOUBLE, },
1145 { .hw_ep_num = 1, .style = FIFO_RX, .maxpacket = 512, .mode = BUF_DOUBLE, },
1146 { .hw_ep_num = 2, .style = FIFO_RXTX, .maxpacket = 512, .mode = BUF_DOUBLE, },
1147 { .hw_ep_num = 3, .style = FIFO_RXTX, .maxpacket = 256, },
1148 { .hw_ep_num = 4, .style = FIFO_RXTX, .maxpacket = 256, },
1153 { .hw_ep_num = 1, .style = FIFO_TX, .maxpacket = 512, },
1154 { .hw_ep_num = 1, .style = FIFO_RX, .maxpacket = 512, },
1155 { .hw_ep_num = 2, .style = FIFO_TX, .maxpacket = 512, },
1156 { .hw_ep_num = 2, .style = FIFO_RX, .maxpacket = 512, },
1157 { .hw_ep_num = 3, .style = FIFO_RXTX, .maxpacket = 960, },
1158 { .hw_ep_num = 4, .style = FIFO_RXTX, .maxpacket = 1024, },
1163 { .hw_ep_num = 1, .style = FIFO_TX, .maxpacket = 512, .mode = BUF_DOUBLE, },
1164 { .hw_ep_num = 1, .style = FIFO_RX, .maxpacket = 512, .mode = BUF_DOUBLE, },
1165 { .hw_ep_num = 2, .style = FIFO_TX, .maxpacket = 512, },
1166 { .hw_ep_num = 2, .style = FIFO_RX, .maxpacket = 512, },
1167 { .hw_ep_num = 3, .style = FIFO_RXTX, .maxpacket = 256, },
1168 { .hw_ep_num = 4, .style = FIFO_RXTX, .maxpacket = 256, },
1173 { .hw_ep_num = 1, .style = FIFO_TX, .maxpacket = 512, },
1174 { .hw_ep_num = 1, .style = FIFO_RX, .maxpacket = 512, },
1175 { .hw_ep_num = 2, .style = FIFO_TX, .maxpacket = 512, },
1176 { .hw_ep_num = 2, .style = FIFO_RX, .maxpacket = 512, },
1177 { .hw_ep_num = 3, .style = FIFO_TX, .maxpacket = 512, },
1178 { .hw_ep_num = 3, .style = FIFO_RX, .maxpacket = 512, },
1179 { .hw_ep_num = 4, .style = FIFO_TX, .maxpacket = 512, },
1180 { .hw_ep_num = 4, .style = FIFO_RX, .maxpacket = 512, },
1181 { .hw_ep_num = 5, .style = FIFO_TX, .maxpacket = 512, },
1182 { .hw_ep_num = 5, .style = FIFO_RX, .maxpacket = 512, },
1183 { .hw_ep_num = 6, .style = FIFO_TX, .maxpacket = 512, },
1184 { .hw_ep_num = 6, .style = FIFO_RX, .maxpacket = 512, },
1185 { .hw_ep_num = 7, .style = FIFO_TX, .maxpacket = 512, },
1186 { .hw_ep_num = 7, .style = FIFO_RX, .maxpacket = 512, },
1187 { .hw_ep_num = 8, .style = FIFO_TX, .maxpacket = 512, },
1188 { .hw_ep_num = 8, .style = FIFO_RX, .maxpacket = 512, },
1189 { .hw_ep_num = 9, .style = FIFO_TX, .maxpacket = 512, },
1190 { .hw_ep_num = 9, .style = FIFO_RX, .maxpacket = 512, },
1191 { .hw_ep_num = 10, .style = FIFO_TX, .maxpacket = 256, },
1192 { .hw_ep_num = 10, .style = FIFO_RX, .maxpacket = 64, },
1193 { .hw_ep_num = 11, .style = FIFO_TX, .maxpacket = 256, },
1194 { .hw_ep_num = 11, .style = FIFO_RX, .maxpacket = 64, },
1195 { .hw_ep_num = 12, .style = FIFO_TX, .maxpacket = 256, },
1196 { .hw_ep_num = 12, .style = FIFO_RX, .maxpacket = 64, },
1197 { .hw_ep_num = 13, .style = FIFO_RXTX, .maxpacket = 4096, },
1198 { .hw_ep_num = 14, .style = FIFO_RXTX, .maxpacket = 1024, },
1199 { .hw_ep_num = 15, .style = FIFO_RXTX, .maxpacket = 1024, },
1204 { .hw_ep_num = 1, .style = FIFO_TX, .maxpacket = 512, },
1205 { .hw_ep_num = 1, .style = FIFO_RX, .maxpacket = 512, },
1206 { .hw_ep_num = 2, .style = FIFO_TX, .maxpacket = 512, },
1207 { .hw_ep_num = 2, .style = FIFO_RX, .maxpacket = 512, },
1208 { .hw_ep_num = 3, .style = FIFO_TX, .maxpacket = 512, },
1209 { .hw_ep_num = 3, .style = FIFO_RX, .maxpacket = 512, },
1210 { .hw_ep_num = 4, .style = FIFO_TX, .maxpacket = 512, },
1211 { .hw_ep_num = 4, .style = FIFO_RX, .maxpacket = 512, },
1212 { .hw_ep_num = 5, .style = FIFO_TX, .maxpacket = 512, },
1213 { .hw_ep_num = 5, .style = FIFO_RX, .maxpacket = 512, },
1214 { .hw_ep_num = 6, .style = FIFO_TX, .maxpacket = 32, },
1215 { .hw_ep_num = 6, .style = FIFO_RX, .maxpacket = 32, },
1216 { .hw_ep_num = 7, .style = FIFO_TX, .maxpacket = 32, },
1217 { .hw_ep_num = 7, .style = FIFO_RX, .maxpacket = 32, },
1218 { .hw_ep_num = 8, .style = FIFO_TX, .maxpacket = 32, },
1219 { .hw_ep_num = 8, .style = FIFO_RX, .maxpacket = 32, },
1220 { .hw_ep_num = 9, .style = FIFO_TX, .maxpacket = 32, },
1221 { .hw_ep_num = 9, .style = FIFO_RX, .maxpacket = 32, },
1222 { .hw_ep_num = 10, .style = FIFO_TX, .maxpacket = 32, },
1223 { .hw_ep_num = 10, .style = FIFO_RX, .maxpacket = 32, },
1224 { .hw_ep_num = 11, .style = FIFO_TX, .maxpacket = 32, },
1225 { .hw_ep_num = 11, .style = FIFO_RX, .maxpacket = 32, },
1226 { .hw_ep_num = 12, .style = FIFO_TX, .maxpacket = 32, },
1227 { .hw_ep_num = 12, .style = FIFO_RX, .maxpacket = 32, },
1228 { .hw_ep_num = 13, .style = FIFO_RXTX, .maxpacket = 512, },
1229 { .hw_ep_num = 14, .style = FIFO_RXTX, .maxpacket = 1024, },
1230 { .hw_ep_num = 15, .style = FIFO_RXTX, .maxpacket = 1024, },
1245 u16 maxpacket = cfg->maxpacket; in fifo_setup() local
1251 size = ffs(max(maxpacket, (u16) 8)) - 1; in fifo_setup()
1252 maxpacket = 1 << size; in fifo_setup()
1256 if ((offset + (maxpacket << 1)) > in fifo_setup()
1261 if ((offset + maxpacket) > (1 << (musb->config->ram_bits + 2))) in fifo_setup()
1279 hw_ep->max_packet_sz_tx = maxpacket; in fifo_setup()
1285 hw_ep->max_packet_sz_rx = maxpacket; in fifo_setup()
1291 hw_ep->max_packet_sz_rx = maxpacket; in fifo_setup()
1296 hw_ep->max_packet_sz_tx = maxpacket; in fifo_setup()
1307 return offset + (maxpacket << ((c_size & MUSB_FIFOSZ_DPB) ? 1 : 0)); in fifo_setup()
1311 .style = FIFO_RXTX, .maxpacket = 64,