597 	u32 cycle, u32 dwidth)  in ca91cx42_master_set()  argument
669 	switch (dwidth) {  in ca91cx42_master_set()
754 	u32 *aspace, u32 *cycle, u32 *dwidth)  in __ca91cx42_master_get()  argument
776 	*dwidth = 0;  in __ca91cx42_master_get()
823 		*dwidth = VME_D8;  in __ca91cx42_master_get()
826 		*dwidth = VME_D16;  in __ca91cx42_master_get()
829 		*dwidth = VME_D32;  in __ca91cx42_master_get()
832 		*dwidth = VME_D64;  in __ca91cx42_master_get()
841 	u32 *cycle, u32 *dwidth)  in ca91cx42_master_get()  argument
848 		cycle, dwidth);  in ca91cx42_master_get()
1098 	switch (vme_attr->dwidth) {  in ca91cx42_dma_list_add()