Lines Matching defs:smc_link

49 struct smc_link {  struct
50 	struct smc_ib_device	*smcibdev;	/* ib-device */
51 	u8			ibport;		/* port - values 1 | 2 */
52 	struct ib_pd		*roce_pd;	/* IB protection domain,
55 	struct ib_qp		*roce_qp;	/* IB queue pair */
56 	struct ib_qp_attr	qp_attr;	/* IB queue pair attributes */
58 	struct smc_wr_buf	*wr_tx_bufs;	/* WR send payload buffers */
59 	struct ib_send_wr	*wr_tx_ibs;	/* WR send meta data */
60 	struct ib_sge		*wr_tx_sges;	/* WR send gather meta data */
61 	struct smc_wr_tx_pend	*wr_tx_pends;	/* WR send waiting for CQE */
63 	dma_addr_t		wr_tx_dma_addr;	/* DMA address of wr_tx_bufs */
64 	atomic_long_t		wr_tx_id;	/* seq # of last sent WR */
65 	unsigned long		*wr_tx_mask;	/* bit mask of used indexes */
66 	u32			wr_tx_cnt;	/* number of WR send buffers */
67 	wait_queue_head_t	wr_tx_wait;	/* wait for free WR send buf */
69 	struct smc_wr_buf	*wr_rx_bufs;	/* WR recv payload buffers */
70 	struct ib_recv_wr	*wr_rx_ibs;	/* WR recv meta data */
71 	struct ib_sge		*wr_rx_sges;	/* WR recv scatter meta data */
73 	dma_addr_t		wr_rx_dma_addr;	/* DMA address of wr_rx_bufs */
74 	u64			wr_rx_id;	/* seq # of last recv WR */
75 	u32			wr_rx_cnt;	/* number of WR recv buffers */
77 	struct ib_reg_wr	wr_reg;		/* WR register memory region */
78 	wait_queue_head_t	wr_reg_wait;	/* wait for wr_reg result */
79 	enum smc_wr_reg_state	wr_reg_state;	/* state of wr_reg request */
81 	union ib_gid		gid;		/* gid matching used vlan id */
82 	u32			peer_qpn;	/* QP number of peer */
83 	enum ib_mtu		path_mtu;	/* used mtu */
84 	enum ib_mtu		peer_mtu;	/* mtu size of peer */
85 	u32			psn_initial;	/* QP tx initial packet seqno */
86 	u32			peer_psn;	/* QP rx initial packet seqno */
87 	u8			peer_mac[ETH_ALEN];	/* = gid[8:10||13:15] */
88 	u8			peer_gid[sizeof(union ib_gid)];	/* gid of peer*/
89 	u8			link_id;	/* unique # within link group */
90 	struct completion	llc_confirm;	/* wait for rx of conf link */
91 	struct completion	llc_confirm_resp; /* wait 4 rx of cnf lnk rsp */