Lines Matching refs:ice
123 static int phase22_init(struct snd_ice1712 *ice) in phase22_init() argument
129 switch (ice->eeprom.subvendor) { in phase22_init()
132 ice->num_total_dacs = 2; in phase22_init()
133 ice->num_total_adcs = 2; in phase22_init()
134 ice->vt1720 = 1; /* Envy24HT-S have 16 bit wide GPIO */ in phase22_init()
142 ice->akm = kzalloc(sizeof(struct snd_akm4xxx), GFP_KERNEL); in phase22_init()
143 ak = ice->akm; in phase22_init()
146 ice->akm_codecs = 1; in phase22_init()
147 switch (ice->eeprom.subvendor) { in phase22_init()
151 &akm_phase22_priv, ice); in phase22_init()
160 static int phase22_add_controls(struct snd_ice1712 *ice) in phase22_add_controls() argument
164 switch (ice->eeprom.subvendor) { in phase22_add_controls()
167 err = snd_ice1712_akm4xxx_build_controls(ice); in phase22_add_controls()
211 static void phase28_spi_write(struct snd_ice1712 *ice, unsigned int cs, in phase28_spi_write() argument
217 tmp = snd_ice1712_gpio_read(ice); in phase28_spi_write()
219 snd_ice1712_gpio_set_mask(ice, ~(PHASE28_WM_RW|PHASE28_SPI_MOSI| in phase28_spi_write()
223 snd_ice1712_gpio_write(ice, tmp); in phase28_spi_write()
228 snd_ice1712_gpio_write(ice, tmp); in phase28_spi_write()
234 snd_ice1712_gpio_write(ice, tmp); in phase28_spi_write()
237 snd_ice1712_gpio_write(ice, tmp); in phase28_spi_write()
243 snd_ice1712_gpio_write(ice, tmp); in phase28_spi_write()
246 snd_ice1712_gpio_write(ice, tmp); in phase28_spi_write()
253 static unsigned short wm_get(struct snd_ice1712 *ice, int reg) in wm_get() argument
256 return ((unsigned short)ice->akm[0].images[reg] << 8) | in wm_get()
257 ice->akm[0].images[reg + 1]; in wm_get()
263 static void wm_put_nocache(struct snd_ice1712 *ice, int reg, unsigned short val) in wm_put_nocache() argument
265 phase28_spi_write(ice, PHASE28_WM_CS, (reg << 9) | (val & 0x1ff), 16); in wm_put_nocache()
271 static void wm_put(struct snd_ice1712 *ice, int reg, unsigned short val) in wm_put() argument
273 wm_put_nocache(ice, reg, val); in wm_put()
275 ice->akm[0].images[reg] = val >> 8; in wm_put()
276 ice->akm[0].images[reg + 1] = val; in wm_put()
279 static void wm_set_vol(struct snd_ice1712 *ice, unsigned int index, in wm_set_vol() argument
290 wm_put(ice, index, nvol); in wm_set_vol()
291 wm_put_nocache(ice, index, 0x180 | nvol); in wm_set_vol()
302 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); in wm_pcm_mute_get() local
304 mutex_lock(&ice->gpio_mutex); in wm_pcm_mute_get()
305 ucontrol->value.integer.value[0] = (wm_get(ice, WM_MUTE) & 0x10) ? in wm_pcm_mute_get()
307 mutex_unlock(&ice->gpio_mutex); in wm_pcm_mute_get()
314 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); in wm_pcm_mute_put() local
318 snd_ice1712_save_gpio_status(ice); in wm_pcm_mute_put()
319 oval = wm_get(ice, WM_MUTE); in wm_pcm_mute_put()
323 wm_put(ice, WM_MUTE, nval); in wm_pcm_mute_put()
324 snd_ice1712_restore_gpio_status(ice); in wm_pcm_mute_put()
345 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); in wm_master_vol_get() local
346 struct phase28_spec *spec = ice->spec; in wm_master_vol_get()
357 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); in wm_master_vol_put() local
358 struct phase28_spec *spec = ice->spec; in wm_master_vol_put()
361 snd_ice1712_save_gpio_status(ice); in wm_master_vol_put()
370 for (dac = 0; dac < ice->num_total_dacs; dac += 2) in wm_master_vol_put()
371 wm_set_vol(ice, WM_DAC_ATTEN + dac + ch, in wm_master_vol_put()
377 snd_ice1712_restore_gpio_status(ice); in wm_master_vol_put()
381 static int phase28_init(struct snd_ice1712 *ice) in phase28_init() argument
426 ice->num_total_dacs = 8; in phase28_init()
427 ice->num_total_adcs = 2; in phase28_init()
432 ice->spec = spec; in phase28_init()
435 ice->akm = kzalloc(sizeof(struct snd_akm4xxx), GFP_KERNEL); in phase28_init()
436 ak = ice->akm; in phase28_init()
439 ice->akm_codecs = 1; in phase28_init()
441 snd_ice1712_gpio_set_dir(ice, 0x5fffff); /* fix this for time being */ in phase28_init()
444 snd_ice1712_save_gpio_status(ice); in phase28_init()
445 snd_ice1712_gpio_set_mask(ice, ~(PHASE28_WM_RESET|PHASE28_WM_CS| in phase28_init()
448 tmp = snd_ice1712_gpio_read(ice); in phase28_init()
450 snd_ice1712_gpio_write(ice, tmp); in phase28_init()
453 snd_ice1712_gpio_write(ice, tmp); in phase28_init()
456 snd_ice1712_gpio_write(ice, tmp); in phase28_init()
461 wm_put(ice, p[0], p[1]); in phase28_init()
463 snd_ice1712_restore_gpio_status(ice); in phase28_init()
467 for (i = 0; i < ice->num_total_dacs; i++) { in phase28_init()
469 wm_set_vol(ice, i, spec->vol[i], spec->master[i % 2]); in phase28_init()
492 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); in wm_vol_get() local
493 struct phase28_spec *spec = ice->spec; in wm_vol_get()
507 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); in wm_vol_put() local
508 struct phase28_spec *spec = ice->spec; in wm_vol_put()
514 snd_ice1712_save_gpio_status(ice); in wm_vol_put()
524 wm_set_vol(ice, idx, spec->vol[ofs+i], in wm_vol_put()
529 snd_ice1712_restore_gpio_status(ice); in wm_vol_put()
548 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); in wm_mute_get() local
549 struct phase28_spec *spec = ice->spec; in wm_mute_get()
564 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); in wm_mute_put() local
565 struct phase28_spec *spec = ice->spec; in wm_mute_put()
571 snd_ice1712_save_gpio_status(ice); in wm_mute_put()
579 wm_set_vol(ice, ofs + i, spec->vol[ofs + i], in wm_mute_put()
584 snd_ice1712_restore_gpio_status(ice); in wm_mute_put()
597 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); in wm_master_mute_get() local
598 struct phase28_spec *spec = ice->spec; in wm_master_mute_get()
610 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); in wm_master_mute_put() local
611 struct phase28_spec *spec = ice->spec; in wm_master_mute_put()
614 snd_ice1712_save_gpio_status(ice); in wm_master_mute_put()
623 for (dac = 0; dac < ice->num_total_dacs; dac += 2) in wm_master_mute_put()
624 wm_set_vol(ice, WM_DAC_ATTEN + dac + i, in wm_master_mute_put()
630 snd_ice1712_restore_gpio_status(ice); in wm_master_mute_put()
652 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); in wm_pcm_vol_get() local
655 mutex_lock(&ice->gpio_mutex); in wm_pcm_vol_get()
656 val = wm_get(ice, WM_DAC_DIG_MASTER_ATTEN) & 0xff; in wm_pcm_vol_get()
659 mutex_unlock(&ice->gpio_mutex); in wm_pcm_vol_get()
666 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); in wm_pcm_vol_put() local
673 snd_ice1712_save_gpio_status(ice); in wm_pcm_vol_put()
675 ovol = wm_get(ice, WM_DAC_DIG_MASTER_ATTEN) & 0xff; in wm_pcm_vol_put()
677 wm_put(ice, WM_DAC_DIG_MASTER_ATTEN, nvol); /* prelatch */ in wm_pcm_vol_put()
679 wm_put_nocache(ice, WM_DAC_DIG_MASTER_ATTEN, nvol | 0x100); in wm_pcm_vol_put()
682 snd_ice1712_restore_gpio_status(ice); in wm_pcm_vol_put()
694 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); in phase28_deemp_get() local
695 ucontrol->value.integer.value[0] = (wm_get(ice, WM_DAC_CTRL2) & 0xf) == in phase28_deemp_get()
703 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); in phase28_deemp_put() local
705 temp = wm_get(ice, WM_DAC_CTRL2); in phase28_deemp_put()
712 wm_put(ice, WM_DAC_CTRL2, temp); in phase28_deemp_put()
732 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); in phase28_oversampling_get() local
733 ucontrol->value.enumerated.item[0] = (wm_get(ice, WM_MASTER) & 0x8) == in phase28_oversampling_get()
742 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); in phase28_oversampling_put() local
744 temp = wm_get(ice, WM_MASTER); in phase28_oversampling_put()
753 wm_put(ice, WM_MASTER, temp); in phase28_oversampling_put()
911 static int phase28_add_controls(struct snd_ice1712 *ice) in phase28_add_controls() argument
918 err = snd_ctl_add(ice->card, in phase28_add_controls()
920 ice)); in phase28_add_controls()
926 err = snd_ctl_add(ice->card, in phase28_add_controls()
927 snd_ctl_new1(&wm_controls[i], ice)); in phase28_add_controls()