1# SPDX-License-Identifier: GPL-2.0 2config FRV 3 bool 4 default y 5 select HAVE_IDE 6 select HAVE_ARCH_TRACEHOOK 7 select HAVE_PERF_EVENTS 8 select HAVE_UID16 9 select VIRT_TO_BUS 10 select GENERIC_IRQ_SHOW 11 select HAVE_DEBUG_BUGVERBOSE 12 select ARCH_HAVE_NMI_SAFE_CMPXCHG 13 select GENERIC_CPU_DEVICES 14 select ARCH_HAS_DEVMEM_IS_ALLOWED 15 select ARCH_WANT_IPC_PARSE_VERSION 16 select OLD_SIGSUSPEND3 17 select OLD_SIGACTION 18 select HAVE_DEBUG_STACKOVERFLOW 19 select ARCH_NO_COHERENT_DMA_MMAP 20 21config CPU_BIG_ENDIAN 22 def_bool y 23 24config ZONE_DMA 25 bool 26 default y 27 28config RWSEM_GENERIC_SPINLOCK 29 bool 30 default y 31 32config RWSEM_XCHGADD_ALGORITHM 33 bool 34 35config GENERIC_HWEIGHT 36 bool 37 default y 38 39config GENERIC_CALIBRATE_DELAY 40 bool 41 default n 42 43config TIME_LOW_RES 44 bool 45 default y 46 47config QUICKLIST 48 bool 49 default y 50 51config ARCH_HAS_ILOG2_U32 52 bool 53 default y 54 55config ARCH_HAS_ILOG2_U64 56 bool 57 default y 58 59config HZ 60 int 61 default 1000 62 63source "init/Kconfig" 64 65source "kernel/Kconfig.freezer" 66 67 68menu "Fujitsu FR-V system setup" 69 70config MMU 71 bool "MMU support" 72 help 73 This options switches on and off support for the FR-V MMU 74 (effectively switching between vmlinux and uClinux). Not all FR-V 75 CPUs support this. Currently only the FR451 has a sufficiently 76 featured MMU. 77 78config FRV_OUTOFLINE_ATOMIC_OPS 79 bool "Out-of-line the FRV atomic operations" 80 default n 81 help 82 Setting this option causes the FR-V atomic operations to be mostly 83 implemented out-of-line. 84 85 See Documentation/frv/atomic-ops.txt for more information. 86 87config HIGHMEM 88 bool "High memory support" 89 depends on MMU 90 default y 91 help 92 If you wish to use more than 256MB of memory with your MMU based 93 system, you will need to select this option. The kernel can only see 94 the memory between 0xC0000000 and 0xD0000000 directly... everything 95 else must be kmapped. 96 97 The arch is, however, capable of supporting up to 3GB of SDRAM. 98 99config HIGHPTE 100 bool "Allocate page tables in highmem" 101 depends on HIGHMEM 102 default y 103 help 104 The VM uses one page of memory for each page table. For systems 105 with a lot of RAM, this can be wasteful of precious low memory. 106 Setting this option will put user-space page tables in high memory. 107 108source "mm/Kconfig" 109 110choice 111 prompt "uClinux kernel load address" 112 depends on !MMU 113 default UCPAGE_OFFSET_C0000000 114 help 115 This option sets the base address for the uClinux kernel. The kernel 116 will rearrange the SDRAM layout to start at this address, and move 117 itself to start there. It must be greater than 0, and it must be 118 sufficiently less than 0xE0000000 that the SDRAM does not intersect 119 the I/O region. 120 121 The base address must also be aligned such that the SDRAM controller 122 can decode it. For instance, a 512MB SDRAM bank must be 512MB aligned. 123 124config UCPAGE_OFFSET_20000000 125 bool "0x20000000" 126 127config UCPAGE_OFFSET_40000000 128 bool "0x40000000" 129 130config UCPAGE_OFFSET_60000000 131 bool "0x60000000" 132 133config UCPAGE_OFFSET_80000000 134 bool "0x80000000" 135 136config UCPAGE_OFFSET_A0000000 137 bool "0xA0000000" 138 139config UCPAGE_OFFSET_C0000000 140 bool "0xC0000000 (Recommended)" 141 142endchoice 143 144config PAGE_OFFSET 145 hex 146 default 0x20000000 if UCPAGE_OFFSET_20000000 147 default 0x40000000 if UCPAGE_OFFSET_40000000 148 default 0x60000000 if UCPAGE_OFFSET_60000000 149 default 0x80000000 if UCPAGE_OFFSET_80000000 150 default 0xA0000000 if UCPAGE_OFFSET_A0000000 151 default 0xC0000000 152 153config PROTECT_KERNEL 154 bool "Protect core kernel against userspace" 155 depends on !MMU 156 default y 157 help 158 Selecting this option causes the uClinux kernel to change the 159 permittivity of DAMPR register covering the core kernel image to 160 prevent userspace accessing the underlying memory directly. 161 162choice 163 prompt "CPU Caching mode" 164 default FRV_DEFL_CACHE_WBACK 165 help 166 This option determines the default caching mode for the kernel. 167 168 Write-Back caching mode involves the all reads and writes causing 169 the affected cacheline to be read into the cache first before being 170 operated upon. Memory is not then updated by a write until the cache 171 is filled and a cacheline needs to be displaced from the cache to 172 make room. Only at that point is it written back. 173 174 Write-Behind caching is similar to Write-Back caching, except that a 175 write won't fetch a cacheline into the cache if there isn't already 176 one there; it will write directly to memory instead. 177 178 Write-Through caching only fetches cachelines from memory on a 179 read. Writes always get written directly to memory. If the affected 180 cacheline is also in cache, it will be updated too. 181 182 The final option is to turn of caching entirely. 183 184 Note that not all CPUs support Write-Behind caching. If the CPU on 185 which the kernel is running doesn't, it'll fall back to Write-Back 186 caching. 187 188config FRV_DEFL_CACHE_WBACK 189 bool "Write-Back" 190 191config FRV_DEFL_CACHE_WBEHIND 192 bool "Write-Behind" 193 194config FRV_DEFL_CACHE_WTHRU 195 bool "Write-Through" 196 197config FRV_DEFL_CACHE_DISABLED 198 bool "Disabled" 199 200endchoice 201 202menu "CPU core support" 203 204config CPU_FR401 205 bool "Include FR401 core support" 206 depends on !MMU 207 default y 208 help 209 This enables support for the FR401, FR401A and FR403 CPUs 210 211config CPU_FR405 212 bool "Include FR405 core support" 213 depends on !MMU 214 default y 215 help 216 This enables support for the FR405 CPU 217 218config CPU_FR451 219 bool "Include FR451 core support" 220 default y 221 help 222 This enables support for the FR451 CPU 223 224config CPU_FR451_COMPILE 225 bool "Specifically compile for FR451 core" 226 depends on CPU_FR451 && !CPU_FR401 && !CPU_FR405 && !CPU_FR551 227 default y 228 help 229 This causes appropriate flags to be passed to the compiler to 230 optimise for the FR451 CPU 231 232config CPU_FR551 233 bool "Include FR551 core support" 234 depends on !MMU 235 default y 236 help 237 This enables support for the FR555 CPU 238 239config CPU_FR551_COMPILE 240 bool "Specifically compile for FR551 core" 241 depends on CPU_FR551 && !CPU_FR401 && !CPU_FR405 && !CPU_FR451 242 default y 243 help 244 This causes appropriate flags to be passed to the compiler to 245 optimise for the FR555 CPU 246 247config FRV_L1_CACHE_SHIFT 248 int 249 default "5" if CPU_FR401 || CPU_FR405 || CPU_FR451 250 default "6" if CPU_FR551 251 252endmenu 253 254choice 255 prompt "System support" 256 default MB93091_VDK 257 258config MB93091_VDK 259 bool "MB93091 CPU board with or without motherboard" 260 261config MB93093_PDK 262 bool "MB93093 PDK unit" 263 264endchoice 265 266if MB93091_VDK 267choice 268 prompt "Motherboard support" 269 default MB93090_MB00 270 271config MB93090_MB00 272 bool "Use the MB93090-MB00 motherboard" 273 help 274 Select this option if the MB93091 CPU board is going to be used with 275 a MB93090-MB00 VDK motherboard 276 277config MB93091_NO_MB 278 bool "Use standalone" 279 help 280 Select this option if the MB93091 CPU board is going to be used 281 without a motherboard 282 283endchoice 284endif 285 286config FUJITSU_MB93493 287 bool "MB93493 Multimedia chip" 288 help 289 Select this option if the MB93493 multimedia chip is going to be 290 used. 291 292choice 293 prompt "GP-Relative data support" 294 default GPREL_DATA_8 295 help 296 This option controls what data, if any, should be placed in the GP 297 relative data sections. Using this means that the compiler can 298 generate accesses to the data using GR16-relative addressing which 299 is faster than absolute instructions and saves space (2 instructions 300 per access). 301 302 However, the GPREL region is limited in size because the immediate 303 value used in the load and store instructions is limited to a 12-bit 304 signed number. 305 306 So if the linker starts complaining that accesses to GPREL data are 307 out of range, try changing this option from the default. 308 309 Note that modules will always be compiled with this feature disabled 310 as the module data will not be in range of the GP base address. 311 312config GPREL_DATA_8 313 bool "Put data objects of up to 8 bytes into GP-REL" 314 315config GPREL_DATA_4 316 bool "Put data objects of up to 4 bytes into GP-REL" 317 318config GPREL_DATA_NONE 319 bool "Don't use GP-REL" 320 321endchoice 322 323config FRV_ONCPU_SERIAL 324 bool "Use on-CPU serial ports" 325 select SERIAL_8250 326 default y 327 328config PCI 329 bool "Use PCI" 330 depends on MB93090_MB00 331 default y 332 select GENERIC_PCI_IOMAP 333 help 334 Some FR-V systems (such as the MB93090-MB00 VDK) have PCI 335 onboard. If you have one of these boards and you wish to use the PCI 336 facilities, say Y here. 337 338config RESERVE_DMA_COHERENT 339 bool "Reserve DMA coherent memory" 340 depends on PCI && !MMU 341 default y 342 help 343 Many PCI drivers require access to uncached memory for DMA device 344 communications (such as is done with some Ethernet buffer rings). If 345 a fully featured MMU is available, this can be done through page 346 table settings, but if not, a region has to be set aside and marked 347 with a special DAMPR register. 348 349 Setting this option causes uClinux to set aside a portion of the 350 available memory for use in this manner. The memory will then be 351 unavailable for normal kernel use. 352 353source "drivers/pci/Kconfig" 354 355source "drivers/pcmcia/Kconfig" 356 357menu "Power management options" 358 359config ARCH_SUSPEND_POSSIBLE 360 def_bool y 361 362source kernel/power/Kconfig 363endmenu 364 365endmenu 366 367 368menu "Executable formats" 369 370source "fs/Kconfig.binfmt" 371 372endmenu 373 374source "net/Kconfig" 375 376source "drivers/Kconfig" 377 378source "fs/Kconfig" 379 380source "arch/frv/Kconfig.debug" 381 382source "security/Kconfig" 383 384source "crypto/Kconfig" 385 386source "lib/Kconfig" 387