1 /* SPDX-License-Identifier: GPL-2.0 */ 2 #ifndef _SPARC64_PAGE_H 3 #define _SPARC64_PAGE_H 4 5 #include <linux/const.h> 6 7 #define PAGE_SHIFT 13 8 9 #define PAGE_SIZE (_AC(1,UL) << PAGE_SHIFT) 10 #define PAGE_MASK (~(PAGE_SIZE-1)) 11 12 /* Flushing for D-cache alias handling is only needed if 13 * the page size is smaller than 16K. 14 */ 15 #if PAGE_SHIFT < 14 16 #define DCACHE_ALIASING_POSSIBLE 17 #endif 18 19 #define HPAGE_SHIFT 23 20 #define REAL_HPAGE_SHIFT 22 21 #define HPAGE_16GB_SHIFT 34 22 #define HPAGE_2GB_SHIFT 31 23 #define HPAGE_256MB_SHIFT 28 24 #define HPAGE_64K_SHIFT 16 25 #define REAL_HPAGE_SIZE (_AC(1,UL) << REAL_HPAGE_SHIFT) 26 27 #if defined(CONFIG_HUGETLB_PAGE) || defined(CONFIG_TRANSPARENT_HUGEPAGE) 28 #define HPAGE_SIZE (_AC(1,UL) << HPAGE_SHIFT) 29 #define HPAGE_MASK (~(HPAGE_SIZE - 1UL)) 30 #define HUGETLB_PAGE_ORDER (HPAGE_SHIFT - PAGE_SHIFT) 31 #define HAVE_ARCH_HUGETLB_UNMAPPED_AREA 32 #define REAL_HPAGE_PER_HPAGE (_AC(1,UL) << (HPAGE_SHIFT - REAL_HPAGE_SHIFT)) 33 #define HUGE_MAX_HSTATE 5 34 #endif 35 36 #ifndef __ASSEMBLY__ 37 38 #if defined(CONFIG_HUGETLB_PAGE) || defined(CONFIG_TRANSPARENT_HUGEPAGE) 39 struct pt_regs; 40 void hugetlb_setup(struct pt_regs *regs); 41 #endif 42 43 #define WANT_PAGE_VIRTUAL 44 45 void _clear_page(void *page); 46 #define clear_page(X) _clear_page((void *)(X)) 47 struct page; 48 void clear_user_page(void *addr, unsigned long vaddr, struct page *page); 49 #define copy_page(X,Y) memcpy((void *)(X), (void *)(Y), PAGE_SIZE) 50 void copy_user_page(void *to, void *from, unsigned long vaddr, struct page *topage); 51 52 /* Unlike sparc32, sparc64's parameter passing API is more 53 * sane in that structures which as small enough are passed 54 * in registers instead of on the stack. Thus, setting 55 * STRICT_MM_TYPECHECKS does not generate worse code so 56 * let's enable it to get the type checking. 57 */ 58 59 #define STRICT_MM_TYPECHECKS 60 61 #ifdef STRICT_MM_TYPECHECKS 62 /* These are used to make use of C type-checking.. */ 63 typedef struct { unsigned long pte; } pte_t; 64 typedef struct { unsigned long iopte; } iopte_t; 65 typedef struct { unsigned long pmd; } pmd_t; 66 typedef struct { unsigned long pud; } pud_t; 67 typedef struct { unsigned long pgd; } pgd_t; 68 typedef struct { unsigned long pgprot; } pgprot_t; 69 70 #define pte_val(x) ((x).pte) 71 #define iopte_val(x) ((x).iopte) 72 #define pmd_val(x) ((x).pmd) 73 #define pud_val(x) ((x).pud) 74 #define pgd_val(x) ((x).pgd) 75 #define pgprot_val(x) ((x).pgprot) 76 77 #define __pte(x) ((pte_t) { (x) } ) 78 #define __iopte(x) ((iopte_t) { (x) } ) 79 #define __pmd(x) ((pmd_t) { (x) } ) 80 #define __pud(x) ((pud_t) { (x) } ) 81 #define __pgd(x) ((pgd_t) { (x) } ) 82 #define __pgprot(x) ((pgprot_t) { (x) } ) 83 84 #else 85 /* .. while these make it easier on the compiler */ 86 typedef unsigned long pte_t; 87 typedef unsigned long iopte_t; 88 typedef unsigned long pmd_t; 89 typedef unsigned long pud_t; 90 typedef unsigned long pgd_t; 91 typedef unsigned long pgprot_t; 92 93 #define pte_val(x) (x) 94 #define iopte_val(x) (x) 95 #define pmd_val(x) (x) 96 #define pud_val(x) (x) 97 #define pgd_val(x) (x) 98 #define pgprot_val(x) (x) 99 100 #define __pte(x) (x) 101 #define __iopte(x) (x) 102 #define __pmd(x) (x) 103 #define __pud(x) (x) 104 #define __pgd(x) (x) 105 #define __pgprot(x) (x) 106 107 #endif /* (STRICT_MM_TYPECHECKS) */ 108 109 typedef pte_t *pgtable_t; 110 111 extern unsigned long sparc64_va_hole_top; 112 extern unsigned long sparc64_va_hole_bottom; 113 114 /* The next two defines specify the actual exclusion region we 115 * enforce, wherein we use a 4GB red zone on each side of the VA hole. 116 */ 117 #define VA_EXCLUDE_START (sparc64_va_hole_bottom - (1UL << 32UL)) 118 #define VA_EXCLUDE_END (sparc64_va_hole_top + (1UL << 32UL)) 119 120 #define TASK_UNMAPPED_BASE (test_thread_flag(TIF_32BIT) ? \ 121 _AC(0x0000000070000000,UL) : \ 122 VA_EXCLUDE_END) 123 124 #include <asm-generic/memory_model.h> 125 126 extern unsigned long PAGE_OFFSET; 127 128 #endif /* !(__ASSEMBLY__) */ 129 130 /* The maximum number of physical memory address bits we support. The 131 * largest value we can support is whatever "KPGD_SHIFT + KPTE_BITS" 132 * evaluates to. 133 */ 134 #define MAX_PHYS_ADDRESS_BITS 53 135 136 #define ILOG2_4MB 22 137 #define ILOG2_256MB 28 138 139 #ifndef __ASSEMBLY__ 140 141 #define __pa(x) ((unsigned long)(x) - PAGE_OFFSET) 142 #define __va(x) ((void *)((unsigned long) (x) + PAGE_OFFSET)) 143 144 #define pfn_to_kaddr(pfn) __va((pfn) << PAGE_SHIFT) 145 146 #define virt_to_page(kaddr) pfn_to_page(__pa(kaddr)>>PAGE_SHIFT) 147 148 #define virt_addr_valid(kaddr) pfn_valid(__pa(kaddr) >> PAGE_SHIFT) 149 150 #define virt_to_phys __pa 151 #define phys_to_virt __va 152 153 #endif /* !(__ASSEMBLY__) */ 154 155 #define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | VM_EXEC | \ 156 VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC) 157 158 #include <asm-generic/getorder.h> 159 160 #endif /* _SPARC64_PAGE_H */ 161