1 /* 2 * opl3_hw.h - Definitions of the OPL-3 registers 3 * 4 * 5 * Copyright (C) by Hannu Savolainen 1993-1997 6 * 7 * OSS/Free for Linux is distributed under the GNU GENERAL PUBLIC LICENSE (GPL) 8 * Version 2 (June 1991). See the "COPYING" file distributed with this software 9 * for more info. 10 * 11 * 12 * The OPL-3 mode is switched on by writing 0x01, to the offset 5 13 * of the right side. 14 * 15 * Another special register at the right side is at offset 4. It contains 16 * a bit mask defining which voices are used as 4 OP voices. 17 * 18 * The percussive mode is implemented in the left side only. 19 * 20 * With the above exceptions the both sides can be operated independently. 21 * 22 * A 4 OP voice can be created by setting the corresponding 23 * bit at offset 4 of the right side. 24 * 25 * For example setting the rightmost bit (0x01) changes the 26 * first voice on the right side to the 4 OP mode. The fourth 27 * voice is made inaccessible. 28 * 29 * If a voice is set to the 2 OP mode, it works like 2 OP modes 30 * of the original YM3812 (AdLib). In addition the voice can 31 * be connected the left, right or both stereo channels. It can 32 * even be left unconnected. This works with 4 OP voices also. 33 * 34 * The stereo connection bits are located in the FEEDBACK_CONNECTION 35 * register of the voice (0xC0-0xC8). In 4 OP voices these bits are 36 * in the second half of the voice. 37 */ 38 39 /* 40 * Register numbers for the global registers 41 */ 42 43 #define TEST_REGISTER 0x01 44 #define ENABLE_WAVE_SELECT 0x20 45 46 #define TIMER1_REGISTER 0x02 47 #define TIMER2_REGISTER 0x03 48 #define TIMER_CONTROL_REGISTER 0x04 /* Left side */ 49 #define IRQ_RESET 0x80 50 #define TIMER1_MASK 0x40 51 #define TIMER2_MASK 0x20 52 #define TIMER1_START 0x01 53 #define TIMER2_START 0x02 54 55 #define CONNECTION_SELECT_REGISTER 0x04 /* Right side */ 56 #define RIGHT_4OP_0 0x01 57 #define RIGHT_4OP_1 0x02 58 #define RIGHT_4OP_2 0x04 59 #define LEFT_4OP_0 0x08 60 #define LEFT_4OP_1 0x10 61 #define LEFT_4OP_2 0x20 62 63 #define OPL3_MODE_REGISTER 0x05 /* Right side */ 64 #define OPL3_ENABLE 0x01 65 #define OPL4_ENABLE 0x02 66 67 #define KBD_SPLIT_REGISTER 0x08 /* Left side */ 68 #define COMPOSITE_SINE_WAVE_MODE 0x80 /* Don't use with OPL-3? */ 69 #define KEYBOARD_SPLIT 0x40 70 71 #define PERCOSSION_REGISTER 0xbd /* Left side only */ 72 #define TREMOLO_DEPTH 0x80 73 #define VIBRATO_DEPTH 0x40 74 #define PERCOSSION_ENABLE 0x20 75 #define BASSDRUM_ON 0x10 76 #define SNAREDRUM_ON 0x08 77 #define TOMTOM_ON 0x04 78 #define CYMBAL_ON 0x02 79 #define HIHAT_ON 0x01 80 81 /* 82 * Offsets to the register banks for operators. To get the 83 * register number just add the operator offset to the bank offset 84 * 85 * AM/VIB/EG/KSR/Multiple (0x20 to 0x35) 86 */ 87 #define AM_VIB 0x20 88 #define TREMOLO_ON 0x80 89 #define VIBRATO_ON 0x40 90 #define SUSTAIN_ON 0x20 91 #define KSR 0x10 /* Key scaling rate */ 92 #define MULTIPLE_MASK 0x0f /* Frequency multiplier */ 93 94 /* 95 * KSL/Total level (0x40 to 0x55) 96 */ 97 #define KSL_LEVEL 0x40 98 #define KSL_MASK 0xc0 /* Envelope scaling bits */ 99 #define TOTAL_LEVEL_MASK 0x3f /* Strength (volume) of OP */ 100 101 /* 102 * Attack / Decay rate (0x60 to 0x75) 103 */ 104 #define ATTACK_DECAY 0x60 105 #define ATTACK_MASK 0xf0 106 #define DECAY_MASK 0x0f 107 108 /* 109 * Sustain level / Release rate (0x80 to 0x95) 110 */ 111 #define SUSTAIN_RELEASE 0x80 112 #define SUSTAIN_MASK 0xf0 113 #define RELEASE_MASK 0x0f 114 115 /* 116 * Wave select (0xE0 to 0xF5) 117 */ 118 #define WAVE_SELECT 0xe0 119 120 /* 121 * Offsets to the register banks for voices. Just add to the 122 * voice number to get the register number. 123 * 124 * F-Number low bits (0xA0 to 0xA8). 125 */ 126 #define FNUM_LOW 0xa0 127 128 /* 129 * F-number high bits / Key on / Block (octave) (0xB0 to 0xB8) 130 */ 131 #define KEYON_BLOCK 0xb0 132 #define KEYON_BIT 0x20 133 #define BLOCKNUM_MASK 0x1c 134 #define FNUM_HIGH_MASK 0x03 135 136 /* 137 * Feedback / Connection (0xc0 to 0xc8) 138 * 139 * These registers have two new bits when the OPL-3 mode 140 * is selected. These bits controls connecting the voice 141 * to the stereo channels. For 4 OP voices this bit is 142 * defined in the second half of the voice (add 3 to the 143 * register offset). 144 * 145 * For 4 OP voices the connection bit is used in the 146 * both halves (gives 4 ways to connect the operators). 147 */ 148 #define FEEDBACK_CONNECTION 0xc0 149 #define FEEDBACK_MASK 0x0e /* Valid just for 1st OP of a voice */ 150 #define CONNECTION_BIT 0x01 151 /* 152 * In the 4 OP mode there is four possible configurations how the 153 * operators can be connected together (in 2 OP modes there is just 154 * AM or FM). The 4 OP connection mode is defined by the rightmost 155 * bit of the FEEDBACK_CONNECTION (0xC0-0xC8) on the both halves. 156 * 157 * First half Second half Mode 158 * 159 * +---+ 160 * v | 161 * 0 0 >+-1-+--2--3--4--> 162 * 163 * 164 * 165 * +---+ 166 * | | 167 * 0 1 >+-1-+--2-+ 168 * |-> 169 * >--3----4-+ 170 * 171 * +---+ 172 * | | 173 * 1 0 >+-1-+-----+ 174 * |-> 175 * >--2--3--4-+ 176 * 177 * +---+ 178 * | | 179 * 1 1 >+-1-+--+ 180 * | 181 * >--2--3-+-> 182 * | 183 * >--4----+ 184 */ 185 #define STEREO_BITS 0x30 /* OPL-3 only */ 186 #define VOICE_TO_LEFT 0x10 187 #define VOICE_TO_RIGHT 0x20 188 189 /* 190 * Definition table for the physical voices 191 */ 192 193 struct physical_voice_info { 194 unsigned char voice_num; 195 unsigned char voice_mode; /* 0=unavailable, 2=2 OP, 4=4 OP */ 196 unsigned short ioaddr; /* I/O port (left or right side) */ 197 unsigned char op[4]; /* Operator offsets */ 198 }; 199 200 /* 201 * There is 18 possible 2 OP voices 202 * (9 in the left and 9 in the right). 203 * The first OP is the modulator and 2nd is the carrier. 204 * 205 * The first three voices in the both sides may be connected 206 * with another voice to a 4 OP voice. For example voice 0 207 * can be connected with voice 3. The operators of voice 3 are 208 * used as operators 3 and 4 of the new 4 OP voice. 209 * In this case the 2 OP voice number 0 is the 'first half' and 210 * voice 3 is the second. 211 */ 212 213 #define USE_LEFT 0 214 #define USE_RIGHT 1 215 216 static struct physical_voice_info pv_map[18] = 217 { 218 /* No Mode Side OP1 OP2 OP3 OP4 */ 219 /* --------------------------------------------------- */ 220 { 0, 2, USE_LEFT, {0x00, 0x03, 0x08, 0x0b}}, 221 { 1, 2, USE_LEFT, {0x01, 0x04, 0x09, 0x0c}}, 222 { 2, 2, USE_LEFT, {0x02, 0x05, 0x0a, 0x0d}}, 223 224 { 3, 2, USE_LEFT, {0x08, 0x0b, 0x00, 0x00}}, 225 { 4, 2, USE_LEFT, {0x09, 0x0c, 0x00, 0x00}}, 226 { 5, 2, USE_LEFT, {0x0a, 0x0d, 0x00, 0x00}}, 227 228 { 6, 2, USE_LEFT, {0x10, 0x13, 0x00, 0x00}}, /* Used by percussive voices */ 229 { 7, 2, USE_LEFT, {0x11, 0x14, 0x00, 0x00}}, /* if the percussive mode */ 230 { 8, 2, USE_LEFT, {0x12, 0x15, 0x00, 0x00}}, /* is selected */ 231 232 { 0, 2, USE_RIGHT, {0x00, 0x03, 0x08, 0x0b}}, 233 { 1, 2, USE_RIGHT, {0x01, 0x04, 0x09, 0x0c}}, 234 { 2, 2, USE_RIGHT, {0x02, 0x05, 0x0a, 0x0d}}, 235 236 { 3, 2, USE_RIGHT, {0x08, 0x0b, 0x00, 0x00}}, 237 { 4, 2, USE_RIGHT, {0x09, 0x0c, 0x00, 0x00}}, 238 { 5, 2, USE_RIGHT, {0x0a, 0x0d, 0x00, 0x00}}, 239 240 { 6, 2, USE_RIGHT, {0x10, 0x13, 0x00, 0x00}}, 241 { 7, 2, USE_RIGHT, {0x11, 0x14, 0x00, 0x00}}, 242 { 8, 2, USE_RIGHT, {0x12, 0x15, 0x00, 0x00}} 243 }; 244 /* 245 * DMA buffer calls 246 */ 247