1 /*
2 * Kernel-based Virtual Machine driver for Linux
3 *
4 * This header defines architecture specific interfaces, x86 version
5 *
6 * This work is licensed under the terms of the GNU GPL, version 2. See
7 * the COPYING file in the top-level directory.
8 *
9 */
10
11 #ifndef _ASM_X86_KVM_HOST_H
12 #define _ASM_X86_KVM_HOST_H
13
14 #include <linux/types.h>
15 #include <linux/mm.h>
16 #include <linux/mmu_notifier.h>
17 #include <linux/tracepoint.h>
18 #include <linux/cpumask.h>
19 #include <linux/irq_work.h>
20 #include <linux/irq.h>
21
22 #include <linux/kvm.h>
23 #include <linux/kvm_para.h>
24 #include <linux/kvm_types.h>
25 #include <linux/perf_event.h>
26 #include <linux/pvclock_gtod.h>
27 #include <linux/clocksource.h>
28 #include <linux/irqbypass.h>
29 #include <linux/hyperv.h>
30
31 #include <asm/apic.h>
32 #include <asm/pvclock-abi.h>
33 #include <asm/desc.h>
34 #include <asm/mtrr.h>
35 #include <asm/msr-index.h>
36 #include <asm/asm.h>
37 #include <asm/kvm_page_track.h>
38
39 #define KVM_MAX_VCPUS 288
40 #define KVM_SOFT_MAX_VCPUS 240
41 #define KVM_MAX_VCPU_ID 1023
42 #define KVM_USER_MEM_SLOTS 509
43 /* memory slots that are not exposed to userspace */
44 #define KVM_PRIVATE_MEM_SLOTS 3
45 #define KVM_MEM_SLOTS_NUM (KVM_USER_MEM_SLOTS + KVM_PRIVATE_MEM_SLOTS)
46
47 #define KVM_HALT_POLL_NS_DEFAULT 200000
48
49 #define KVM_IRQCHIP_NUM_PINS KVM_IOAPIC_NUM_PINS
50
51 /* x86-specific vcpu->requests bit members */
52 #define KVM_REQ_MIGRATE_TIMER KVM_ARCH_REQ(0)
53 #define KVM_REQ_REPORT_TPR_ACCESS KVM_ARCH_REQ(1)
54 #define KVM_REQ_TRIPLE_FAULT KVM_ARCH_REQ(2)
55 #define KVM_REQ_MMU_SYNC KVM_ARCH_REQ(3)
56 #define KVM_REQ_CLOCK_UPDATE KVM_ARCH_REQ(4)
57 #define KVM_REQ_EVENT KVM_ARCH_REQ(6)
58 #define KVM_REQ_APF_HALT KVM_ARCH_REQ(7)
59 #define KVM_REQ_STEAL_UPDATE KVM_ARCH_REQ(8)
60 #define KVM_REQ_NMI KVM_ARCH_REQ(9)
61 #define KVM_REQ_PMU KVM_ARCH_REQ(10)
62 #define KVM_REQ_PMI KVM_ARCH_REQ(11)
63 #define KVM_REQ_SMI KVM_ARCH_REQ(12)
64 #define KVM_REQ_MASTERCLOCK_UPDATE KVM_ARCH_REQ(13)
65 #define KVM_REQ_MCLOCK_INPROGRESS \
66 KVM_ARCH_REQ_FLAGS(14, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
67 #define KVM_REQ_SCAN_IOAPIC \
68 KVM_ARCH_REQ_FLAGS(15, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
69 #define KVM_REQ_GLOBAL_CLOCK_UPDATE KVM_ARCH_REQ(16)
70 #define KVM_REQ_APIC_PAGE_RELOAD \
71 KVM_ARCH_REQ_FLAGS(17, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
72 #define KVM_REQ_HV_CRASH KVM_ARCH_REQ(18)
73 #define KVM_REQ_IOAPIC_EOI_EXIT KVM_ARCH_REQ(19)
74 #define KVM_REQ_HV_RESET KVM_ARCH_REQ(20)
75 #define KVM_REQ_HV_EXIT KVM_ARCH_REQ(21)
76 #define KVM_REQ_HV_STIMER KVM_ARCH_REQ(22)
77
78 #define CR0_RESERVED_BITS \
79 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
80 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
81 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
82
83 #define CR3_PCID_INVD BIT_64(63)
84 #define CR4_RESERVED_BITS \
85 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
86 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
87 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR | X86_CR4_PCIDE \
88 | X86_CR4_OSXSAVE | X86_CR4_SMEP | X86_CR4_FSGSBASE \
89 | X86_CR4_OSXMMEXCPT | X86_CR4_LA57 | X86_CR4_VMXE \
90 | X86_CR4_SMAP | X86_CR4_PKE))
91
92 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
93
94
95
96 #define INVALID_PAGE (~(hpa_t)0)
97 #define VALID_PAGE(x) ((x) != INVALID_PAGE)
98
99 #define UNMAPPED_GVA (~(gpa_t)0)
100
101 /* KVM Hugepage definitions for x86 */
102 #define KVM_NR_PAGE_SIZES 3
103 #define KVM_HPAGE_GFN_SHIFT(x) (((x) - 1) * 9)
104 #define KVM_HPAGE_SHIFT(x) (PAGE_SHIFT + KVM_HPAGE_GFN_SHIFT(x))
105 #define KVM_HPAGE_SIZE(x) (1UL << KVM_HPAGE_SHIFT(x))
106 #define KVM_HPAGE_MASK(x) (~(KVM_HPAGE_SIZE(x) - 1))
107 #define KVM_PAGES_PER_HPAGE(x) (KVM_HPAGE_SIZE(x) / PAGE_SIZE)
108
gfn_to_index(gfn_t gfn,gfn_t base_gfn,int level)109 static inline gfn_t gfn_to_index(gfn_t gfn, gfn_t base_gfn, int level)
110 {
111 /* KVM_HPAGE_GFN_SHIFT(PT_PAGE_TABLE_LEVEL) must be 0. */
112 return (gfn >> KVM_HPAGE_GFN_SHIFT(level)) -
113 (base_gfn >> KVM_HPAGE_GFN_SHIFT(level));
114 }
115
116 #define KVM_PERMILLE_MMU_PAGES 20
117 #define KVM_MIN_ALLOC_MMU_PAGES 64
118 #define KVM_MMU_HASH_SHIFT 12
119 #define KVM_NUM_MMU_PAGES (1 << KVM_MMU_HASH_SHIFT)
120 #define KVM_MIN_FREE_MMU_PAGES 5
121 #define KVM_REFILL_PAGES 25
122 #define KVM_MAX_CPUID_ENTRIES 80
123 #define KVM_NR_FIXED_MTRR_REGION 88
124 #define KVM_NR_VAR_MTRR 8
125
126 #define ASYNC_PF_PER_VCPU 64
127
128 enum kvm_reg {
129 VCPU_REGS_RAX = 0,
130 VCPU_REGS_RCX = 1,
131 VCPU_REGS_RDX = 2,
132 VCPU_REGS_RBX = 3,
133 VCPU_REGS_RSP = 4,
134 VCPU_REGS_RBP = 5,
135 VCPU_REGS_RSI = 6,
136 VCPU_REGS_RDI = 7,
137 #ifdef CONFIG_X86_64
138 VCPU_REGS_R8 = 8,
139 VCPU_REGS_R9 = 9,
140 VCPU_REGS_R10 = 10,
141 VCPU_REGS_R11 = 11,
142 VCPU_REGS_R12 = 12,
143 VCPU_REGS_R13 = 13,
144 VCPU_REGS_R14 = 14,
145 VCPU_REGS_R15 = 15,
146 #endif
147 VCPU_REGS_RIP,
148 NR_VCPU_REGS
149 };
150
151 enum kvm_reg_ex {
152 VCPU_EXREG_PDPTR = NR_VCPU_REGS,
153 VCPU_EXREG_CR3,
154 VCPU_EXREG_RFLAGS,
155 VCPU_EXREG_SEGMENTS,
156 };
157
158 enum {
159 VCPU_SREG_ES,
160 VCPU_SREG_CS,
161 VCPU_SREG_SS,
162 VCPU_SREG_DS,
163 VCPU_SREG_FS,
164 VCPU_SREG_GS,
165 VCPU_SREG_TR,
166 VCPU_SREG_LDTR,
167 };
168
169 #include <asm/kvm_emulate.h>
170
171 #define KVM_NR_MEM_OBJS 40
172
173 #define KVM_NR_DB_REGS 4
174
175 #define DR6_BD (1 << 13)
176 #define DR6_BS (1 << 14)
177 #define DR6_BT (1 << 15)
178 #define DR6_RTM (1 << 16)
179 #define DR6_FIXED_1 0xfffe0ff0
180 #define DR6_INIT 0xffff0ff0
181 #define DR6_VOLATILE 0x0001e00f
182
183 #define DR7_BP_EN_MASK 0x000000ff
184 #define DR7_GE (1 << 9)
185 #define DR7_GD (1 << 13)
186 #define DR7_FIXED_1 0x00000400
187 #define DR7_VOLATILE 0xffff2bff
188
189 #define PFERR_PRESENT_BIT 0
190 #define PFERR_WRITE_BIT 1
191 #define PFERR_USER_BIT 2
192 #define PFERR_RSVD_BIT 3
193 #define PFERR_FETCH_BIT 4
194 #define PFERR_PK_BIT 5
195 #define PFERR_GUEST_FINAL_BIT 32
196 #define PFERR_GUEST_PAGE_BIT 33
197
198 #define PFERR_PRESENT_MASK (1U << PFERR_PRESENT_BIT)
199 #define PFERR_WRITE_MASK (1U << PFERR_WRITE_BIT)
200 #define PFERR_USER_MASK (1U << PFERR_USER_BIT)
201 #define PFERR_RSVD_MASK (1U << PFERR_RSVD_BIT)
202 #define PFERR_FETCH_MASK (1U << PFERR_FETCH_BIT)
203 #define PFERR_PK_MASK (1U << PFERR_PK_BIT)
204 #define PFERR_GUEST_FINAL_MASK (1ULL << PFERR_GUEST_FINAL_BIT)
205 #define PFERR_GUEST_PAGE_MASK (1ULL << PFERR_GUEST_PAGE_BIT)
206
207 #define PFERR_NESTED_GUEST_PAGE (PFERR_GUEST_PAGE_MASK | \
208 PFERR_WRITE_MASK | \
209 PFERR_PRESENT_MASK)
210
211 /*
212 * The mask used to denote special SPTEs, which can be either MMIO SPTEs or
213 * Access Tracking SPTEs. We use bit 62 instead of bit 63 to avoid conflicting
214 * with the SVE bit in EPT PTEs.
215 */
216 #define SPTE_SPECIAL_MASK (1ULL << 62)
217
218 /* apic attention bits */
219 #define KVM_APIC_CHECK_VAPIC 0
220 /*
221 * The following bit is set with PV-EOI, unset on EOI.
222 * We detect PV-EOI changes by guest by comparing
223 * this bit with PV-EOI in guest memory.
224 * See the implementation in apic_update_pv_eoi.
225 */
226 #define KVM_APIC_PV_EOI_PENDING 1
227
228 struct kvm_kernel_irq_routing_entry;
229
230 /*
231 * We don't want allocation failures within the mmu code, so we preallocate
232 * enough memory for a single page fault in a cache.
233 */
234 struct kvm_mmu_memory_cache {
235 int nobjs;
236 void *objects[KVM_NR_MEM_OBJS];
237 };
238
239 /*
240 * the pages used as guest page table on soft mmu are tracked by
241 * kvm_memory_slot.arch.gfn_track which is 16 bits, so the role bits used
242 * by indirect shadow page can not be more than 15 bits.
243 *
244 * Currently, we used 14 bits that are @level, @cr4_pae, @quadrant, @access,
245 * @nxe, @cr0_wp, @smep_andnot_wp and @smap_andnot_wp.
246 */
247 union kvm_mmu_page_role {
248 unsigned word;
249 struct {
250 unsigned level:4;
251 unsigned cr4_pae:1;
252 unsigned quadrant:2;
253 unsigned direct:1;
254 unsigned access:3;
255 unsigned invalid:1;
256 unsigned nxe:1;
257 unsigned cr0_wp:1;
258 unsigned smep_andnot_wp:1;
259 unsigned smap_andnot_wp:1;
260 unsigned ad_disabled:1;
261 unsigned :7;
262
263 /*
264 * This is left at the top of the word so that
265 * kvm_memslots_for_spte_role can extract it with a
266 * simple shift. While there is room, give it a whole
267 * byte so it is also faster to load it from memory.
268 */
269 unsigned smm:8;
270 };
271 };
272
273 struct kvm_rmap_head {
274 unsigned long val;
275 };
276
277 struct kvm_mmu_page {
278 struct list_head link;
279 struct hlist_node hash_link;
280 struct list_head lpage_disallowed_link;
281
282 /*
283 * The following two entries are used to key the shadow page in the
284 * hash table.
285 */
286 gfn_t gfn;
287 union kvm_mmu_page_role role;
288
289 u64 *spt;
290 /* hold the gfn of each spte inside spt */
291 gfn_t *gfns;
292 bool unsync;
293 bool lpage_disallowed; /* Can't be replaced by an equiv large page */
294 int root_count; /* Currently serving as active root */
295 unsigned int unsync_children;
296 struct kvm_rmap_head parent_ptes; /* rmap pointers to parent sptes */
297
298 /* The page is obsolete if mmu_valid_gen != kvm->arch.mmu_valid_gen. */
299 unsigned long mmu_valid_gen;
300
301 DECLARE_BITMAP(unsync_child_bitmap, 512);
302
303 #ifdef CONFIG_X86_32
304 /*
305 * Used out of the mmu-lock to avoid reading spte values while an
306 * update is in progress; see the comments in __get_spte_lockless().
307 */
308 int clear_spte_count;
309 #endif
310
311 /* Number of writes since the last time traversal visited this page. */
312 atomic_t write_flooding_count;
313 };
314
315 struct kvm_pio_request {
316 unsigned long count;
317 int in;
318 int port;
319 int size;
320 };
321
322 #define PT64_ROOT_MAX_LEVEL 5
323
324 struct rsvd_bits_validate {
325 u64 rsvd_bits_mask[2][PT64_ROOT_MAX_LEVEL];
326 u64 bad_mt_xwr;
327 };
328
329 /*
330 * x86 supports 4 paging modes (5-level 64-bit, 4-level 64-bit, 3-level 32-bit,
331 * and 2-level 32-bit). The kvm_mmu structure abstracts the details of the
332 * current mmu mode.
333 */
334 struct kvm_mmu {
335 void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long root);
336 unsigned long (*get_cr3)(struct kvm_vcpu *vcpu);
337 u64 (*get_pdptr)(struct kvm_vcpu *vcpu, int index);
338 int (*page_fault)(struct kvm_vcpu *vcpu, gva_t gva, u32 err,
339 bool prefault);
340 void (*inject_page_fault)(struct kvm_vcpu *vcpu,
341 struct x86_exception *fault);
342 gpa_t (*gva_to_gpa)(struct kvm_vcpu *vcpu, gva_t gva, u32 access,
343 struct x86_exception *exception);
344 gpa_t (*translate_gpa)(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
345 struct x86_exception *exception);
346 int (*sync_page)(struct kvm_vcpu *vcpu,
347 struct kvm_mmu_page *sp);
348 void (*invlpg)(struct kvm_vcpu *vcpu, gva_t gva);
349 void (*update_pte)(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
350 u64 *spte, const void *pte);
351 hpa_t root_hpa;
352 union kvm_mmu_page_role base_role;
353 u8 root_level;
354 u8 shadow_root_level;
355 u8 ept_ad;
356 bool direct_map;
357
358 /*
359 * Bitmap; bit set = permission fault
360 * Byte index: page fault error code [4:1]
361 * Bit index: pte permissions in ACC_* format
362 */
363 u8 permissions[16];
364
365 /*
366 * The pkru_mask indicates if protection key checks are needed. It
367 * consists of 16 domains indexed by page fault error code bits [4:1],
368 * with PFEC.RSVD replaced by ACC_USER_MASK from the page tables.
369 * Each domain has 2 bits which are ANDed with AD and WD from PKRU.
370 */
371 u32 pkru_mask;
372
373 u64 *pae_root;
374 u64 *lm_root;
375
376 /*
377 * check zero bits on shadow page table entries, these
378 * bits include not only hardware reserved bits but also
379 * the bits spte never used.
380 */
381 struct rsvd_bits_validate shadow_zero_check;
382
383 struct rsvd_bits_validate guest_rsvd_check;
384
385 /* Can have large pages at levels 2..last_nonleaf_level-1. */
386 u8 last_nonleaf_level;
387
388 bool nx;
389
390 u64 pdptrs[4]; /* pae */
391 };
392
393 enum pmc_type {
394 KVM_PMC_GP = 0,
395 KVM_PMC_FIXED,
396 };
397
398 struct kvm_pmc {
399 enum pmc_type type;
400 u8 idx;
401 u64 counter;
402 u64 eventsel;
403 struct perf_event *perf_event;
404 struct kvm_vcpu *vcpu;
405 };
406
407 struct kvm_pmu {
408 unsigned nr_arch_gp_counters;
409 unsigned nr_arch_fixed_counters;
410 unsigned available_event_types;
411 u64 fixed_ctr_ctrl;
412 u64 global_ctrl;
413 u64 global_status;
414 u64 global_ovf_ctrl;
415 u64 counter_bitmask[2];
416 u64 global_ctrl_mask;
417 u64 reserved_bits;
418 u8 version;
419 struct kvm_pmc gp_counters[INTEL_PMC_MAX_GENERIC];
420 struct kvm_pmc fixed_counters[INTEL_PMC_MAX_FIXED];
421 struct irq_work irq_work;
422 u64 reprogram_pmi;
423 };
424
425 struct kvm_pmu_ops;
426
427 enum {
428 KVM_DEBUGREG_BP_ENABLED = 1,
429 KVM_DEBUGREG_WONT_EXIT = 2,
430 KVM_DEBUGREG_RELOAD = 4,
431 };
432
433 struct kvm_mtrr_range {
434 u64 base;
435 u64 mask;
436 struct list_head node;
437 };
438
439 struct kvm_mtrr {
440 struct kvm_mtrr_range var_ranges[KVM_NR_VAR_MTRR];
441 mtrr_type fixed_ranges[KVM_NR_FIXED_MTRR_REGION];
442 u64 deftype;
443
444 struct list_head head;
445 };
446
447 /* Hyper-V SynIC timer */
448 struct kvm_vcpu_hv_stimer {
449 struct hrtimer timer;
450 int index;
451 u64 config;
452 u64 count;
453 u64 exp_time;
454 struct hv_message msg;
455 bool msg_pending;
456 };
457
458 /* Hyper-V synthetic interrupt controller (SynIC)*/
459 struct kvm_vcpu_hv_synic {
460 u64 version;
461 u64 control;
462 u64 msg_page;
463 u64 evt_page;
464 atomic64_t sint[HV_SYNIC_SINT_COUNT];
465 atomic_t sint_to_gsi[HV_SYNIC_SINT_COUNT];
466 DECLARE_BITMAP(auto_eoi_bitmap, 256);
467 DECLARE_BITMAP(vec_bitmap, 256);
468 bool active;
469 bool dont_zero_synic_pages;
470 };
471
472 /* Hyper-V per vcpu emulation context */
473 struct kvm_vcpu_hv {
474 u32 vp_index;
475 u64 hv_vapic;
476 s64 runtime_offset;
477 struct kvm_vcpu_hv_synic synic;
478 struct kvm_hyperv_exit exit;
479 struct kvm_vcpu_hv_stimer stimer[HV_SYNIC_STIMER_COUNT];
480 DECLARE_BITMAP(stimer_pending_bitmap, HV_SYNIC_STIMER_COUNT);
481 };
482
483 struct kvm_vcpu_arch {
484 /*
485 * rip and regs accesses must go through
486 * kvm_{register,rip}_{read,write} functions.
487 */
488 unsigned long regs[NR_VCPU_REGS];
489 u32 regs_avail;
490 u32 regs_dirty;
491
492 unsigned long cr0;
493 unsigned long cr0_guest_owned_bits;
494 unsigned long cr2;
495 unsigned long cr3;
496 unsigned long cr4;
497 unsigned long cr4_guest_owned_bits;
498 unsigned long cr8;
499 u32 pkru;
500 u32 hflags;
501 u64 efer;
502 u64 apic_base;
503 struct kvm_lapic *apic; /* kernel irqchip context */
504 bool apicv_active;
505 DECLARE_BITMAP(ioapic_handled_vectors, 256);
506 unsigned long apic_attention;
507 int32_t apic_arb_prio;
508 int mp_state;
509 u64 ia32_misc_enable_msr;
510 u64 smbase;
511 bool tpr_access_reporting;
512 u64 ia32_xss;
513 u64 microcode_version;
514 u64 arch_capabilities;
515
516 /*
517 * Paging state of the vcpu
518 *
519 * If the vcpu runs in guest mode with two level paging this still saves
520 * the paging mode of the l1 guest. This context is always used to
521 * handle faults.
522 */
523 struct kvm_mmu mmu;
524
525 /*
526 * Paging state of an L2 guest (used for nested npt)
527 *
528 * This context will save all necessary information to walk page tables
529 * of the an L2 guest. This context is only initialized for page table
530 * walking and not for faulting since we never handle l2 page faults on
531 * the host.
532 */
533 struct kvm_mmu nested_mmu;
534
535 /*
536 * Pointer to the mmu context currently used for
537 * gva_to_gpa translations.
538 */
539 struct kvm_mmu *walk_mmu;
540
541 struct kvm_mmu_memory_cache mmu_pte_list_desc_cache;
542 struct kvm_mmu_memory_cache mmu_page_cache;
543 struct kvm_mmu_memory_cache mmu_page_header_cache;
544
545 /*
546 * QEMU userspace and the guest each have their own FPU state.
547 * In vcpu_run, we switch between the user and guest FPU contexts.
548 * While running a VCPU, the VCPU thread will have the guest FPU
549 * context.
550 *
551 * Note that while the PKRU state lives inside the fpu registers,
552 * it is switched out separately at VMENTER and VMEXIT time. The
553 * "guest_fpu" state here contains the guest FPU context, with the
554 * host PRKU bits.
555 */
556 struct fpu user_fpu;
557 struct fpu guest_fpu;
558
559 u64 xcr0;
560 u64 guest_supported_xcr0;
561 u32 guest_xstate_size;
562
563 struct kvm_pio_request pio;
564 void *pio_data;
565
566 u8 event_exit_inst_len;
567
568 struct kvm_queued_exception {
569 bool pending;
570 bool injected;
571 bool has_error_code;
572 u8 nr;
573 u32 error_code;
574 u8 nested_apf;
575 } exception;
576
577 struct kvm_queued_interrupt {
578 bool pending;
579 bool soft;
580 u8 nr;
581 } interrupt;
582
583 int halt_request; /* real mode on Intel only */
584
585 int cpuid_nent;
586 struct kvm_cpuid_entry2 cpuid_entries[KVM_MAX_CPUID_ENTRIES];
587
588 int maxphyaddr;
589
590 /* emulate context */
591
592 struct x86_emulate_ctxt emulate_ctxt;
593 bool emulate_regs_need_sync_to_vcpu;
594 bool emulate_regs_need_sync_from_vcpu;
595 int (*complete_userspace_io)(struct kvm_vcpu *vcpu);
596
597 gpa_t time;
598 struct pvclock_vcpu_time_info hv_clock;
599 unsigned int hw_tsc_khz;
600 struct gfn_to_hva_cache pv_time;
601 bool pv_time_enabled;
602 /* set guest stopped flag in pvclock flags field */
603 bool pvclock_set_guest_stopped_request;
604
605 struct {
606 u64 msr_val;
607 u64 last_steal;
608 struct gfn_to_hva_cache stime;
609 struct kvm_steal_time steal;
610 } st;
611
612 u64 tsc_offset;
613 u64 last_guest_tsc;
614 u64 last_host_tsc;
615 u64 tsc_offset_adjustment;
616 u64 this_tsc_nsec;
617 u64 this_tsc_write;
618 u64 this_tsc_generation;
619 bool tsc_catchup;
620 bool tsc_always_catchup;
621 s8 virtual_tsc_shift;
622 u32 virtual_tsc_mult;
623 u32 virtual_tsc_khz;
624 s64 ia32_tsc_adjust_msr;
625 u64 tsc_scaling_ratio;
626
627 atomic_t nmi_queued; /* unprocessed asynchronous NMIs */
628 unsigned nmi_pending; /* NMI queued after currently running handler */
629 bool nmi_injected; /* Trying to inject an NMI this entry */
630 bool smi_pending; /* SMI queued after currently running handler */
631
632 struct kvm_mtrr mtrr_state;
633 u64 pat;
634
635 unsigned switch_db_regs;
636 unsigned long db[KVM_NR_DB_REGS];
637 unsigned long dr6;
638 unsigned long dr7;
639 unsigned long eff_db[KVM_NR_DB_REGS];
640 unsigned long guest_debug_dr7;
641 u64 msr_platform_info;
642 u64 msr_misc_features_enables;
643
644 u64 mcg_cap;
645 u64 mcg_status;
646 u64 mcg_ctl;
647 u64 mcg_ext_ctl;
648 u64 *mce_banks;
649
650 /* Cache MMIO info */
651 u64 mmio_gva;
652 unsigned access;
653 gfn_t mmio_gfn;
654 u64 mmio_gen;
655
656 struct kvm_pmu pmu;
657
658 /* used for guest single stepping over the given code position */
659 unsigned long singlestep_rip;
660
661 struct kvm_vcpu_hv hyperv;
662
663 cpumask_var_t wbinvd_dirty_mask;
664
665 unsigned long last_retry_eip;
666 unsigned long last_retry_addr;
667
668 struct {
669 bool halted;
670 gfn_t gfns[roundup_pow_of_two(ASYNC_PF_PER_VCPU)];
671 struct gfn_to_hva_cache data;
672 u64 msr_val;
673 u32 id;
674 bool send_user_only;
675 u32 host_apf_reason;
676 unsigned long nested_apf_token;
677 bool delivery_as_pf_vmexit;
678 } apf;
679
680 /* OSVW MSRs (AMD only) */
681 struct {
682 u64 length;
683 u64 status;
684 } osvw;
685
686 struct {
687 u64 msr_val;
688 struct gfn_to_hva_cache data;
689 } pv_eoi;
690
691 /*
692 * Indicate whether the access faults on its page table in guest
693 * which is set when fix page fault and used to detect unhandeable
694 * instruction.
695 */
696 bool write_fault_to_shadow_pgtable;
697
698 /* set at EPT violation at this point */
699 unsigned long exit_qualification;
700
701 /* pv related host specific info */
702 struct {
703 bool pv_unhalted;
704 } pv;
705
706 int pending_ioapic_eoi;
707 int pending_external_vector;
708
709 /* GPA available */
710 bool gpa_available;
711 gpa_t gpa_val;
712
713 /* be preempted when it's in kernel-mode(cpl=0) */
714 bool preempted_in_kernel;
715
716 /* Flush the L1 Data cache for L1TF mitigation on VMENTER */
717 bool l1tf_flush_l1d;
718 };
719
720 struct kvm_lpage_info {
721 int disallow_lpage;
722 };
723
724 struct kvm_arch_memory_slot {
725 struct kvm_rmap_head *rmap[KVM_NR_PAGE_SIZES];
726 struct kvm_lpage_info *lpage_info[KVM_NR_PAGE_SIZES - 1];
727 unsigned short *gfn_track[KVM_PAGE_TRACK_MAX];
728 };
729
730 /*
731 * We use as the mode the number of bits allocated in the LDR for the
732 * logical processor ID. It happens that these are all powers of two.
733 * This makes it is very easy to detect cases where the APICs are
734 * configured for multiple modes; in that case, we cannot use the map and
735 * hence cannot use kvm_irq_delivery_to_apic_fast either.
736 */
737 #define KVM_APIC_MODE_XAPIC_CLUSTER 4
738 #define KVM_APIC_MODE_XAPIC_FLAT 8
739 #define KVM_APIC_MODE_X2APIC 16
740
741 struct kvm_apic_map {
742 struct rcu_head rcu;
743 u8 mode;
744 u32 max_apic_id;
745 union {
746 struct kvm_lapic *xapic_flat_map[8];
747 struct kvm_lapic *xapic_cluster_map[16][4];
748 };
749 struct kvm_lapic *phys_map[];
750 };
751
752 /* Hyper-V emulation context */
753 struct kvm_hv {
754 struct mutex hv_lock;
755 u64 hv_guest_os_id;
756 u64 hv_hypercall;
757 u64 hv_tsc_page;
758
759 /* Hyper-v based guest crash (NT kernel bugcheck) parameters */
760 u64 hv_crash_param[HV_X64_MSR_CRASH_PARAMS];
761 u64 hv_crash_ctl;
762
763 HV_REFERENCE_TSC_PAGE tsc_ref;
764 };
765
766 enum kvm_irqchip_mode {
767 KVM_IRQCHIP_NONE,
768 KVM_IRQCHIP_KERNEL, /* created with KVM_CREATE_IRQCHIP */
769 KVM_IRQCHIP_SPLIT, /* created with KVM_CAP_SPLIT_IRQCHIP */
770 };
771
772 struct kvm_arch {
773 unsigned int n_used_mmu_pages;
774 unsigned int n_requested_mmu_pages;
775 unsigned int n_max_mmu_pages;
776 unsigned int indirect_shadow_pages;
777 unsigned long mmu_valid_gen;
778 struct hlist_head mmu_page_hash[KVM_NUM_MMU_PAGES];
779 /*
780 * Hash table of struct kvm_mmu_page.
781 */
782 struct list_head active_mmu_pages;
783 struct list_head zapped_obsolete_pages;
784 struct list_head lpage_disallowed_mmu_pages;
785 struct kvm_page_track_notifier_node mmu_sp_tracker;
786 struct kvm_page_track_notifier_head track_notifier_head;
787
788 struct list_head assigned_dev_head;
789 struct iommu_domain *iommu_domain;
790 bool iommu_noncoherent;
791 #define __KVM_HAVE_ARCH_NONCOHERENT_DMA
792 atomic_t noncoherent_dma_count;
793 #define __KVM_HAVE_ARCH_ASSIGNED_DEVICE
794 atomic_t assigned_device_count;
795 struct kvm_pic *vpic;
796 struct kvm_ioapic *vioapic;
797 struct kvm_pit *vpit;
798 atomic_t vapics_in_nmi_mode;
799 struct mutex apic_map_lock;
800 struct kvm_apic_map *apic_map;
801
802 unsigned int tss_addr;
803 bool apic_access_page_done;
804
805 gpa_t wall_clock;
806
807 bool ept_identity_pagetable_done;
808 gpa_t ept_identity_map_addr;
809
810 unsigned long irq_sources_bitmap;
811 s64 kvmclock_offset;
812 raw_spinlock_t tsc_write_lock;
813 u64 last_tsc_nsec;
814 u64 last_tsc_write;
815 u32 last_tsc_khz;
816 u64 cur_tsc_nsec;
817 u64 cur_tsc_write;
818 u64 cur_tsc_offset;
819 u64 cur_tsc_generation;
820 int nr_vcpus_matched_tsc;
821
822 spinlock_t pvclock_gtod_sync_lock;
823 bool use_master_clock;
824 u64 master_kernel_ns;
825 u64 master_cycle_now;
826 struct delayed_work kvmclock_update_work;
827 struct delayed_work kvmclock_sync_work;
828
829 struct kvm_xen_hvm_config xen_hvm_config;
830
831 /* reads protected by irq_srcu, writes by irq_lock */
832 struct hlist_head mask_notifier_list;
833
834 struct kvm_hv hyperv;
835
836 #ifdef CONFIG_KVM_MMU_AUDIT
837 int audit_point;
838 #endif
839
840 bool backwards_tsc_observed;
841 bool boot_vcpu_runs_old_kvmclock;
842 u32 bsp_vcpu_id;
843
844 u64 disabled_quirks;
845
846 enum kvm_irqchip_mode irqchip_mode;
847 u8 nr_reserved_ioapic_pins;
848
849 bool disabled_lapic_found;
850
851 /* Struct members for AVIC */
852 u32 avic_vm_id;
853 u32 ldr_mode;
854 struct page *avic_logical_id_table_page;
855 struct page *avic_physical_id_table_page;
856 struct hlist_node hnode;
857
858 bool x2apic_format;
859 bool x2apic_broadcast_quirk_disabled;
860
861 struct task_struct *nx_lpage_recovery_thread;
862 };
863
864 struct kvm_vm_stat {
865 ulong mmu_shadow_zapped;
866 ulong mmu_pte_write;
867 ulong mmu_pte_updated;
868 ulong mmu_pde_zapped;
869 ulong mmu_flooded;
870 ulong mmu_recycled;
871 ulong mmu_cache_miss;
872 ulong mmu_unsync;
873 ulong remote_tlb_flush;
874 ulong lpages;
875 ulong nx_lpage_splits;
876 ulong max_mmu_page_hash_collisions;
877 };
878
879 struct kvm_vcpu_stat {
880 u64 pf_fixed;
881 u64 pf_guest;
882 u64 tlb_flush;
883 u64 invlpg;
884
885 u64 exits;
886 u64 io_exits;
887 u64 mmio_exits;
888 u64 signal_exits;
889 u64 irq_window_exits;
890 u64 nmi_window_exits;
891 u64 l1d_flush;
892 u64 halt_exits;
893 u64 halt_successful_poll;
894 u64 halt_attempted_poll;
895 u64 halt_poll_invalid;
896 u64 halt_wakeup;
897 u64 request_irq_exits;
898 u64 irq_exits;
899 u64 host_state_reload;
900 u64 efer_reload;
901 u64 fpu_reload;
902 u64 insn_emulation;
903 u64 insn_emulation_fail;
904 u64 hypercalls;
905 u64 irq_injections;
906 u64 nmi_injections;
907 u64 req_event;
908 };
909
910 struct x86_instruction_info;
911
912 struct msr_data {
913 bool host_initiated;
914 u32 index;
915 u64 data;
916 };
917
918 struct kvm_lapic_irq {
919 u32 vector;
920 u16 delivery_mode;
921 u16 dest_mode;
922 bool level;
923 u16 trig_mode;
924 u32 shorthand;
925 u32 dest_id;
926 bool msi_redir_hint;
927 };
928
929 struct kvm_x86_ops {
930 int (*cpu_has_kvm_support)(void); /* __init */
931 int (*disabled_by_bios)(void); /* __init */
932 int (*hardware_enable)(void);
933 void (*hardware_disable)(void);
934 void (*check_processor_compatibility)(void *rtn);
935 int (*hardware_setup)(void); /* __init */
936 void (*hardware_unsetup)(void); /* __exit */
937 bool (*cpu_has_accelerated_tpr)(void);
938 bool (*has_emulated_msr)(int index);
939 void (*cpuid_update)(struct kvm_vcpu *vcpu);
940
941 int (*vm_init)(struct kvm *kvm);
942 void (*vm_destroy)(struct kvm *kvm);
943
944 /* Create, but do not attach this VCPU */
945 struct kvm_vcpu *(*vcpu_create)(struct kvm *kvm, unsigned id);
946 void (*vcpu_free)(struct kvm_vcpu *vcpu);
947 void (*vcpu_reset)(struct kvm_vcpu *vcpu, bool init_event);
948
949 void (*prepare_guest_switch)(struct kvm_vcpu *vcpu);
950 void (*vcpu_load)(struct kvm_vcpu *vcpu, int cpu);
951 void (*vcpu_put)(struct kvm_vcpu *vcpu);
952
953 void (*update_bp_intercept)(struct kvm_vcpu *vcpu);
954 int (*get_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr);
955 int (*set_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr);
956 u64 (*get_segment_base)(struct kvm_vcpu *vcpu, int seg);
957 void (*get_segment)(struct kvm_vcpu *vcpu,
958 struct kvm_segment *var, int seg);
959 int (*get_cpl)(struct kvm_vcpu *vcpu);
960 void (*set_segment)(struct kvm_vcpu *vcpu,
961 struct kvm_segment *var, int seg);
962 void (*get_cs_db_l_bits)(struct kvm_vcpu *vcpu, int *db, int *l);
963 void (*decache_cr0_guest_bits)(struct kvm_vcpu *vcpu);
964 void (*decache_cr3)(struct kvm_vcpu *vcpu);
965 void (*decache_cr4_guest_bits)(struct kvm_vcpu *vcpu);
966 void (*set_cr0)(struct kvm_vcpu *vcpu, unsigned long cr0);
967 void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3);
968 int (*set_cr4)(struct kvm_vcpu *vcpu, unsigned long cr4);
969 void (*set_efer)(struct kvm_vcpu *vcpu, u64 efer);
970 void (*get_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
971 void (*set_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
972 void (*get_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
973 void (*set_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
974 u64 (*get_dr6)(struct kvm_vcpu *vcpu);
975 void (*set_dr6)(struct kvm_vcpu *vcpu, unsigned long value);
976 void (*sync_dirty_debug_regs)(struct kvm_vcpu *vcpu);
977 void (*set_dr7)(struct kvm_vcpu *vcpu, unsigned long value);
978 void (*cache_reg)(struct kvm_vcpu *vcpu, enum kvm_reg reg);
979 unsigned long (*get_rflags)(struct kvm_vcpu *vcpu);
980 void (*set_rflags)(struct kvm_vcpu *vcpu, unsigned long rflags);
981
982 void (*tlb_flush)(struct kvm_vcpu *vcpu, bool invalidate_gpa);
983
984 void (*run)(struct kvm_vcpu *vcpu);
985 int (*handle_exit)(struct kvm_vcpu *vcpu);
986 void (*skip_emulated_instruction)(struct kvm_vcpu *vcpu);
987 void (*set_interrupt_shadow)(struct kvm_vcpu *vcpu, int mask);
988 u32 (*get_interrupt_shadow)(struct kvm_vcpu *vcpu);
989 void (*patch_hypercall)(struct kvm_vcpu *vcpu,
990 unsigned char *hypercall_addr);
991 void (*set_irq)(struct kvm_vcpu *vcpu);
992 void (*set_nmi)(struct kvm_vcpu *vcpu);
993 void (*queue_exception)(struct kvm_vcpu *vcpu);
994 void (*cancel_injection)(struct kvm_vcpu *vcpu);
995 int (*interrupt_allowed)(struct kvm_vcpu *vcpu);
996 int (*nmi_allowed)(struct kvm_vcpu *vcpu);
997 bool (*get_nmi_mask)(struct kvm_vcpu *vcpu);
998 void (*set_nmi_mask)(struct kvm_vcpu *vcpu, bool masked);
999 void (*enable_nmi_window)(struct kvm_vcpu *vcpu);
1000 void (*enable_irq_window)(struct kvm_vcpu *vcpu);
1001 void (*update_cr8_intercept)(struct kvm_vcpu *vcpu, int tpr, int irr);
1002 bool (*get_enable_apicv)(struct kvm_vcpu *vcpu);
1003 void (*refresh_apicv_exec_ctrl)(struct kvm_vcpu *vcpu);
1004 void (*hwapic_irr_update)(struct kvm_vcpu *vcpu, int max_irr);
1005 void (*hwapic_isr_update)(struct kvm_vcpu *vcpu, int isr);
1006 void (*load_eoi_exitmap)(struct kvm_vcpu *vcpu, u64 *eoi_exit_bitmap);
1007 void (*set_virtual_apic_mode)(struct kvm_vcpu *vcpu);
1008 void (*set_apic_access_page_addr)(struct kvm_vcpu *vcpu, hpa_t hpa);
1009 int (*deliver_posted_interrupt)(struct kvm_vcpu *vcpu, int vector);
1010 int (*sync_pir_to_irr)(struct kvm_vcpu *vcpu);
1011 int (*set_tss_addr)(struct kvm *kvm, unsigned int addr);
1012 int (*get_tdp_level)(struct kvm_vcpu *vcpu);
1013 u64 (*get_mt_mask)(struct kvm_vcpu *vcpu, gfn_t gfn, bool is_mmio);
1014 int (*get_lpage_level)(void);
1015 bool (*rdtscp_supported)(void);
1016 bool (*invpcid_supported)(void);
1017
1018 void (*set_tdp_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3);
1019
1020 void (*set_supported_cpuid)(u32 func, struct kvm_cpuid_entry2 *entry);
1021
1022 bool (*has_wbinvd_exit)(void);
1023
1024 void (*write_tsc_offset)(struct kvm_vcpu *vcpu, u64 offset);
1025
1026 void (*get_exit_info)(struct kvm_vcpu *vcpu, u64 *info1, u64 *info2);
1027
1028 int (*check_intercept)(struct kvm_vcpu *vcpu,
1029 struct x86_instruction_info *info,
1030 enum x86_intercept_stage stage);
1031 void (*handle_external_intr)(struct kvm_vcpu *vcpu);
1032 bool (*mpx_supported)(void);
1033 bool (*xsaves_supported)(void);
1034
1035 int (*check_nested_events)(struct kvm_vcpu *vcpu, bool external_intr);
1036
1037 void (*sched_in)(struct kvm_vcpu *kvm, int cpu);
1038
1039 /*
1040 * Arch-specific dirty logging hooks. These hooks are only supposed to
1041 * be valid if the specific arch has hardware-accelerated dirty logging
1042 * mechanism. Currently only for PML on VMX.
1043 *
1044 * - slot_enable_log_dirty:
1045 * called when enabling log dirty mode for the slot.
1046 * - slot_disable_log_dirty:
1047 * called when disabling log dirty mode for the slot.
1048 * also called when slot is created with log dirty disabled.
1049 * - flush_log_dirty:
1050 * called before reporting dirty_bitmap to userspace.
1051 * - enable_log_dirty_pt_masked:
1052 * called when reenabling log dirty for the GFNs in the mask after
1053 * corresponding bits are cleared in slot->dirty_bitmap.
1054 */
1055 void (*slot_enable_log_dirty)(struct kvm *kvm,
1056 struct kvm_memory_slot *slot);
1057 void (*slot_disable_log_dirty)(struct kvm *kvm,
1058 struct kvm_memory_slot *slot);
1059 void (*flush_log_dirty)(struct kvm *kvm);
1060 void (*enable_log_dirty_pt_masked)(struct kvm *kvm,
1061 struct kvm_memory_slot *slot,
1062 gfn_t offset, unsigned long mask);
1063 int (*write_log_dirty)(struct kvm_vcpu *vcpu);
1064
1065 /* pmu operations of sub-arch */
1066 const struct kvm_pmu_ops *pmu_ops;
1067
1068 /*
1069 * Architecture specific hooks for vCPU blocking due to
1070 * HLT instruction.
1071 * Returns for .pre_block():
1072 * - 0 means continue to block the vCPU.
1073 * - 1 means we cannot block the vCPU since some event
1074 * happens during this period, such as, 'ON' bit in
1075 * posted-interrupts descriptor is set.
1076 */
1077 int (*pre_block)(struct kvm_vcpu *vcpu);
1078 void (*post_block)(struct kvm_vcpu *vcpu);
1079
1080 void (*vcpu_blocking)(struct kvm_vcpu *vcpu);
1081 void (*vcpu_unblocking)(struct kvm_vcpu *vcpu);
1082
1083 int (*update_pi_irte)(struct kvm *kvm, unsigned int host_irq,
1084 uint32_t guest_irq, bool set);
1085 void (*apicv_post_state_restore)(struct kvm_vcpu *vcpu);
1086 bool (*dy_apicv_has_pending_interrupt)(struct kvm_vcpu *vcpu);
1087
1088 int (*set_hv_timer)(struct kvm_vcpu *vcpu, u64 guest_deadline_tsc);
1089 void (*cancel_hv_timer)(struct kvm_vcpu *vcpu);
1090
1091 void (*setup_mce)(struct kvm_vcpu *vcpu);
1092
1093 int (*get_msr_feature)(struct kvm_msr_entry *entry);
1094 };
1095
1096 struct kvm_arch_async_pf {
1097 u32 token;
1098 gfn_t gfn;
1099 unsigned long cr3;
1100 bool direct_map;
1101 };
1102
1103 extern struct kvm_x86_ops *kvm_x86_ops;
1104
1105 int kvm_mmu_module_init(void);
1106 void kvm_mmu_module_exit(void);
1107
1108 void kvm_mmu_destroy(struct kvm_vcpu *vcpu);
1109 int kvm_mmu_create(struct kvm_vcpu *vcpu);
1110 void kvm_mmu_setup(struct kvm_vcpu *vcpu);
1111 void kvm_mmu_init_vm(struct kvm *kvm);
1112 void kvm_mmu_uninit_vm(struct kvm *kvm);
1113 void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
1114 u64 dirty_mask, u64 nx_mask, u64 x_mask, u64 p_mask,
1115 u64 acc_track_mask, u64 me_mask);
1116
1117 void kvm_mmu_reset_context(struct kvm_vcpu *vcpu);
1118 void kvm_mmu_slot_remove_write_access(struct kvm *kvm,
1119 struct kvm_memory_slot *memslot);
1120 void kvm_mmu_zap_collapsible_sptes(struct kvm *kvm,
1121 const struct kvm_memory_slot *memslot);
1122 void kvm_mmu_slot_leaf_clear_dirty(struct kvm *kvm,
1123 struct kvm_memory_slot *memslot);
1124 void kvm_mmu_slot_largepage_remove_write_access(struct kvm *kvm,
1125 struct kvm_memory_slot *memslot);
1126 void kvm_mmu_slot_set_dirty(struct kvm *kvm,
1127 struct kvm_memory_slot *memslot);
1128 void kvm_mmu_clear_dirty_pt_masked(struct kvm *kvm,
1129 struct kvm_memory_slot *slot,
1130 gfn_t gfn_offset, unsigned long mask);
1131 void kvm_mmu_zap_all(struct kvm *kvm);
1132 void kvm_mmu_invalidate_mmio_sptes(struct kvm *kvm, u64 gen);
1133 unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm);
1134 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages);
1135
1136 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3);
1137 bool pdptrs_changed(struct kvm_vcpu *vcpu);
1138
1139 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
1140 const void *val, int bytes);
1141
1142 struct kvm_irq_mask_notifier {
1143 void (*func)(struct kvm_irq_mask_notifier *kimn, bool masked);
1144 int irq;
1145 struct hlist_node link;
1146 };
1147
1148 void kvm_register_irq_mask_notifier(struct kvm *kvm, int irq,
1149 struct kvm_irq_mask_notifier *kimn);
1150 void kvm_unregister_irq_mask_notifier(struct kvm *kvm, int irq,
1151 struct kvm_irq_mask_notifier *kimn);
1152 void kvm_fire_mask_notifiers(struct kvm *kvm, unsigned irqchip, unsigned pin,
1153 bool mask);
1154
1155 extern bool tdp_enabled;
1156
1157 u64 vcpu_tsc_khz(struct kvm_vcpu *vcpu);
1158
1159 /* control of guest tsc rate supported? */
1160 extern bool kvm_has_tsc_control;
1161 /* maximum supported tsc_khz for guests */
1162 extern u32 kvm_max_guest_tsc_khz;
1163 /* number of bits of the fractional part of the TSC scaling ratio */
1164 extern u8 kvm_tsc_scaling_ratio_frac_bits;
1165 /* maximum allowed value of TSC scaling ratio */
1166 extern u64 kvm_max_tsc_scaling_ratio;
1167 /* 1ull << kvm_tsc_scaling_ratio_frac_bits */
1168 extern u64 kvm_default_tsc_scaling_ratio;
1169
1170 extern u64 kvm_mce_cap_supported;
1171
1172 enum emulation_result {
1173 EMULATE_DONE, /* no further processing */
1174 EMULATE_USER_EXIT, /* kvm_run ready for userspace exit */
1175 EMULATE_FAIL, /* can't emulate this instruction */
1176 };
1177
1178 #define EMULTYPE_NO_DECODE (1 << 0)
1179 #define EMULTYPE_TRAP_UD (1 << 1)
1180 #define EMULTYPE_SKIP (1 << 2)
1181 #define EMULTYPE_RETRY (1 << 3)
1182 #define EMULTYPE_NO_REEXECUTE (1 << 4)
1183 int x86_emulate_instruction(struct kvm_vcpu *vcpu, unsigned long cr2,
1184 int emulation_type, void *insn, int insn_len);
1185
emulate_instruction(struct kvm_vcpu * vcpu,int emulation_type)1186 static inline int emulate_instruction(struct kvm_vcpu *vcpu,
1187 int emulation_type)
1188 {
1189 return x86_emulate_instruction(vcpu, 0,
1190 emulation_type | EMULTYPE_NO_REEXECUTE, NULL, 0);
1191 }
1192
1193 void kvm_enable_efer_bits(u64);
1194 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer);
1195 int kvm_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr);
1196 int kvm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr);
1197
1198 struct x86_emulate_ctxt;
1199
1200 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port);
1201 int kvm_fast_pio_in(struct kvm_vcpu *vcpu, int size, unsigned short port);
1202 int kvm_emulate_cpuid(struct kvm_vcpu *vcpu);
1203 int kvm_emulate_halt(struct kvm_vcpu *vcpu);
1204 int kvm_vcpu_halt(struct kvm_vcpu *vcpu);
1205 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu);
1206
1207 void kvm_get_segment(struct kvm_vcpu *vcpu, struct kvm_segment *var, int seg);
1208 int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector, int seg);
1209 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector);
1210
1211 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
1212 int reason, bool has_error_code, u32 error_code);
1213
1214 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0);
1215 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3);
1216 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4);
1217 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8);
1218 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val);
1219 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val);
1220 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu);
1221 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw);
1222 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l);
1223 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr);
1224
1225 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr);
1226 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr);
1227
1228 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu);
1229 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
1230 bool kvm_rdpmc(struct kvm_vcpu *vcpu);
1231
1232 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr);
1233 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code);
1234 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr);
1235 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code);
1236 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault);
1237 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
1238 gfn_t gfn, void *data, int offset, int len,
1239 u32 access);
1240 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl);
1241 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr);
1242
__kvm_irq_line_state(unsigned long * irq_state,int irq_source_id,int level)1243 static inline int __kvm_irq_line_state(unsigned long *irq_state,
1244 int irq_source_id, int level)
1245 {
1246 /* Logical OR for level trig interrupt */
1247 if (level)
1248 __set_bit(irq_source_id, irq_state);
1249 else
1250 __clear_bit(irq_source_id, irq_state);
1251
1252 return !!(*irq_state);
1253 }
1254
1255 int kvm_pic_set_irq(struct kvm_pic *pic, int irq, int irq_source_id, int level);
1256 void kvm_pic_clear_all(struct kvm_pic *pic, int irq_source_id);
1257
1258 void kvm_inject_nmi(struct kvm_vcpu *vcpu);
1259
1260 int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn);
1261 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva);
1262 void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu);
1263 int kvm_mmu_load(struct kvm_vcpu *vcpu);
1264 void kvm_mmu_unload(struct kvm_vcpu *vcpu);
1265 void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu);
1266 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
1267 struct x86_exception *exception);
1268 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
1269 struct x86_exception *exception);
1270 gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
1271 struct x86_exception *exception);
1272 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
1273 struct x86_exception *exception);
1274 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
1275 struct x86_exception *exception);
1276
1277 void kvm_vcpu_deactivate_apicv(struct kvm_vcpu *vcpu);
1278
1279 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu);
1280
1281 int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t gva, u64 error_code,
1282 void *insn, int insn_len);
1283 void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva);
1284 void kvm_mmu_new_cr3(struct kvm_vcpu *vcpu);
1285
1286 void kvm_enable_tdp(void);
1287 void kvm_disable_tdp(void);
1288
translate_gpa(struct kvm_vcpu * vcpu,gpa_t gpa,u32 access,struct x86_exception * exception)1289 static inline gpa_t translate_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
1290 struct x86_exception *exception)
1291 {
1292 return gpa;
1293 }
1294
page_header(hpa_t shadow_page)1295 static inline struct kvm_mmu_page *page_header(hpa_t shadow_page)
1296 {
1297 struct page *page = pfn_to_page(shadow_page >> PAGE_SHIFT);
1298
1299 return (struct kvm_mmu_page *)page_private(page);
1300 }
1301
kvm_read_ldt(void)1302 static inline u16 kvm_read_ldt(void)
1303 {
1304 u16 ldt;
1305 asm("sldt %0" : "=g"(ldt));
1306 return ldt;
1307 }
1308
kvm_load_ldt(u16 sel)1309 static inline void kvm_load_ldt(u16 sel)
1310 {
1311 asm("lldt %0" : : "rm"(sel));
1312 }
1313
1314 #ifdef CONFIG_X86_64
read_msr(unsigned long msr)1315 static inline unsigned long read_msr(unsigned long msr)
1316 {
1317 u64 value;
1318
1319 rdmsrl(msr, value);
1320 return value;
1321 }
1322 #endif
1323
get_rdx_init_val(void)1324 static inline u32 get_rdx_init_val(void)
1325 {
1326 return 0x600; /* P6 family */
1327 }
1328
kvm_inject_gp(struct kvm_vcpu * vcpu,u32 error_code)1329 static inline void kvm_inject_gp(struct kvm_vcpu *vcpu, u32 error_code)
1330 {
1331 kvm_queue_exception_e(vcpu, GP_VECTOR, error_code);
1332 }
1333
1334 #define TSS_IOPB_BASE_OFFSET 0x66
1335 #define TSS_BASE_SIZE 0x68
1336 #define TSS_IOPB_SIZE (65536 / 8)
1337 #define TSS_REDIRECTION_SIZE (256 / 8)
1338 #define RMODE_TSS_SIZE \
1339 (TSS_BASE_SIZE + TSS_REDIRECTION_SIZE + TSS_IOPB_SIZE + 1)
1340
1341 enum {
1342 TASK_SWITCH_CALL = 0,
1343 TASK_SWITCH_IRET = 1,
1344 TASK_SWITCH_JMP = 2,
1345 TASK_SWITCH_GATE = 3,
1346 };
1347
1348 #define HF_GIF_MASK (1 << 0)
1349 #define HF_HIF_MASK (1 << 1)
1350 #define HF_VINTR_MASK (1 << 2)
1351 #define HF_NMI_MASK (1 << 3)
1352 #define HF_IRET_MASK (1 << 4)
1353 #define HF_GUEST_MASK (1 << 5) /* VCPU is in guest-mode */
1354 #define HF_SMM_MASK (1 << 6)
1355 #define HF_SMM_INSIDE_NMI_MASK (1 << 7)
1356
1357 #define __KVM_VCPU_MULTIPLE_ADDRESS_SPACE
1358 #define KVM_ADDRESS_SPACE_NUM 2
1359
1360 #define kvm_arch_vcpu_memslots_id(vcpu) ((vcpu)->arch.hflags & HF_SMM_MASK ? 1 : 0)
1361 #define kvm_memslots_for_spte_role(kvm, role) __kvm_memslots(kvm, (role).smm)
1362
1363 asmlinkage void __noreturn kvm_spurious_fault(void);
1364
1365 /*
1366 * Hardware virtualization extension instructions may fault if a
1367 * reboot turns off virtualization while processes are running.
1368 * Usually after catching the fault we just panic; during reboot
1369 * instead the instruction is ignored.
1370 */
1371 #define ____kvm_handle_fault_on_reboot(insn, cleanup_insn) \
1372 "666: \n\t" \
1373 insn "\n\t" \
1374 "jmp 668f \n\t" \
1375 "667: \n\t" \
1376 "call kvm_spurious_fault \n\t" \
1377 "668: \n\t" \
1378 ".pushsection .fixup, \"ax\" \n\t" \
1379 "700: \n\t" \
1380 cleanup_insn "\n\t" \
1381 "cmpb $0, kvm_rebooting\n\t" \
1382 "je 667b \n\t" \
1383 "jmp 668b \n\t" \
1384 ".popsection \n\t" \
1385 _ASM_EXTABLE(666b, 700b)
1386
1387 #define __kvm_handle_fault_on_reboot(insn) \
1388 ____kvm_handle_fault_on_reboot(insn, "")
1389
1390 #define KVM_ARCH_WANT_MMU_NOTIFIER
1391 int kvm_unmap_hva(struct kvm *kvm, unsigned long hva);
1392 int kvm_unmap_hva_range(struct kvm *kvm, unsigned long start, unsigned long end);
1393 int kvm_age_hva(struct kvm *kvm, unsigned long start, unsigned long end);
1394 int kvm_test_age_hva(struct kvm *kvm, unsigned long hva);
1395 void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte);
1396 int kvm_cpu_has_injectable_intr(struct kvm_vcpu *v);
1397 int kvm_cpu_has_interrupt(struct kvm_vcpu *vcpu);
1398 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu);
1399 int kvm_cpu_get_interrupt(struct kvm_vcpu *v);
1400 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event);
1401 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu);
1402
1403 u64 kvm_get_arch_capabilities(void);
1404 void kvm_define_shared_msr(unsigned index, u32 msr);
1405 int kvm_set_shared_msr(unsigned index, u64 val, u64 mask);
1406
1407 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc);
1408 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc);
1409
1410 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu);
1411 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip);
1412
1413 void kvm_make_mclock_inprogress_request(struct kvm *kvm);
1414 void kvm_make_scan_ioapic_request(struct kvm *kvm);
1415
1416 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
1417 struct kvm_async_pf *work);
1418 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
1419 struct kvm_async_pf *work);
1420 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu,
1421 struct kvm_async_pf *work);
1422 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu);
1423 extern bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn);
1424
1425 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu);
1426 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err);
1427
1428 int kvm_is_in_guest(void);
1429
1430 int __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size);
1431 int x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size);
1432 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu);
1433 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu);
1434
1435 bool kvm_intr_is_single_vcpu(struct kvm *kvm, struct kvm_lapic_irq *irq,
1436 struct kvm_vcpu **dest_vcpu);
1437
1438 void kvm_set_msi_irq(struct kvm *kvm, struct kvm_kernel_irq_routing_entry *e,
1439 struct kvm_lapic_irq *irq);
1440
kvm_arch_vcpu_blocking(struct kvm_vcpu * vcpu)1441 static inline void kvm_arch_vcpu_blocking(struct kvm_vcpu *vcpu)
1442 {
1443 if (kvm_x86_ops->vcpu_blocking)
1444 kvm_x86_ops->vcpu_blocking(vcpu);
1445 }
1446
kvm_arch_vcpu_unblocking(struct kvm_vcpu * vcpu)1447 static inline void kvm_arch_vcpu_unblocking(struct kvm_vcpu *vcpu)
1448 {
1449 if (kvm_x86_ops->vcpu_unblocking)
1450 kvm_x86_ops->vcpu_unblocking(vcpu);
1451 }
1452
kvm_arch_vcpu_block_finish(struct kvm_vcpu * vcpu)1453 static inline void kvm_arch_vcpu_block_finish(struct kvm_vcpu *vcpu) {}
1454
kvm_cpu_get_apicid(int mps_cpu)1455 static inline int kvm_cpu_get_apicid(int mps_cpu)
1456 {
1457 #ifdef CONFIG_X86_LOCAL_APIC
1458 return __default_cpu_present_to_apicid(mps_cpu);
1459 #else
1460 WARN_ON_ONCE(1);
1461 return BAD_APICID;
1462 #endif
1463 }
1464
1465 void kvm_arch_mmu_notifier_invalidate_range(struct kvm *kvm,
1466 unsigned long start, unsigned long end);
1467
1468 #endif /* _ASM_X86_KVM_HOST_H */
1469