1 /*
2 * Copyright (C) 2012 - Virtual Open Systems and Columbia University
3 * Author: Christoffer Dall <c.dall@virtualopensystems.com>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License, version 2, as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
17 */
18
19 #ifndef __ARM_KVM_HOST_H__
20 #define __ARM_KVM_HOST_H__
21
22 #include <linux/types.h>
23 #include <linux/kvm_types.h>
24 #include <asm/cputype.h>
25 #include <asm/kvm.h>
26 #include <asm/kvm_asm.h>
27 #include <asm/kvm_mmio.h>
28 #include <asm/fpstate.h>
29 #include <kvm/arm_arch_timer.h>
30
31 #define __KVM_HAVE_ARCH_INTC_INITIALIZED
32
33 #define KVM_USER_MEM_SLOTS 32
34 #define KVM_HAVE_ONE_REG
35 #define KVM_HALT_POLL_NS_DEFAULT 500000
36
37 #define KVM_VCPU_MAX_FEATURES 2
38
39 #include <kvm/arm_vgic.h>
40
41
42 #ifdef CONFIG_ARM_GIC_V3
43 #define KVM_MAX_VCPUS VGIC_V3_MAX_CPUS
44 #else
45 #define KVM_MAX_VCPUS VGIC_V2_MAX_CPUS
46 #endif
47
48 #define KVM_REQ_SLEEP \
49 KVM_ARCH_REQ_FLAGS(0, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
50 #define KVM_REQ_IRQ_PENDING KVM_ARCH_REQ(1)
51
52 u32 *kvm_vcpu_reg(struct kvm_vcpu *vcpu, u8 reg_num, u32 mode);
53 int __attribute_const__ kvm_target_cpu(void);
54 int kvm_reset_vcpu(struct kvm_vcpu *vcpu);
55 void kvm_reset_coprocs(struct kvm_vcpu *vcpu);
56
57 struct kvm_arch {
58 /* VTTBR value associated with below pgd and vmid */
59 u64 vttbr;
60
61 /* The last vcpu id that ran on each physical CPU */
62 int __percpu *last_vcpu_ran;
63
64 /*
65 * Anything that is not used directly from assembly code goes
66 * here.
67 */
68
69 /* The VMID generation used for the virt. memory system */
70 u64 vmid_gen;
71 u32 vmid;
72
73 /* Stage-2 page table */
74 pgd_t *pgd;
75
76 /* Interrupt controller */
77 struct vgic_dist vgic;
78 int max_vcpus;
79
80 /* Mandated version of PSCI */
81 u32 psci_version;
82 };
83
84 #define KVM_NR_MEM_OBJS 40
85
86 /*
87 * We don't want allocation failures within the mmu code, so we preallocate
88 * enough memory for a single page fault in a cache.
89 */
90 struct kvm_mmu_memory_cache {
91 int nobjs;
92 void *objects[KVM_NR_MEM_OBJS];
93 };
94
95 struct kvm_vcpu_fault_info {
96 u32 hsr; /* Hyp Syndrome Register */
97 u32 hxfar; /* Hyp Data/Inst. Fault Address Register */
98 u32 hpfar; /* Hyp IPA Fault Address Register */
99 };
100
101 /*
102 * 0 is reserved as an invalid value.
103 * Order should be kept in sync with the save/restore code.
104 */
105 enum vcpu_sysreg {
106 __INVALID_SYSREG__,
107 c0_MPIDR, /* MultiProcessor ID Register */
108 c0_CSSELR, /* Cache Size Selection Register */
109 c1_SCTLR, /* System Control Register */
110 c1_ACTLR, /* Auxiliary Control Register */
111 c1_CPACR, /* Coprocessor Access Control */
112 c2_TTBR0, /* Translation Table Base Register 0 */
113 c2_TTBR0_high, /* TTBR0 top 32 bits */
114 c2_TTBR1, /* Translation Table Base Register 1 */
115 c2_TTBR1_high, /* TTBR1 top 32 bits */
116 c2_TTBCR, /* Translation Table Base Control R. */
117 c3_DACR, /* Domain Access Control Register */
118 c5_DFSR, /* Data Fault Status Register */
119 c5_IFSR, /* Instruction Fault Status Register */
120 c5_ADFSR, /* Auxilary Data Fault Status R */
121 c5_AIFSR, /* Auxilary Instrunction Fault Status R */
122 c6_DFAR, /* Data Fault Address Register */
123 c6_IFAR, /* Instruction Fault Address Register */
124 c7_PAR, /* Physical Address Register */
125 c7_PAR_high, /* PAR top 32 bits */
126 c9_L2CTLR, /* Cortex A15/A7 L2 Control Register */
127 c10_PRRR, /* Primary Region Remap Register */
128 c10_NMRR, /* Normal Memory Remap Register */
129 c12_VBAR, /* Vector Base Address Register */
130 c13_CID, /* Context ID Register */
131 c13_TID_URW, /* Thread ID, User R/W */
132 c13_TID_URO, /* Thread ID, User R/O */
133 c13_TID_PRIV, /* Thread ID, Privileged */
134 c14_CNTKCTL, /* Timer Control Register (PL1) */
135 c10_AMAIR0, /* Auxilary Memory Attribute Indirection Reg0 */
136 c10_AMAIR1, /* Auxilary Memory Attribute Indirection Reg1 */
137 NR_CP15_REGS /* Number of regs (incl. invalid) */
138 };
139
140 struct kvm_cpu_context {
141 struct kvm_regs gp_regs;
142 struct vfp_hard_struct vfp;
143 u32 cp15[NR_CP15_REGS];
144 };
145
146 typedef struct kvm_cpu_context kvm_cpu_context_t;
147
148 struct kvm_vcpu_arch {
149 struct kvm_cpu_context ctxt;
150
151 int target; /* Processor target */
152 DECLARE_BITMAP(features, KVM_VCPU_MAX_FEATURES);
153
154 /* The CPU type we expose to the VM */
155 u32 midr;
156
157 /* HYP trapping configuration */
158 u32 hcr;
159
160 /* Interrupt related fields */
161 u32 irq_lines; /* IRQ and FIQ levels */
162
163 /* Exception Information */
164 struct kvm_vcpu_fault_info fault;
165
166 /* Host FP context */
167 kvm_cpu_context_t *host_cpu_context;
168
169 /* VGIC state */
170 struct vgic_cpu vgic_cpu;
171 struct arch_timer_cpu timer_cpu;
172
173 /*
174 * Anything that is not used directly from assembly code goes
175 * here.
176 */
177
178 /* vcpu power-off state */
179 bool power_off;
180
181 /* Don't run the guest (internal implementation need) */
182 bool pause;
183
184 /* IO related fields */
185 struct kvm_decode mmio_decode;
186
187 /* Cache some mmu pages needed inside spinlock regions */
188 struct kvm_mmu_memory_cache mmu_page_cache;
189
190 /* Detect first run of a vcpu */
191 bool has_run_once;
192 };
193
194 struct kvm_vm_stat {
195 ulong remote_tlb_flush;
196 };
197
198 struct kvm_vcpu_stat {
199 u64 halt_successful_poll;
200 u64 halt_attempted_poll;
201 u64 halt_poll_invalid;
202 u64 halt_wakeup;
203 u64 hvc_exit_stat;
204 u64 wfe_exit_stat;
205 u64 wfi_exit_stat;
206 u64 mmio_exit_user;
207 u64 mmio_exit_kernel;
208 u64 exits;
209 };
210
211 #define vcpu_cp15(v,r) (v)->arch.ctxt.cp15[r]
212
213 int kvm_vcpu_preferred_target(struct kvm_vcpu_init *init);
214 unsigned long kvm_arm_num_regs(struct kvm_vcpu *vcpu);
215 int kvm_arm_copy_reg_indices(struct kvm_vcpu *vcpu, u64 __user *indices);
216 int kvm_arm_get_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg);
217 int kvm_arm_set_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg);
218 unsigned long kvm_call_hyp(void *hypfn, ...);
219 void force_vm_exit(const cpumask_t *mask);
220
221 #define KVM_ARCH_WANT_MMU_NOTIFIER
222 int kvm_unmap_hva(struct kvm *kvm, unsigned long hva);
223 int kvm_unmap_hva_range(struct kvm *kvm,
224 unsigned long start, unsigned long end);
225 void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte);
226
227 unsigned long kvm_arm_num_regs(struct kvm_vcpu *vcpu);
228 int kvm_arm_copy_reg_indices(struct kvm_vcpu *vcpu, u64 __user *indices);
229 int kvm_age_hva(struct kvm *kvm, unsigned long start, unsigned long end);
230 int kvm_test_age_hva(struct kvm *kvm, unsigned long hva);
231
232 struct kvm_vcpu *kvm_arm_get_running_vcpu(void);
233 struct kvm_vcpu __percpu **kvm_get_running_vcpus(void);
234 void kvm_arm_halt_guest(struct kvm *kvm);
235 void kvm_arm_resume_guest(struct kvm *kvm);
236
237 int kvm_arm_copy_coproc_indices(struct kvm_vcpu *vcpu, u64 __user *uindices);
238 unsigned long kvm_arm_num_coproc_regs(struct kvm_vcpu *vcpu);
239 int kvm_arm_coproc_get_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *);
240 int kvm_arm_coproc_set_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *);
241
242 int handle_exit(struct kvm_vcpu *vcpu, struct kvm_run *run,
243 int exception_index);
244
__cpu_init_hyp_mode(phys_addr_t pgd_ptr,unsigned long hyp_stack_ptr,unsigned long vector_ptr)245 static inline void __cpu_init_hyp_mode(phys_addr_t pgd_ptr,
246 unsigned long hyp_stack_ptr,
247 unsigned long vector_ptr)
248 {
249 /*
250 * Call initialization code, and switch to the full blown HYP
251 * code. The init code doesn't need to preserve these
252 * registers as r0-r3 are already callee saved according to
253 * the AAPCS.
254 * Note that we slightly misuse the prototype by casting the
255 * stack pointer to a void *.
256
257 * The PGDs are always passed as the third argument, in order
258 * to be passed into r2-r3 to the init code (yes, this is
259 * compliant with the PCS!).
260 */
261
262 kvm_call_hyp((void*)hyp_stack_ptr, vector_ptr, pgd_ptr);
263 }
264
__cpu_init_stage2(void)265 static inline void __cpu_init_stage2(void)
266 {
267 kvm_call_hyp(__init_stage2_translation);
268 }
269
kvm_arch_dev_ioctl_check_extension(struct kvm * kvm,long ext)270 static inline int kvm_arch_dev_ioctl_check_extension(struct kvm *kvm, long ext)
271 {
272 return 0;
273 }
274
275 int kvm_perf_init(void);
276 int kvm_perf_teardown(void);
277
278 void kvm_mmu_wp_memory_region(struct kvm *kvm, int slot);
279
280 struct kvm_vcpu *kvm_mpidr_to_vcpu(struct kvm *kvm, unsigned long mpidr);
281
kvm_arch_hardware_unsetup(void)282 static inline void kvm_arch_hardware_unsetup(void) {}
kvm_arch_sync_events(struct kvm * kvm)283 static inline void kvm_arch_sync_events(struct kvm *kvm) {}
kvm_arch_vcpu_uninit(struct kvm_vcpu * vcpu)284 static inline void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu) {}
kvm_arch_sched_in(struct kvm_vcpu * vcpu,int cpu)285 static inline void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu) {}
kvm_arch_vcpu_block_finish(struct kvm_vcpu * vcpu)286 static inline void kvm_arch_vcpu_block_finish(struct kvm_vcpu *vcpu) {}
287
kvm_arm_init_debug(void)288 static inline void kvm_arm_init_debug(void) {}
kvm_arm_setup_debug(struct kvm_vcpu * vcpu)289 static inline void kvm_arm_setup_debug(struct kvm_vcpu *vcpu) {}
kvm_arm_clear_debug(struct kvm_vcpu * vcpu)290 static inline void kvm_arm_clear_debug(struct kvm_vcpu *vcpu) {}
kvm_arm_reset_debug_ptr(struct kvm_vcpu * vcpu)291 static inline void kvm_arm_reset_debug_ptr(struct kvm_vcpu *vcpu) {}
292
293 int kvm_arm_vcpu_arch_set_attr(struct kvm_vcpu *vcpu,
294 struct kvm_device_attr *attr);
295 int kvm_arm_vcpu_arch_get_attr(struct kvm_vcpu *vcpu,
296 struct kvm_device_attr *attr);
297 int kvm_arm_vcpu_arch_has_attr(struct kvm_vcpu *vcpu,
298 struct kvm_device_attr *attr);
299
kvm_arm_harden_branch_predictor(void)300 static inline bool kvm_arm_harden_branch_predictor(void)
301 {
302 switch(read_cpuid_part()) {
303 #ifdef CONFIG_HARDEN_BRANCH_PREDICTOR
304 case ARM_CPU_PART_BRAHMA_B15:
305 case ARM_CPU_PART_CORTEX_A12:
306 case ARM_CPU_PART_CORTEX_A15:
307 case ARM_CPU_PART_CORTEX_A17:
308 return true;
309 #endif
310 default:
311 return false;
312 }
313 }
314
315 #define KVM_SSBD_UNKNOWN -1
316 #define KVM_SSBD_FORCE_DISABLE 0
317 #define KVM_SSBD_KERNEL 1
318 #define KVM_SSBD_FORCE_ENABLE 2
319 #define KVM_SSBD_MITIGATED 3
320
kvm_arm_have_ssbd(void)321 static inline int kvm_arm_have_ssbd(void)
322 {
323 /* No way to detect it yet, pretend it is not there. */
324 return KVM_SSBD_UNKNOWN;
325 }
326
327 #endif /* __ARM_KVM_HOST_H__ */
328