| /drivers/isdn/mISDN/ |
| D | dsp_blowfish.c | 374 u32 *P = dsp->bf_p; in dsp_bf_encrypt() local
466 u32 *P = dsp->bf_p; in dsp_bf_decrypt() local
563 encrypt_block(const u32 *P, const u32 *S, u32 *dst, u32 *src) in encrypt_block()
603 u32 *P = (u32 *)dsp->bf_p; in dsp_bf_init() local
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| /drivers/gpu/drm/nouveau/nvkm/subdev/clk/ |
| D | nv50.c | 58 int P, N, M, id; in read_pll_src() local
198 u32 P = 0; in nv50_clk_read() local
325 calc_pll(struct nv50_clk *clk, u32 reg, u32 idx, int *N, int *M, int *P) in calc_pll()
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| D | nv40.c | 44 int P = (ctrl & 0x00070000) >> 16; in read_pll_1() local
65 int P = (ctrl & 0x00070000) >> 16; in read_pll_2() local
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| D | pllnv04.c | 49 int M, N, thisP, P; in getMNP_single() local
228 int *N1, int *M1, int *N2, int *M2, int *P) in nv04_pll_calc()
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| D | pllgt215.c | 31 u32 freq, int *pN, int *pfN, int *pM, int *P) in gt215_pll_calc()
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| D | mcp77.c | 87 u32 P = 0; in mcp77_clk_read() local
166 u32 clock, int *N, int *M, int *P) in calc_pll()
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| D | nv04.c | 35 int N1, M1, N2, M2, P; in nv04_clk_pll_calc() local
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| D | gt215.c | 112 u32 sclk = 0, P = 1, N = 1, M = 1; in read_pll() local
238 int P, N, M, diff; in gt215_pll_info() local
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| D | gf100.c | 64 u32 P = (coef & 0x003f0000) >> 16; in read_pll() local
255 int N, M, P, ret; in calc_pll() local
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| D | gk104.c | 65 u32 P = (coef & 0x003f0000) >> 16; in read_pll() local
268 int N, M, P, ret; in calc_pll() local
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| /drivers/video/fbdev/nvidia/ |
| D | nv_hw.c | 144 unsigned int pll, N, M, MB, NB, P; in nvGetClocks() local
684 unsigned int M, N, P, pll, MClk, NVClk, memctrl; in nForceUpdateArbitrationSettings() local
771 unsigned M, N, P; in CalcVClock() local
817 unsigned M, N, P; in CalcVClock2Stage() local
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| /drivers/isdn/hardware/eicon/ |
| D | io.c | 685 byte *P = (byte *)buffer; in io_in_buffer() local
727 byte *P = (byte *)buffer; in io_out_buffer() local
844 void *PTR_P(ADAPTER *a, ENTITY *e, void *P) in PTR_P()
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| D | di_defs.h | 46 byte P[270]; /* data/parameter field */ member
69 byte *P; member
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| D | divasmain.c | 458 inline void inppw_buffer(void __iomem *addr, void *P, int length) in inppw_buffer()
463 inline void outppw_buffer(void __iomem *addr, void *P, int length) in outppw_buffer()
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| D | debug.c | 1332 static word SuperTraceCreateReadReq(byte *P, const char *path) { in SuperTraceCreateReadReq()
1353 static void single_p(byte *P, word *PLength, byte Id) { in single_p()
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| /drivers/video/fbdev/kyro/ |
| D | STG4000Ramdac.c | 30 u32 F = 0, R = 0, P = 0; in InitialiseRamdac() local
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| D | STG4000InitDevice.c | 245 u32 F, R, P; in SetCoreClockPLL() local
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| /drivers/gpu/drm/nouveau/nvkm/subdev/devinit/ |
| D | gf100.c | 37 int N, fN, M, P; in gf100_devinit_pll_set() local
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| D | gt215.c | 37 int N, fN, M, P; in gt215_devinit_pll_set() local
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| D | nv50.c | 41 int N1, M1, N2, M2, P; in nv50_devinit_pll_set() local
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| D | nv04.c | 363 int N1, M1, N2, M2, P; in nv04_devinit_pll_set() local
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| /drivers/net/ethernet/qlogic/qlcnic/ |
| D | qlcnic_dcb.c | 30 #define QLC_DCB_GET_TC_PRIO(X, P) ((X >> (P * 3)) & 0x7) argument
31 #define QLC_DCB_GET_PGID_PRIO(X, P) ((X >> (P * 8)) & 0xff) argument
32 #define QLC_DCB_GET_BWPER_PG(X, P) ((X >> (P * 8)) & 0xff) argument
33 #define QLC_DCB_GET_TSA_PG(X, P) ((X >> (P * 8)) & 0xff) argument
34 #define QLC_DCB_GET_PFC_PRIO(X, P) (((X >> 24) >> P) & 0x1) argument
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| /drivers/video/fbdev/riva/ |
| D | riva_hw.c | 619 unsigned int M, N, P, pll, MClk; in nv3UpdateArbitrationSettings() local
808 unsigned int M, N, P, pll, MClk, NVClk, cfg1; in nv4UpdateArbitrationSettings() local
1071 unsigned int M, N, P, pll, MClk, NVClk, cfg1; in nv10UpdateArbitrationSettings() local
1116 unsigned int M, N, P, pll, MClk, NVClk; in nForceUpdateArbitrationSettings() local
1181 unsigned M, N, P; in CalcVClock() local
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| /drivers/infiniband/hw/usnic/ |
| D | usnic_ib.h | 127 #define UPDATE_PTR_LEFT(N, P, L) \ argument
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| /drivers/net/ethernet/intel/ixgbe/ |
| D | ixgbe_type.h | 2509 #define IXGBE_PVFTDH(P) (0x06010 + (0x40 * (P))) argument
2510 #define IXGBE_PVFTDT(P) (0x06018 + (0x40 * (P))) argument
2511 #define IXGBE_PVFTDWBAL(P) (0x06038 + (0x40 * (P))) argument
2512 #define IXGBE_PVFTDWBAH(P) (0x0603C + (0x40 * (P))) argument
3684 #define IXGBE_KRM_PORT_CAR_GEN_CTRL(P) ((P) ? 0x8010 : 0x4010) argument
3685 #define IXGBE_KRM_LINK_S1(P) ((P) ? 0x8200 : 0x4200) argument
3686 #define IXGBE_KRM_LINK_CTRL_1(P) ((P) ? 0x820C : 0x420C) argument
3687 #define IXGBE_KRM_AN_CNTL_1(P) ((P) ? 0x822C : 0x422C) argument
3688 #define IXGBE_KRM_AN_CNTL_8(P) ((P) ? 0x8248 : 0x4248) argument
3689 #define IXGBE_KRM_SGMII_CTRL(P) ((P) ? 0x82A0 : 0x42A0) argument
[all …]
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