1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Meta page table definitions. 4 */ 5 6 #ifndef _METAG_PGTABLE_BITS_H 7 #define _METAG_PGTABLE_BITS_H 8 9 #include <asm/metag_mem.h> 10 11 /* 12 * Definitions for MMU descriptors 13 * 14 * These are the hardware bits in the MMCU pte entries. 15 * Derived from the Meta toolkit headers. 16 */ 17 #define _PAGE_PRESENT MMCU_ENTRY_VAL_BIT 18 #define _PAGE_WRITE MMCU_ENTRY_WR_BIT 19 #define _PAGE_PRIV MMCU_ENTRY_PRIV_BIT 20 /* Write combine bit - this can cause writes to occur out of order */ 21 #define _PAGE_WR_COMBINE MMCU_ENTRY_WRC_BIT 22 /* Sys coherent bit - this bit is never used by Linux */ 23 #define _PAGE_SYS_COHERENT MMCU_ENTRY_SYS_BIT 24 #define _PAGE_ALWAYS_ZERO_1 0x020 25 #define _PAGE_CACHE_CTRL0 0x040 26 #define _PAGE_CACHE_CTRL1 0x080 27 #define _PAGE_ALWAYS_ZERO_2 0x100 28 #define _PAGE_ALWAYS_ZERO_3 0x200 29 #define _PAGE_ALWAYS_ZERO_4 0x400 30 #define _PAGE_ALWAYS_ZERO_5 0x800 31 32 /* These are software bits that we stuff into the gaps in the hardware 33 * pte entries that are not used. Note, these DO get stored in the actual 34 * hardware, but the hardware just does not use them. 35 */ 36 #define _PAGE_ACCESSED _PAGE_ALWAYS_ZERO_1 37 #define _PAGE_DIRTY _PAGE_ALWAYS_ZERO_2 38 39 /* Pages owned, and protected by, the kernel. */ 40 #define _PAGE_KERNEL _PAGE_PRIV 41 42 /* No cacheing of this page */ 43 #define _PAGE_CACHE_WIN0 (MMCU_CWIN_UNCACHED << MMCU_ENTRY_CWIN_S) 44 /* burst cacheing - good for data streaming */ 45 #define _PAGE_CACHE_WIN1 (MMCU_CWIN_BURST << MMCU_ENTRY_CWIN_S) 46 /* One cache way per thread */ 47 #define _PAGE_CACHE_WIN2 (MMCU_CWIN_C1SET << MMCU_ENTRY_CWIN_S) 48 /* Full on cacheing */ 49 #define _PAGE_CACHE_WIN3 (MMCU_CWIN_CACHED << MMCU_ENTRY_CWIN_S) 50 51 #define _PAGE_CACHEABLE (_PAGE_CACHE_WIN3 | _PAGE_WR_COMBINE) 52 53 /* which bits are used for cache control ... */ 54 #define _PAGE_CACHE_MASK (_PAGE_CACHE_CTRL0 | _PAGE_CACHE_CTRL1 | \ 55 _PAGE_WR_COMBINE) 56 57 /* This is a mask of the bits that pte_modify is allowed to change. */ 58 #define _PAGE_CHG_MASK (PAGE_MASK) 59 60 #define _PAGE_SZ_SHIFT 1 61 #define _PAGE_SZ_4K (0x0) 62 #define _PAGE_SZ_8K (0x1 << _PAGE_SZ_SHIFT) 63 #define _PAGE_SZ_16K (0x2 << _PAGE_SZ_SHIFT) 64 #define _PAGE_SZ_32K (0x3 << _PAGE_SZ_SHIFT) 65 #define _PAGE_SZ_64K (0x4 << _PAGE_SZ_SHIFT) 66 #define _PAGE_SZ_128K (0x5 << _PAGE_SZ_SHIFT) 67 #define _PAGE_SZ_256K (0x6 << _PAGE_SZ_SHIFT) 68 #define _PAGE_SZ_512K (0x7 << _PAGE_SZ_SHIFT) 69 #define _PAGE_SZ_1M (0x8 << _PAGE_SZ_SHIFT) 70 #define _PAGE_SZ_2M (0x9 << _PAGE_SZ_SHIFT) 71 #define _PAGE_SZ_4M (0xa << _PAGE_SZ_SHIFT) 72 #define _PAGE_SZ_MASK (0xf << _PAGE_SZ_SHIFT) 73 74 #if defined(CONFIG_PAGE_SIZE_4K) 75 #define _PAGE_SZ (_PAGE_SZ_4K) 76 #elif defined(CONFIG_PAGE_SIZE_8K) 77 #define _PAGE_SZ (_PAGE_SZ_8K) 78 #elif defined(CONFIG_PAGE_SIZE_16K) 79 #define _PAGE_SZ (_PAGE_SZ_16K) 80 #endif 81 #define _PAGE_TABLE (_PAGE_SZ | _PAGE_PRESENT) 82 83 #if defined(CONFIG_HUGETLB_PAGE_SIZE_8K) 84 # define _PAGE_SZHUGE (_PAGE_SZ_8K) 85 #elif defined(CONFIG_HUGETLB_PAGE_SIZE_16K) 86 # define _PAGE_SZHUGE (_PAGE_SZ_16K) 87 #elif defined(CONFIG_HUGETLB_PAGE_SIZE_32K) 88 # define _PAGE_SZHUGE (_PAGE_SZ_32K) 89 #elif defined(CONFIG_HUGETLB_PAGE_SIZE_64K) 90 # define _PAGE_SZHUGE (_PAGE_SZ_64K) 91 #elif defined(CONFIG_HUGETLB_PAGE_SIZE_128K) 92 # define _PAGE_SZHUGE (_PAGE_SZ_128K) 93 #elif defined(CONFIG_HUGETLB_PAGE_SIZE_256K) 94 # define _PAGE_SZHUGE (_PAGE_SZ_256K) 95 #elif defined(CONFIG_HUGETLB_PAGE_SIZE_512K) 96 # define _PAGE_SZHUGE (_PAGE_SZ_512K) 97 #elif defined(CONFIG_HUGETLB_PAGE_SIZE_1M) 98 # define _PAGE_SZHUGE (_PAGE_SZ_1M) 99 #elif defined(CONFIG_HUGETLB_PAGE_SIZE_2M) 100 # define _PAGE_SZHUGE (_PAGE_SZ_2M) 101 #elif defined(CONFIG_HUGETLB_PAGE_SIZE_4M) 102 # define _PAGE_SZHUGE (_PAGE_SZ_4M) 103 #endif 104 105 #endif /* _METAG_PGTABLE_BITS_H */ 106